Re: [Mesa-dev] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v12)
Hi Daniel, thanks for jumping in here. And yes, you are absolutely right we need to get this fixed and not yell at each other that we have a different understanding of things. Your proposal sounds sane to me, but I wouldn't call it slots. Rather something like "use cases" since we can have multiple fences for each category I think. And I see at four here: 1. Internal kernel memory management. Everybody needs to wait for this, it's equal to bo->moving. 2. Writers for implicit sync, implicit sync readers should wait for them. 3. Readers for implicit sync, implicit sync writers should wait for them. 4. Things like TLB flushes and page table updates, no implicit sync but memory management must take them into account before moving/freeing backing store. Happy weekend and hopefully not so much heat guys. Cheers, Christian. Am 18.06.21 um 20:20 schrieb Daniel Stone: Sorry for the mobile reply, but V4L2 is absolutely not write-only; there has never been an intersection of V4L2 supporting dmabuf and not supporting reads. I see your point about the heritage of dma_resv but it’s a red herring. It doesn’t matter who’s right, or who was first, or where the code was extracted from. It’s well defined that amdgpu defines resv to be one thing, that every other non-TTM user defines it to be something very different, and that the other TTM users define it to be something in the middle. We’ll never get to anything workable if we keep arguing who’s right. Everyone is wrong, because dma_resv doesn’t globally mean anything. It seems clear that there are three classes of synchronisation barrier (not using the ‘f’ word here), in descending exclusion order: - memory management barriers (amdgpu exclusive fence / ttm_bo->moving) - implicit synchronisation write barriers (everyone else’s exclusive fences, amdgpu’s shared fences) - implicit synchronisation read barriers (everyone else’s shared fences, also amdgpu’s shared fences sometimes) I don’t see a world in which these three uses can be reduced to two slots. What also isn’t clear to me though, is how the memory-management barriers can exclude all other access in the original proposal with purely userspace CS. Retaining the three separate modes also seems like a hard requirement to not completely break userspace, but then I don’t see how three separate slots would work if they need to be temporally ordered. amdgpu fixed this by redefining the meaning of the two slots, others fixed this by not doing one of the three modes. So how do we square the circle without encoding a DAG into the kernel? Do the two slots need to become a single list which is ordered by time + ‘weight’ and flattened whenever modified? Something else? Have a great weekend. -d On 18 Jun 2021, at 5:43 pm, Christian König wrote: Am 18.06.21 um 17:17 schrieb Daniel Vetter: [SNIP] Ignoring _all_ fences is officially ok for pinned dma-buf. This is what v4l does. Aside from it's definitely not just i915 that does this even on the drm side, we have a few more drivers nowadays. No it seriously isn't. If drivers are doing this they are more than broken. See the comment in dma-resv.h * Based on bo.c which bears the following copyright notice, * but is dual licensed: The handling in ttm_bo.c is and always was that the exclusive fence is used for buffer moves. As I said multiple times now the *MAIN* purpose of the dma_resv object is memory management and *NOT* synchronization. Those restrictions come from the original design of TTM where the dma_resv object originated from. The resulting consequences are that: a) If you access the buffer without waiting for the exclusive fence you run into a potential information leak. We kind of let that slip for V4L since they only access the buffers for writes, so you can't do any harm there. b) If you overwrite the exclusive fence with a new one without waiting for the old one to signal you open up the possibility for userspace to access freed up memory. This is a complete show stopper since it means that taking over the system is just a typing exercise. What you have done by allowing this in is ripping open a major security hole for any DMA-buf import in i915 from all TTM based driver. This needs to be fixed ASAP, either by waiting in i915 and all other drivers doing this for the exclusive fence while importing a DMA-buf or by marking i915 and all other drivers as broken. Sorry, but if you allowed that in you seriously have no idea what you are talking about here and where all of this originated from. Regards, Christian. ___ wayland-devel mailing list wayland-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/wayland-devel
Re: [Mesa-dev] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v12)
Am 18.06.21 um 17:17 schrieb Daniel Vetter: [SNIP] Ignoring _all_ fences is officially ok for pinned dma-buf. This is what v4l does. Aside from it's definitely not just i915 that does this even on the drm side, we have a few more drivers nowadays. No it seriously isn't. If drivers are doing this they are more than broken. See the comment in dma-resv.h * Based on bo.c which bears the following copyright notice, * but is dual licensed: The handling in ttm_bo.c is and always was that the exclusive fence is used for buffer moves. As I said multiple times now the *MAIN* purpose of the dma_resv object is memory management and *NOT* synchronization. Those restrictions come from the original design of TTM where the dma_resv object originated from. The resulting consequences are that: a) If you access the buffer without waiting for the exclusive fence you run into a potential information leak. We kind of let that slip for V4L since they only access the buffers for writes, so you can't do any harm there. b) If you overwrite the exclusive fence with a new one without waiting for the old one to signal you open up the possibility for userspace to access freed up memory. This is a complete show stopper since it means that taking over the system is just a typing exercise. What you have done by allowing this in is ripping open a major security hole for any DMA-buf import in i915 from all TTM based driver. This needs to be fixed ASAP, either by waiting in i915 and all other drivers doing this for the exclusive fence while importing a DMA-buf or by marking i915 and all other drivers as broken. Sorry, but if you allowed that in you seriously have no idea what you are talking about here and where all of this originated from. Regards, Christian. ___ wayland-devel mailing list wayland-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/wayland-devel
Re: [Mesa-dev] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v12)
Am 18.06.21 um 19:20 schrieb Daniel Vetter:
On Fri, Jun 18, 2021 at 6:43 PM Christian König
wrote:
Am 18.06.21 um 17:17 schrieb Daniel Vetter:
[SNIP]
Ignoring _all_ fences is officially ok for pinned dma-buf. This is
what v4l does. Aside from it's definitely not just i915 that does this
even on the drm side, we have a few more drivers nowadays.
No it seriously isn't. If drivers are doing this they are more than broken.
See the comment in dma-resv.h
* Based on bo.c which bears the following copyright notice,
* but is dual licensed:
The handling in ttm_bo.c is and always was that the exclusive fence is
used for buffer moves.
As I said multiple times now the *MAIN* purpose of the dma_resv object
is memory management and *NOT* synchronization.
Those restrictions come from the original design of TTM where the
dma_resv object originated from.
The resulting consequences are that:
a) If you access the buffer without waiting for the exclusive fence you
run into a potential information leak.
We kind of let that slip for V4L since they only access the buffers
for writes, so you can't do any harm there.
b) If you overwrite the exclusive fence with a new one without waiting
for the old one to signal you open up the possibility for userspace to
access freed up memory.
This is a complete show stopper since it means that taking over the
system is just a typing exercise.
What you have done by allowing this in is ripping open a major security
hole for any DMA-buf import in i915 from all TTM based driver.
This needs to be fixed ASAP, either by waiting in i915 and all other
drivers doing this for the exclusive fence while importing a DMA-buf or
by marking i915 and all other drivers as broken.
Sorry, but if you allowed that in you seriously have no idea what you
are talking about here and where all of this originated from.
Dude, get a grip, seriously. dma-buf landed in 2011
commit d15bd7ee445d0702ad801fdaece348fdb79e6581
Author: Sumit Semwal
Date: Mon Dec 26 14:53:15 2011 +0530
dma-buf: Introduce dma buffer sharing mechanism
and drm prime landed in the same year
commit 3248877ea1796915419fba7c89315fdbf00cb56a
(airlied/drm-prime-dmabuf-initial)
Author: Dave Airlie
Date: Fri Nov 25 15:21:02 2011 +
drm: base prime/dma-buf support (v5)
dma-resv was extracted much later
commit 786d7257e537da0674c02e16e3b30a44665d1cee
Author: Maarten Lankhorst
Date: Thu Jun 27 13:48:16 2013 +0200
reservation: cross-device reservation support, v4
Maarten's patch only extracted the dma_resv stuff so it's there,
optionally. There was never any effort to roll this out to all the
existing drivers, of which there were plenty.
It is, and has been since 10 years, totally fine to access dma-buf
without looking at any fences at all. From your pov of a ttm driver
dma-resv is mainly used for memory management and not sync, but I
think that's also due to some reinterpretation of the actual sync
rules on your side. For everyone else the dma_resv attached to a
dma-buf has been about implicit sync only, nothing else.
No, that was way before my time.
The whole thing was introduced with this commit here:
commit f2c24b83ae90292d315aa7ac029c6ce7929e01aa
Author: Maarten Lankhorst
Date: Wed Apr 2 17:14:48 2014 +0200
drm/ttm: flip the switch, and convert to dma_fence
Signed-off-by: Maarten Lankhorst
int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
- bo->sync_obj = driver->sync_obj_ref(sync_obj);
+ reservation_object_add_excl_fence(bo->resv, fence);
if (evict) {
Maarten replaced the bo->sync_obj reference with the dma_resv exclusive
fence.
This means that we need to apply the sync_obj semantic to all drivers
using a DMA-buf with its dma_resv object, otherwise you break imports
from TTM drivers.
Since then and up till now the exclusive fence must be waited on and
never replaced with anything which signals before the old fence.
Maarten and I think Thomas did that and I was always assuming that you
know about this design decision.
It's absolutely not that this is my invention, I'm just telling you how
it ever was.
Anyway this means we have a seriously misunderstanding and yes now some
of our discussions about dynamic P2P suddenly make much more sense.
Regards,
Christian.
_only_ when you have a dynamic importer/exporter can you assume that
the dma_resv fences must actually be obeyed. That's one of the reasons
why we had to make this a completely new mode (the other one was
locking, but they really tie together).
Wrt your problems:
a) needs to be fixed in drivers exporting buffers and failing to make
sure the memory is there by the time dma_buf_map_attachment returns.
b) needs to be fixed in the importers, and there's quite a few of
those. There's more than i915 here, which is why I think we should
have the dma_resv_add_shared_exclusive helper extracted from amdgpu.
Avoids hand-rolling this about 5 times (6 if we include
Re: [Mesa-dev] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v12)
Am 16.06.21 um 20:30 schrieb Jason Ekstrand: On Tue, Jun 15, 2021 at 3:41 AM Christian König wrote: Hi Jason & Daniel, maybe I should explain once more where the problem with this approach is and why I think we need to get that fixed before we can do something like this here. To summarize what this patch here does is that it copies the exclusive fence and/or the shared fences into a sync_file. This alone is totally unproblematic. The problem is what this implies. When you need to copy the exclusive fence to a sync_file then this means that the driver is at some point ignoring the exclusive fence on a buffer object. Not necessarily. Part of the point of this is to allow for CPU waits on a past point in buffers timeline. Today, we have poll() and GEM_WAIT both of which wait for the buffer to be idle from whatever GPU work is currently happening. We want to wait on something in the past and ignore anything happening now. Good point, yes that is indeed a valid use case. But, to the broader point, maybe? I'm a little fuzzy on exactly where i915 inserts and/or depends on fences. When you combine that with complex drivers which use TTM and buffer moves underneath you can construct an information leak using this and give userspace access to memory which is allocated to the driver, but not yet initialized. This way you can leak things like page tables, passwords, kernel data etc... in large amounts to userspace and is an absolutely no-go for security. Ugh... Unfortunately, I'm really out of my depth on the implications going on here but I think I see your point. That's why I'm said we need to get this fixed before we upstream this patch set here and especially the driver change which is using that. Well, i915 has had uAPI for a while to ignore fences. Yeah, exactly that's illegal. At least the kernel internal fences like moving or clearing a buffer object needs to be taken into account before a driver is allowed to access a buffer. Otherwise we have an information leak worth a CVE and that is certainly not something we want. Those changes are years in the past. If we have a real problem here (not sure on that yet), then we'll have to figure out how to fix it without nuking uAPI. Well, that was the basic idea of attaching flags to the fences in the dma_resv object. In other words you clearly denote when you have to wait for a fence before accessing a buffer or you cause a security issue. Christian. --Jason Regards, Christian. Am 10.06.21 um 23:09 schrieb Jason Ekstrand: Modern userspace APIs like Vulkan are built on an explicit synchronization model. This doesn't always play nicely with the implicit synchronization used in the kernel and assumed by X11 and Wayland. The client -> compositor half of the synchronization isn't too bad, at least on intel, because we can control whether or not i915 synchronizes on the buffer and whether or not it's considered written. The harder part is the compositor -> client synchronization when we get the buffer back from the compositor. We're required to be able to provide the client with a VkSemaphore and VkFence representing the point in time where the window system (compositor and/or display) finished using the buffer. With current APIs, it's very hard to do this in such a way that we don't get confused by the Vulkan driver's access of the buffer. In particular, once we tell the kernel that we're rendering to the buffer again, any CPU waits on the buffer or GPU dependencies will wait on some of the client rendering and not just the compositor. This new IOCTL solves this problem by allowing us to get a snapshot of the implicit synchronization state of a given dma-buf in the form of a sync file. It's effectively the same as a poll() or I915_GEM_WAIT only, instead of CPU waiting directly, it encapsulates the wait operation, at the current moment in time, in a sync_file so we can check/wait on it later. As long as the Vulkan driver does the sync_file export from the dma-buf before we re-introduce it for rendering, it will only contain fences from the compositor or display. This allows to accurately turn it into a VkFence or VkSemaphore without any over- synchronization. This patch series actually contains two new ioctls. There is the export one mentioned above as well as an RFC for an import ioctl which provides the other half. The intention is to land the export ioctl since it seems like there's no real disagreement on that one. The import ioctl, however, has a lot of debate around it so it's intended to be RFC-only for now. Mesa MR: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgitlab.freedesktop.org%2Fmesa%2Fmesa%2F-%2Fmerge_requests%2F4037&data=04%7C01%7Cchristian.koenig%40amd.com%7Cb094e69c94814727939508d930f4ca94%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637594650220923783%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=xUwaiuw8Qt3d3
Re: [Mesa-dev] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v12)
Am 17.06.21 um 21:58 schrieb Daniel Vetter: On Thu, Jun 17, 2021 at 09:37:36AM +0200, Christian König wrote: [SNIP] But, to the broader point, maybe? I'm a little fuzzy on exactly where i915 inserts and/or depends on fences. When you combine that with complex drivers which use TTM and buffer moves underneath you can construct an information leak using this and give userspace access to memory which is allocated to the driver, but not yet initialized. This way you can leak things like page tables, passwords, kernel data etc... in large amounts to userspace and is an absolutely no-go for security. Ugh... Unfortunately, I'm really out of my depth on the implications going on here but I think I see your point. That's why I'm said we need to get this fixed before we upstream this patch set here and especially the driver change which is using that. Well, i915 has had uAPI for a while to ignore fences. Yeah, exactly that's illegal. You're a few years too late with closing that barn door. The following drives have this concept - i915 - msm - etnaviv Because you can't write a competent vulkan driver without this. WHAT? ^^ This was discussed at absolute epic length in various xdcs iirc. We did ignore a bit the vram/ttm/bo-moving problem because all the people present were hacking on integrated gpu (see list above), but that just means we need to treat the ttm_bo->moving fence properly. I should have visited more XDCs in the past, the problem is much larger than this. But I now start to understand what you are doing with that design and why it looks so messy to me, amdgpu is just currently the only driver which does Vulkan and complex memory management at the same time. At least the kernel internal fences like moving or clearing a buffer object needs to be taken into account before a driver is allowed to access a buffer. Yes i915 needs to make sure it never ignores ttm_bo->moving. No, that is only the tip of the iceberg. See TTM for example also puts fences which drivers needs to wait for into the shared slots. Same thing for use cases like clear on release etc From my point of view the main purpose of the dma_resv object is to serve memory management, synchronization for command submission is just a secondary use case. And that drivers choose to ignore the exclusive fence is an absolutely no-go from a memory management and security point of view. Exclusive access means exclusive access. Ignoring that won't work. The only thing which saved us so far is the fact that drivers doing this are not that complex. BTW: How does it even work? I mean then you would run into the same problem as amdgpu with its page table update fences, e.g. that your shared fences might signal before the exclusive one. For dma-buf this isn't actually a problem, because dma-buf are pinned. You can't move them while other drivers are using them, hence there's not actually a ttm_bo->moving fence we can ignore. p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw these other drivers) need to change before they can do dynamic dma-buf. Otherwise we have an information leak worth a CVE and that is certainly not something we want. Because yes otherwise we get a CVE. But right now I don't think we have one. Yeah, agree. But this is just because of coincident and not because of good engineering :) We do have a quite big confusion on what exactly the signaling ordering is supposed to be between exclusive and the collective set of shared fences, and there's some unifying that needs to happen here. But I think what Jason implements here in the import ioctl is the most defensive version possible, so really can't break any driver. It really works like you have an ad-hoc gpu engine that does nothing itself, but waits for the current exclusive fence and then sets the exclusive fence with its "CS" completion fence. That's imo perfectly legit use-case. The use case is certainly legit, but I'm not sure if merging this at the moment is a good idea. Your note that drivers are already ignoring the exclusive fence in the dma_resv object was eye opening to me. And I now have the very strong feeling that the synchronization and the design of the dma_resv object is even more messy then I thought it is. To summarize we can be really lucky that it didn't blow up into our faces already. Same for the export one. Waiting for a previous snapshot of implicit fences is imo perfectly ok use-case and useful for compositors - client might soon start more rendering, and on some drivers that always results in the exclusive slot being set, so if you dont take a snapshot you oversync real bad for your atomic flip. The export use case is unproblematic as far as I can see. Those changes are years in the past. If we have a real problem here (not sure on that yet), then we'll have to figure out how to fix it without nuking uAPI. Well, that was the basic idea of attaching flags to the
Re: [Mesa-dev] [PATCH 0/6] dma-buf: Add an API for exporting sync files (v12)
Am 18.06.21 um 16:31 schrieb Daniel Vetter: [SNIP] And that drivers choose to ignore the exclusive fence is an absolutely no-go from a memory management and security point of view. Exclusive access means exclusive access. Ignoring that won't work. Yeah, this is why I've been going all over the place about lifting ttm_bo->moving to dma_resv. And also that I flat out don't trust your audit, if you havent found these drivers then very clearly you didn't audit much at all :-) I just didn't though that anybody could be so stupid to allow such a thing in. The only thing which saved us so far is the fact that drivers doing this are not that complex. BTW: How does it even work? I mean then you would run into the same problem as amdgpu with its page table update fences, e.g. that your shared fences might signal before the exclusive one. So we don't ignore any fences when we rip out the backing storage. And yes there's currently a bug in all these drivers that if you set both the "ignore implicit fences" and the "set the exclusive fence" flag, then we just break this. Which is why I think we want to have a dma_fence_add_shared_exclusive() helper extracted from your amdgpu code, which we can then use everywhere to plug this. Daniel are you realizing what you are talking about here? Does that also apply for imported DMA-bufs? If yes than that is a security hole you can push an elephant through. Can you point me to the code using that? For dma-buf this isn't actually a problem, because dma-buf are pinned. You can't move them while other drivers are using them, hence there's not actually a ttm_bo->moving fence we can ignore. p2p dma-buf aka dynamic dma-buf is a different beast, and i915 (and fwiw these other drivers) need to change before they can do dynamic dma-buf. Otherwise we have an information leak worth a CVE and that is certainly not something we want. Because yes otherwise we get a CVE. But right now I don't think we have one. Yeah, agree. But this is just because of coincident and not because of good engineering :) Well the good news is that I think we're now talking slightly less past each another than the past few weeks :-) We do have a quite big confusion on what exactly the signaling ordering is supposed to be between exclusive and the collective set of shared fences, and there's some unifying that needs to happen here. But I think what Jason implements here in the import ioctl is the most defensive version possible, so really can't break any driver. It really works like you have an ad-hoc gpu engine that does nothing itself, but waits for the current exclusive fence and then sets the exclusive fence with its "CS" completion fence. That's imo perfectly legit use-case. The use case is certainly legit, but I'm not sure if merging this at the moment is a good idea. Your note that drivers are already ignoring the exclusive fence in the dma_resv object was eye opening to me. And I now have the very strong feeling that the synchronization and the design of the dma_resv object is even more messy then I thought it is. To summarize we can be really lucky that it didn't blow up into our faces already. I don't think there was that much luck involved (ok I did find a possible bug in i915 already around cpu cache flushing) - for SoC the exclusive slot in dma_resv really is only used for implicit sync and nothing else. The fun only starts when you throw in pipelined backing storage movement. I guess this also explains why you just seemed to ignore me when I was asking for a memory management exclusive fence for the p2p stuff, or some other way to specifically handling movements (like ttm_bo->moving or whatever it is). From my pov we clearly needed that to make p2p dma-buf work well enough, mixing up the memory management exclusive slot with the implicit sync exclusive slot never looked like a bright idea to me. I think at least we now have some understanding here. Well to be honest what you have just told me means that i915 is seriously broken. Ignoring the exclusive fence on an imported DMA-buf is an absolutely *NO-GO* even without P2P. What you have stitched together here allows anybody to basically read any memory on the system with both i915 and nouveau, radeon or amdgpu. We need to fix that ASAP! Regards, Christian. Same for the export one. Waiting for a previous snapshot of implicit fences is imo perfectly ok use-case and useful for compositors - client might soon start more rendering, and on some drivers that always results in the exclusive slot being set, so if you dont take a snapshot you oversync real bad for your atomic flip. The export use case is unproblematic as far as I can see. Those changes are years in the past. If we have a real problem here (not sure on that yet), then we'll have to figure out how to fix it without nuking uAPI. Well, that was the basic idea of attaching flags to the fences in the dma_resv object. In other words you clearly deno
