Re: [PATCH 4/5] hw/openrisc: Mark devices as big-endian

2024-11-09 Thread Philippe Mathieu-Daudé

Hi Thomas,

On 9/11/24 06:42, Thomas Huth wrote:

Am Wed,  6 Nov 2024 18:46:11 +
schrieb Philippe Mathieu-Daudé :


These devices are only used by the OpenRISC target, which is
only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BIG_ENDIAN.

Signed-off-by: Philippe Mathieu-Daudé 
---
  hw/openrisc/openrisc_sim.c | 2 +-
  hw/openrisc/virt.c | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)




diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
index 47d2c9bd3c..ede57fe391 100644
--- a/hw/openrisc/virt.c
+++ b/hw/openrisc/virt.c
@@ -236,7 +236,7 @@ static void openrisc_virt_serial_init(OR1KVirtState *state, 
hwaddr base,
  qemu_irq serial_irq = get_per_cpu_irq(cpus, num_cpus, irq_pin);
  
  serial_mm_init(get_system_memory(), base, 0, serial_irq, 115200,

-   serial_hd(0), DEVICE_NATIVE_ENDIAN);
+   serial_hd(0), DEVICE_BIG_ENDIAN);
  
  /* Add device tree node for serial. */

  nodename = g_strdup_printf("/serial@%" HWADDR_PRIx, base);


According to https://openrisc.io/or1k.html the openrisc CPU could be
implemented as little endian, too ... so would it make sense to use
a runtime detected value here instead?


While this patch is a code change, it aims to not introduce any
functional change. We are not building (nor testing) these devices
in a little endian configuration:

$ git grep -l TARGET_BIG_ENDIAN configs/targets/*softmmu*
configs/targets/hppa-softmmu.mak
configs/targets/m68k-softmmu.mak
configs/targets/microblaze-softmmu.mak
configs/targets/mips-softmmu.mak
configs/targets/mips64-softmmu.mak
configs/targets/or1k-softmmu.mak

configs/targets/ppc-softmmu.mak
configs/targets/ppc64-softmmu.mak
configs/targets/s390x-softmmu.mak
configs/targets/sh4eb-softmmu.mak
configs/targets/sparc-softmmu.mak
configs/targets/sparc64-softmmu.mak
configs/targets/xtensaeb-softmmu.mak

$ git grep -L TARGET_BIG_ENDIAN configs/targets/*softmmu*
configs/targets/aarch64-softmmu.mak
configs/targets/alpha-softmmu.mak
configs/targets/arm-softmmu.mak
configs/targets/avr-softmmu.mak
configs/targets/i386-softmmu.mak
configs/targets/loongarch64-softmmu.mak
configs/targets/microblazeel-softmmu.mak
configs/targets/mips64el-softmmu.mak
configs/targets/mipsel-softmmu.mak
configs/targets/riscv32-softmmu.mak
configs/targets/riscv64-softmmu.mak
configs/targets/rx-softmmu.mak
configs/targets/sh4-softmmu.mak
configs/targets/tricore-softmmu.mak
configs/targets/x86_64-softmmu.mak
configs/targets/xtensa-softmmu.mak

(no little-endian config here)

Having little-endian OpenRISC is certainly welcomed, but it
has to be done separately, preferably adding test coverage.

Should I rework the commit description to be more precise?

Regards,

Phil.




[PATCH 3/5] hw/m68k: Mark devices as big-endian

2024-11-06 Thread Philippe Mathieu-Daudé
These devices are only used by the M68K target, which is only
built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BIG_ENDIAN.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/m68k/mcf5206.c  | 2 +-
 hw/m68k/mcf5208.c  | 6 +++---
 hw/m68k/mcf_intc.c | 2 +-
 hw/m68k/next-kbd.c | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index 7247cdbe5e..4892924fc2 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -582,7 +582,7 @@ static const MemoryRegionOps m5206_mbar_ops = {
 .write = m5206_mbar_writefn,
 .valid.min_access_size = 1,
 .valid.max_access_size = 4,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 };
 
 static void mcf5206_mbar_realize(DeviceState *dev, Error **errp)
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index e37cd50d18..4166877066 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -155,7 +155,7 @@ static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
 static const MemoryRegionOps m5208_timer_ops = {
 .read = m5208_timer_read,
 .write = m5208_timer_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 };
 
 static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
@@ -192,7 +192,7 @@ static void m5208_sys_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps m5208_sys_ops = {
 .read = m5208_sys_read,
 .write = m5208_sys_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 };
 
 static uint64_t m5208_rcm_read(void *opaque, hwaddr addr,
@@ -224,7 +224,7 @@ static void m5208_rcm_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps m5208_rcm_ops = {
 .read = m5208_rcm_read,
 .write = m5208_rcm_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 };
 
 static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic,
diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c
index 9fc30b03ba..5f38c49077 100644
--- a/hw/m68k/mcf_intc.c
+++ b/hw/m68k/mcf_intc.c
@@ -166,7 +166,7 @@ static void mcf_intc_reset(DeviceState *dev)
 static const MemoryRegionOps mcf_intc_ops = {
 .read = mcf_intc_read,
 .write = mcf_intc_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 };
 
 static void mcf_intc_instance_init(Object *obj)
diff --git a/hw/m68k/next-kbd.c b/hw/m68k/next-kbd.c
index bc67810f31..4d87edc2de 100644
--- a/hw/m68k/next-kbd.c
+++ b/hw/m68k/next-kbd.c
@@ -163,7 +163,7 @@ static const MemoryRegionOps kbd_ops = {
 .write = kbd_writefn,
 .valid.min_access_size = 1,
 .valid.max_access_size = 4,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 };
 
 static void nextkbd_event(void *opaque, int ch)
-- 
2.45.2




[PATCH 2/5] hw/tricore: Mark devices as little-endian

2024-11-06 Thread Philippe Mathieu-Daudé
These devices are only used by the TriCore target, which is
only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_LITTLE_ENDIAN (besides, the
DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using
DEVICE_LITTLE_ENDIAN.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/tricore/tricore_testdevice.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/tricore/tricore_testdevice.c b/hw/tricore/tricore_testdevice.c
index ae95c49565..169f5907e9 100644
--- a/hw/tricore/tricore_testdevice.c
+++ b/hw/tricore/tricore_testdevice.c
@@ -47,7 +47,7 @@ static const MemoryRegionOps tricore_testdevice_ops = {
 .min_access_size = 4,
 .max_access_size = 4,
 },
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static void tricore_testdevice_init(Object *obj)
-- 
2.45.2




[PATCH 5/5] hw/sparc: Mark devices as big-endian

2024-11-06 Thread Philippe Mathieu-Daudé
These devices are only used by the SPARC targets, which are
only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BIG_ENDIAN.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/sparc/sun4m_iommu.c | 2 +-
 hw/sparc64/sun4u.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c
index 6f765e97e4..4486508e3b 100644
--- a/hw/sparc/sun4m_iommu.c
+++ b/hw/sparc/sun4m_iommu.c
@@ -238,7 +238,7 @@ static void iommu_mem_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps iommu_mem_ops = {
 .read = iommu_mem_read,
 .write = iommu_mem_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 .valid = {
 .min_access_size = 4,
 .max_access_size = 4,
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 541c7f74fa..9d7aebf632 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -254,7 +254,7 @@ static void power_mem_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps power_mem_ops = {
 .read = power_mem_read,
 .write = power_mem_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_BIG_ENDIAN,
 .valid = {
 .min_access_size = 4,
 .max_access_size = 4,
-- 
2.45.2




[PATCH 0/5] hw: Mark architecture specific devices with specific endianness

2024-11-06 Thread Philippe Mathieu-Daudé
When a device is only built for an architecture built for
a particular endianness, we can simplify the device to not
use the "target native endianness" definition and directly
use the proper target endianness.

Philippe Mathieu-Daudé (5):
  hw/i386: Mark devices as little-endian
  hw/tricore: Mark devices as little-endian
  hw/m68k: Mark devices as big-endian
  hw/openrisc: Mark devices as big-endian
  hw/sparc: Mark devices as big-endian

 hw/i386/kvm/apic.c  | 2 +-
 hw/i386/pc.c| 4 ++--
 hw/i386/vapic.c | 2 +-
 hw/i386/xen/xen_apic.c  | 2 +-
 hw/i386/xen/xen_platform.c  | 2 +-
 hw/m68k/mcf5206.c   | 2 +-
 hw/m68k/mcf5208.c   | 6 +++---
 hw/m68k/mcf_intc.c  | 2 +-
 hw/m68k/next-kbd.c  | 2 +-
 hw/openrisc/openrisc_sim.c  | 2 +-
 hw/openrisc/virt.c  | 2 +-
 hw/sparc/sun4m_iommu.c  | 2 +-
 hw/sparc64/sun4u.c  | 2 +-
 hw/tricore/tricore_testdevice.c | 2 +-
 14 files changed, 17 insertions(+), 17 deletions(-)

-- 
2.45.2




[PATCH 4/5] hw/openrisc: Mark devices as big-endian

2024-11-06 Thread Philippe Mathieu-Daudé
These devices are only used by the OpenRISC target, which is
only built as big-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_BIG_ENDIAN (besides, the
DEVICE_LITTLE_ENDIAN case isn't tested). Simplify directly
using DEVICE_BIG_ENDIAN.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/openrisc/openrisc_sim.c | 2 +-
 hw/openrisc/virt.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 9fb63515ef..794c175bdb 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -266,7 +266,7 @@ static void openrisc_sim_serial_init(Or1ksimState *state, 
hwaddr base,
 }
 serial_mm_init(get_system_memory(), base, 0, serial_irq, 115200,
serial_hd(OR1KSIM_UART_COUNT - uart_idx - 1),
-   DEVICE_NATIVE_ENDIAN);
+   DEVICE_BIG_ENDIAN);
 
 /* Add device tree node for serial. */
 nodename = g_strdup_printf("/serial@%" HWADDR_PRIx, base);
diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
index 47d2c9bd3c..ede57fe391 100644
--- a/hw/openrisc/virt.c
+++ b/hw/openrisc/virt.c
@@ -236,7 +236,7 @@ static void openrisc_virt_serial_init(OR1KVirtState *state, 
hwaddr base,
 qemu_irq serial_irq = get_per_cpu_irq(cpus, num_cpus, irq_pin);
 
 serial_mm_init(get_system_memory(), base, 0, serial_irq, 115200,
-   serial_hd(0), DEVICE_NATIVE_ENDIAN);
+   serial_hd(0), DEVICE_BIG_ENDIAN);
 
 /* Add device tree node for serial. */
 nodename = g_strdup_printf("/serial@%" HWADDR_PRIx, base);
-- 
2.45.2




[PATCH 1/5] hw/i386: Mark devices as little-endian

2024-11-06 Thread Philippe Mathieu-Daudé
These devices are only used by the X86 targets, which are only
built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_LITTLE_ENDIAN (besides, the
DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using
DEVICE_LITTLE_ENDIAN.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/kvm/apic.c | 2 +-
 hw/i386/pc.c   | 4 ++--
 hw/i386/vapic.c| 2 +-
 hw/i386/xen/xen_apic.c | 2 +-
 hw/i386/xen/xen_platform.c | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/hw/i386/kvm/apic.c b/hw/i386/kvm/apic.c
index a72c28e8a7..3a5d69e8d0 100644
--- a/hw/i386/kvm/apic.c
+++ b/hw/i386/kvm/apic.c
@@ -214,7 +214,7 @@ static void kvm_apic_mem_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps kvm_apic_io_ops = {
 .read = kvm_apic_mem_read,
 .write = kvm_apic_mem_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static void kvm_apic_reset(APICCommonState *s)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 830614d930..2259589e0d 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1064,7 +1064,7 @@ DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus)
 static const MemoryRegionOps ioport80_io_ops = {
 .write = ioport80_write,
 .read = ioport80_read,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 .impl = {
 .min_access_size = 1,
 .max_access_size = 1,
@@ -1074,7 +1074,7 @@ static const MemoryRegionOps ioport80_io_ops = {
 static const MemoryRegionOps ioportF0_io_ops = {
 .write = ioportF0_write,
 .read = ioportF0_read,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 .impl = {
 .min_access_size = 1,
 .max_access_size = 1,
diff --git a/hw/i386/vapic.c b/hw/i386/vapic.c
index ef7f8b967f..fd906fdf78 100644
--- a/hw/i386/vapic.c
+++ b/hw/i386/vapic.c
@@ -718,7 +718,7 @@ static uint64_t vapic_read(void *opaque, hwaddr addr, 
unsigned size)
 static const MemoryRegionOps vapic_ops = {
 .write = vapic_write,
 .read = vapic_read,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static void vapic_realize(DeviceState *dev, Error **errp)
diff --git a/hw/i386/xen/xen_apic.c b/hw/i386/xen/xen_apic.c
index 101e16a766..a94e9005cb 100644
--- a/hw/i386/xen/xen_apic.c
+++ b/hw/i386/xen/xen_apic.c
@@ -36,7 +36,7 @@ static void xen_apic_mem_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps xen_apic_io_ops = {
 .read = xen_apic_mem_read,
 .write = xen_apic_mem_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static void xen_apic_realize(DeviceState *dev, Error **errp)
diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c
index ec0e536e85..3b3e745822 100644
--- a/hw/i386/xen/xen_platform.c
+++ b/hw/i386/xen/xen_platform.c
@@ -514,7 +514,7 @@ static void platform_mmio_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps platform_mmio_handler = {
 .read = &platform_mmio_read,
 .write = &platform_mmio_write,
-.endianness = DEVICE_NATIVE_ENDIAN,
+.endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 static void platform_mmio_setup(PCIXenPlatformState *d)
-- 
2.45.2




Re: [PATCH v3 0/3] stdvga: fix screen blanking

2024-06-18 Thread Philippe Mathieu-Daudé

On 5/6/24 15:14, Gerd Hoffmann wrote:


Gerd Hoffmann (3):
   stdvga: fix screen blanking
   ui+display: rename is_placeholder() -> surface_is_placeholder()
   ui+display: rename is_buffer_shared() -> surface_is_allocated()


Since Marc-André reviewed, I'm queuing this series, thanks!



Re: [PATCH v3 2/3] ui+display: rename is_placeholder() -> surface_is_placeholder()

2024-06-18 Thread Philippe Mathieu-Daudé

On 5/6/24 15:14, Gerd Hoffmann wrote:

No functional change.

Signed-off-by: Gerd Hoffmann 
---
  include/ui/surface.h | 2 +-
  ui/console.c | 2 +-
  ui/sdl2-2d.c | 2 +-
  ui/sdl2-gl.c | 2 +-
  4 files changed, 4 insertions(+), 4 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v8 1/8] xen: mapcache: Make MCACHE_BUCKET_SHIFT runtime configurable

2024-06-03 Thread Philippe Mathieu-Daudé

On 29/5/24 16:07, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Make MCACHE_BUCKET_SHIFT runtime configurable per cache instance.

Signed-off-by: Edgar E. Iglesias 
Reviewed-by: Stefano Stabellini 
---
  hw/xen/xen-mapcache.c | 54 ++-
  1 file changed, 33 insertions(+), 21 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v2 0/7] hw/xen: Simplify legacy backends handling

2024-06-03 Thread Philippe Mathieu-Daudé

On 10/5/24 12:49, Philippe Mathieu-Daudé wrote:

Respin of Paolo's Xen patches from
https://lore.kernel.org/qemu-devel/20240509170044.190795-1-pbonz...@redhat.com/
rebased on one of my cleanup branches making backend
structures const. Treat xenfb as other backends.

Paolo Bonzini (2):
   hw/xen: initialize legacy backends from xen_bus_init()
   hw/xen: register legacy backends via xen_backend_init

Philippe Mathieu-Daudé (5):
   hw/xen: Remove declarations left over in 'xen-legacy-backend.h'
   hw/xen: Constify XenLegacyDevice::XenDevOps
   hw/xen: Constify xenstore_be::XenDevOps
   hw/xen: Make XenDevOps structures const
   hw/xen: Register framebuffer backend via xen_backend_init()


Thanks Paul for the review, unfortunately Paulo missed this and
merged v1 as single commit 88f5ed7017 ("xen: register legacy
backends via xen_backend_init") :(

Regards,

Phil.




Re: [PATCH v2 0/7] hw/xen: Simplify legacy backends handling

2024-05-28 Thread Philippe Mathieu-Daudé

ping?

On 10/5/24 12:49, Philippe Mathieu-Daudé wrote:

Respin of Paolo's Xen patches from
https://lore.kernel.org/qemu-devel/20240509170044.190795-1-pbonz...@redhat.com/
rebased on one of my cleanup branches making backend
structures const. Treat xenfb as other backends.

Paolo Bonzini (2):
   hw/xen: initialize legacy backends from xen_bus_init()
   hw/xen: register legacy backends via xen_backend_init

Philippe Mathieu-Daudé (5):
   hw/xen: Remove declarations left over in 'xen-legacy-backend.h'
   hw/xen: Constify XenLegacyDevice::XenDevOps
   hw/xen: Constify xenstore_be::XenDevOps
   hw/xen: Make XenDevOps structures const
   hw/xen: Register framebuffer backend via xen_backend_init()

  include/hw/xen/xen-legacy-backend.h | 15 +--
  include/hw/xen/xen_pvdev.h  |  3 +--
  hw/9pfs/xen-9p-backend.c|  8 +++-
  hw/display/xenfb.c  | 15 +--
  hw/i386/pc.c|  1 -
  hw/usb/xen-usb.c| 14 --
  hw/xen/xen-bus.c|  4 
  hw/xen/xen-hvm-common.c |  2 --
  hw/xen/xen-legacy-backend.c | 24 
  hw/xenpv/xen_machine_pv.c   |  7 +--
  10 files changed, 35 insertions(+), 58 deletions(-)






Re: [PATCH v7 3/8] xen: Add xen_mr_is_memory()

2024-05-27 Thread Philippe Mathieu-Daudé

Hi Edgar,

On 24/5/24 12:51, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Add xen_mr_is_memory() to abstract away tests for the
xen_memory MR.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
Reviewed-by: Stefano Stabellini 
Acked-by: David Hildenbrand 
---
  hw/xen/xen-hvm-common.c | 10 --
  include/sysemu/xen.h|  8 
  2 files changed, 16 insertions(+), 2 deletions(-)


To consolidate we could add:

  static MemoryRegion xen_memory;

  MemoryRegion *xen_mr_memory_init(uint64_t block_len)
  {
 assert(!xen_memory.size);
 memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len, 
&error_fatal);

 return &xen_memory;
  }

and remove the extern declaration.


diff --git a/include/sysemu/xen.h b/include/sysemu/xen.h
index 754ec2e6cb..dc72f83bcb 100644
--- a/include/sysemu/xen.h
+++ b/include/sysemu/xen.h
@@ -34,6 +34,8 @@ void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t 
length);
  void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size,
 struct MemoryRegion *mr, Error **errp);
  
+bool xen_mr_is_memory(MemoryRegion *mr);

+
  #else /* !CONFIG_XEN_IS_POSSIBLE */
  
  #define xen_enabled() 0

@@ -47,6 +49,12 @@ static inline void xen_ram_alloc(ram_addr_t ram_addr, 
ram_addr_t size,
  g_assert_not_reached();
  }
  
+static inline bool xen_mr_is_memory(MemoryRegion *mr)

+{
+g_assert_not_reached();
+return false;


No need for the stub, just always declare xen_mr_is_memory() ...

+}
+
  #endif /* CONFIG_XEN_IS_POSSIBLE */


... here.


  #endif


Removing the stub:
Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v7 6/8] xen: mapcache: Pass the ram_addr offset to xen_map_cache()

2024-05-27 Thread Philippe Mathieu-Daudé

On 24/5/24 12:51, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Pass the ram_addr offset to xen_map_cache.
This is in preparation for adding grant mappings that need
to compute the address within the RAMBlock.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
Reviewed-by: David Hildenbrand 
Reviewed-by: Stefano Stabellini 
---
  hw/xen/xen-mapcache.c | 16 +++-
  include/sysemu/xen-mapcache.h |  2 ++
  system/physmem.c  |  9 +
  3 files changed, 18 insertions(+), 9 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v2 6/7] hw/xen: register legacy backends via xen_backend_init

2024-05-10 Thread Philippe Mathieu-Daudé

On 10/5/24 12:49, Philippe Mathieu-Daudé wrote:

From: Paolo Bonzini 

It is okay to register legacy backends in the middle of xen_bus_init().
All that the registration does is record the existence of the backend
in xenstore.

This makes it possible to remove them from the build without introducing
undefined symbols in xen_be_init().  It also removes the need for the
backend_register callback, whose only purpose is to avoid registering
nonfunctional backends.

Signed-off-by: Paolo Bonzini 
Message-ID: <20240509170044.190795-8-pbonz...@redhat.com>


Reviewed-by: Philippe Mathieu-Daudé 


Signed-off-by: Philippe Mathieu-Daudé 
---
  include/hw/xen/xen-legacy-backend.h | 11 ++-
  include/hw/xen/xen_pvdev.h  |  1 -
  hw/9pfs/xen-9p-backend.c|  8 +++-
  hw/display/xenfb.c  |  8 +++-
  hw/usb/xen-usb.c| 14 --
  hw/xen/xen-legacy-backend.c | 16 
  6 files changed, 20 insertions(+), 38 deletions(-)






[PATCH v2 7/7] hw/xen: Register framebuffer backend via xen_backend_init()

2024-05-10 Thread Philippe Mathieu-Daudé
Align the framebuffer backend with the other legacy ones,
register it via xen_backend_init() when '-vga xenfb' is
used. It is safe because MODULE_INIT_XEN_BACKEND is called
in xen_bus_realize(), long after CLI processing initialized
the vga_interface_type variable.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/xen/xen-legacy-backend.h | 3 ---
 hw/display/xenfb.c  | 9 +++--
 hw/xenpv/xen_machine_pv.c   | 2 --
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/hw/xen/xen-legacy-backend.h 
b/include/hw/xen/xen-legacy-backend.h
index e55a14057f..943732b8d1 100644
--- a/include/hw/xen/xen-legacy-backend.h
+++ b/include/hw/xen/xen-legacy-backend.h
@@ -66,9 +66,6 @@ static inline void xen_be_unmap_grant_ref(struct 
XenLegacyDevice *xendev,
 return xen_be_unmap_grant_refs(xendev, ptr, &ref, 1);
 }
 
-/* backend drivers not included in all machines */
-extern const struct XenDevOps xen_framebuffer_ops;  /* xenfb.c */
-
 /* configuration (aka xenbus setup) */
 void xen_config_cleanup(void);
 int xen_config_dev_vfb(int vdev, const char *type);
diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c
index b6d370bdf6..ff442ced1a 100644
--- a/hw/display/xenfb.c
+++ b/hw/display/xenfb.c
@@ -29,6 +29,7 @@
 
 #include "ui/input.h"
 #include "ui/console.h"
+#include "sysemu/sysemu.h"
 #include "hw/xen/xen-legacy-backend.h"
 
 #include "hw/xen/interface/io/fbif.h"
@@ -996,8 +997,12 @@ static const GraphicHwOps xenfb_ops = {
 .ui_info = xenfb_ui_info,
 };
 
-static void xen_vkbd_register_backend(void)
+static void xen_ui_register_backend(void)
 {
 xen_be_register("vkbd", &xen_kbdmouse_ops);
+
+if (vga_interface_type == VGA_XENFB) {
+xen_be_register("vfb", &xen_framebuffer_ops);
+}
 }
-xen_backend_init(xen_vkbd_register_backend);
+xen_backend_init(xen_ui_register_backend);
diff --git a/hw/xenpv/xen_machine_pv.c b/hw/xenpv/xen_machine_pv.c
index b500ce0989..24395f42cb 100644
--- a/hw/xenpv/xen_machine_pv.c
+++ b/hw/xenpv/xen_machine_pv.c
@@ -50,8 +50,6 @@ static void xen_init_pv(MachineState *machine)
 break;
 }
 
-xen_be_register("vfb", &xen_framebuffer_ops);
-
 /* configure framebuffer */
 if (vga_interface_type == VGA_XENFB) {
 xen_config_dev_vfb(0, "vnc");
-- 
2.41.0




[PATCH v2 6/7] hw/xen: register legacy backends via xen_backend_init

2024-05-10 Thread Philippe Mathieu-Daudé
From: Paolo Bonzini 

It is okay to register legacy backends in the middle of xen_bus_init().
All that the registration does is record the existence of the backend
in xenstore.

This makes it possible to remove them from the build without introducing
undefined symbols in xen_be_init().  It also removes the need for the
backend_register callback, whose only purpose is to avoid registering
nonfunctional backends.

Signed-off-by: Paolo Bonzini 
Message-ID: <20240509170044.190795-8-pbonz...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/xen/xen-legacy-backend.h | 11 ++-
 include/hw/xen/xen_pvdev.h  |  1 -
 hw/9pfs/xen-9p-backend.c|  8 +++-
 hw/display/xenfb.c  |  8 +++-
 hw/usb/xen-usb.c| 14 --
 hw/xen/xen-legacy-backend.c | 16 
 6 files changed, 20 insertions(+), 38 deletions(-)

diff --git a/include/hw/xen/xen-legacy-backend.h 
b/include/hw/xen/xen-legacy-backend.h
index cfa43a984a..e55a14057f 100644
--- a/include/hw/xen/xen-legacy-backend.h
+++ b/include/hw/xen/xen-legacy-backend.h
@@ -66,15 +66,8 @@ static inline void xen_be_unmap_grant_ref(struct 
XenLegacyDevice *xendev,
 return xen_be_unmap_grant_refs(xendev, ptr, &ref, 1);
 }
 
-/* actual backend drivers */
-extern const struct XenDevOps xen_kbdmouse_ops; /* xen_framebuffer.c */
-extern const struct XenDevOps xen_framebuffer_ops;  /* xen_framebuffer.c */
-#ifdef CONFIG_VIRTFS
-extern const struct XenDevOps xen_9pfs_ops; /* xen-9p-backend.c  */
-#endif
-#ifdef CONFIG_USB_LIBUSB
-extern const struct XenDevOps xen_usb_ops;  /* xen-usb.c */
-#endif
+/* backend drivers not included in all machines */
+extern const struct XenDevOps xen_framebuffer_ops;  /* xenfb.c */
 
 /* configuration (aka xenbus setup) */
 void xen_config_cleanup(void);
diff --git a/include/hw/xen/xen_pvdev.h b/include/hw/xen/xen_pvdev.h
index fd9a33e6ab..0c98444047 100644
--- a/include/hw/xen/xen_pvdev.h
+++ b/include/hw/xen/xen_pvdev.h
@@ -29,7 +29,6 @@ struct XenDevOps {
  const char *node);
 void  (*frontend_changed)(struct XenLegacyDevice *xendev,
   const char *node);
-int   (*backend_register)(void);
 };
 
 struct XenLegacyDevice {
diff --git a/hw/9pfs/xen-9p-backend.c b/hw/9pfs/xen-9p-backend.c
index b1780eb819..79359d911a 100644
--- a/hw/9pfs/xen-9p-backend.c
+++ b/hw/9pfs/xen-9p-backend.c
@@ -513,7 +513,7 @@ static void xen_9pfs_alloc(struct XenLegacyDevice *xendev)
 xenstore_write_be_int(xendev, "max-ring-page-order", MAX_RING_ORDER);
 }
 
-const struct XenDevOps xen_9pfs_ops = {
+static const struct XenDevOps xen_9pfs_ops = {
 .size   = sizeof(Xen9pfsDev),
 .flags  = DEVOPS_FLAG_NEED_GNTDEV,
 .alloc  = xen_9pfs_alloc,
@@ -522,3 +522,9 @@ const struct XenDevOps xen_9pfs_ops = {
 .disconnect = xen_9pfs_disconnect,
 .free   = xen_9pfs_free,
 };
+
+static void xen_9pfs_register_backend(void)
+{
+xen_be_register("9pfs", &xen_9pfs_ops);
+}
+xen_backend_init(xen_9pfs_register_backend);
diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c
index dd83d0f5a5..b6d370bdf6 100644
--- a/hw/display/xenfb.c
+++ b/hw/display/xenfb.c
@@ -972,7 +972,7 @@ static void fb_event(struct XenLegacyDevice *xendev)
 
 /*  */
 
-const struct XenDevOps xen_kbdmouse_ops = {
+static const struct XenDevOps xen_kbdmouse_ops = {
 .size   = sizeof(struct XenInput),
 .init   = input_init,
 .initialise = input_initialise,
@@ -995,3 +995,9 @@ static const GraphicHwOps xenfb_ops = {
 .gfx_update  = xenfb_update,
 .ui_info = xenfb_ui_info,
 };
+
+static void xen_vkbd_register_backend(void)
+{
+xen_be_register("vkbd", &xen_kbdmouse_ops);
+}
+xen_backend_init(xen_vkbd_register_backend);
diff --git a/hw/usb/xen-usb.c b/hw/usb/xen-usb.c
index 95a901e81f..13901625c0 100644
--- a/hw/usb/xen-usb.c
+++ b/hw/usb/xen-usb.c
@@ -1083,7 +1083,7 @@ static void usbback_event(struct XenLegacyDevice *xendev)
 qemu_bh_schedule(usbif->bh);
 }
 
-const struct XenDevOps xen_usb_ops = {
+static const struct XenDevOps xen_usb_ops = {
 .size= sizeof(struct usbback_info),
 .flags   = DEVOPS_FLAG_NEED_GNTDEV,
 .init= usbback_init,
@@ -1095,15 +1095,9 @@ const struct XenDevOps xen_usb_ops = {
 .event   = usbback_event,
 };
 
-#else /* USBIF_SHORT_NOT_OK */
-
-static int usbback_not_supported(void)
+static void xen_usb_register_backend(void)
 {
-return -EINVAL;
+xen_be_register("qusb", &xen_usb_ops);
 }
-
-const struct XenDevOps xen_usb_ops = {
-.backend_register = usbback_not_supported,
-};
-
+xen_backend_init(xen_usb_register_backend);
 #endif
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
index 4dc3a56

[PATCH v2 5/7] hw/xen: initialize legacy backends from xen_bus_init()

2024-05-10 Thread Philippe Mathieu-Daudé
From: Paolo Bonzini 

Prepare for moving the calls to xen_be_register() under the
control of xen_bus_init(), using the normal xen_backend_init()
method that is used by the "modern" backends.

This requires the xenstore global variable to be initialized,
which is done by xen_be_init().  To ensure that everything is
ready at the time the xen_backend_init() functions are called,
remove the xen_be_init() function from all the boards and
place it directly in xen_bus_init().

Signed-off-by: Paolo Bonzini 
Reviewed-by: Philippe Mathieu-Daudé 
Message-ID: <20240509170044.190795-7-pbonz...@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c  | 1 -
 hw/xen/xen-bus.c  | 4 
 hw/xen/xen-hvm-common.c   | 2 --
 hw/xenpv/xen_machine_pv.c | 5 +
 4 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 505ea750f4..19f21953b4 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1250,7 +1250,6 @@ void pc_basic_device_init(struct PCMachineState *pcms,
 pci_create_simple(pcms->pcibus, -1, "xen-platform");
 }
 xen_bus_init();
-xen_be_init();
 }
 #endif
 
diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c
index fb82cc33e4..95b207ac8b 100644
--- a/hw/xen/xen-bus.c
+++ b/hw/xen/xen-bus.c
@@ -13,6 +13,7 @@
 #include "hw/sysbus.h"
 #include "hw/xen/xen.h"
 #include "hw/xen/xen-backend.h"
+#include "hw/xen/xen-legacy-backend.h" /* xen_be_init() */
 #include "hw/xen/xen-bus.h"
 #include "hw/xen/xen-bus-helper.h"
 #include "monitor/monitor.h"
@@ -329,6 +330,9 @@ static void xen_bus_realize(BusState *bus, Error **errp)
 goto fail;
 }
 
+/* Initialize legacy backend core & drivers */
+xen_be_init();
+
 if (xs_node_scanf(xenbus->xsh, XBT_NULL, "", /* domain root node */
   "domid", NULL, "%u", &domid) == 1) {
 xenbus->backend_id = domid;
diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c
index 1627da7398..2d1b032121 100644
--- a/hw/xen/xen-hvm-common.c
+++ b/hw/xen/xen-hvm-common.c
@@ -872,8 +872,6 @@ void xen_register_ioreq(XenIOState *state, unsigned int 
max_cpus,
 
 xen_bus_init();
 
-xen_be_init();
-
 return;
 
 err:
diff --git a/hw/xenpv/xen_machine_pv.c b/hw/xenpv/xen_machine_pv.c
index 1130d1a147..b500ce0989 100644
--- a/hw/xenpv/xen_machine_pv.c
+++ b/hw/xenpv/xen_machine_pv.c
@@ -34,8 +34,7 @@ static void xen_init_pv(MachineState *machine)
 {
 setup_xen_backend_ops();
 
-/* Initialize backend core & drivers */
-xen_be_init();
+xen_bus_init();
 
 switch (xen_mode) {
 case XEN_ATTACH:
@@ -60,8 +59,6 @@ static void xen_init_pv(MachineState *machine)
 vga_interface_created = true;
 }
 
-xen_bus_init();
-
 /* config cleanup hook */
 atexit(xen_config_cleanup);
 }
-- 
2.41.0




[PATCH v2 1/7] hw/xen: Remove declarations left over in 'xen-legacy-backend.h'

2024-05-10 Thread Philippe Mathieu-Daudé
'xen_blkdev_ops' was removed in commit 19f87870ba ("xen: remove
the legacy 'xen_disk' backend"), 'xen_netdev_ops' in commit
25967ff69f ("hw/xen: update Xen PV NIC to XenDevice model") and
'xen_console_ops' in commit 9b77374690 ("hw/xen: update Xen
console to XenDevice model"). Remove them.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/xen/xen-legacy-backend.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/include/hw/xen/xen-legacy-backend.h 
b/include/hw/xen/xen-legacy-backend.h
index 2cca174778..eb22633caa 100644
--- a/include/hw/xen/xen-legacy-backend.h
+++ b/include/hw/xen/xen-legacy-backend.h
@@ -67,14 +67,11 @@ static inline void xen_be_unmap_grant_ref(struct 
XenLegacyDevice *xendev,
 }
 
 /* actual backend drivers */
-extern struct XenDevOps xen_console_ops;  /* xen_console.c */
 extern struct XenDevOps xen_kbdmouse_ops; /* xen_framebuffer.c */
 extern struct XenDevOps xen_framebuffer_ops;  /* xen_framebuffer.c */
-extern struct XenDevOps xen_blkdev_ops;   /* xen_disk.c*/
 #ifdef CONFIG_VIRTFS
 extern struct XenDevOps xen_9pfs_ops;   /* xen-9p-backend.c*/
 #endif
-extern struct XenDevOps xen_netdev_ops;   /* xen_nic.c */
 #ifdef CONFIG_USB_LIBUSB
 extern struct XenDevOps xen_usb_ops;  /* xen-usb.c */
 #endif
-- 
2.41.0




[PATCH v2 4/7] hw/xen: Make XenDevOps structures const

2024-05-10 Thread Philippe Mathieu-Daudé
Keep XenDevOps structures in .rodata.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/xen/xen-legacy-backend.h | 8 
 hw/9pfs/xen-9p-backend.c| 2 +-
 hw/display/xenfb.c  | 4 ++--
 hw/usb/xen-usb.c| 4 ++--
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/hw/xen/xen-legacy-backend.h 
b/include/hw/xen/xen-legacy-backend.h
index 2b2e43c7e7..cfa43a984a 100644
--- a/include/hw/xen/xen-legacy-backend.h
+++ b/include/hw/xen/xen-legacy-backend.h
@@ -67,13 +67,13 @@ static inline void xen_be_unmap_grant_ref(struct 
XenLegacyDevice *xendev,
 }
 
 /* actual backend drivers */
-extern struct XenDevOps xen_kbdmouse_ops; /* xen_framebuffer.c */
-extern struct XenDevOps xen_framebuffer_ops;  /* xen_framebuffer.c */
+extern const struct XenDevOps xen_kbdmouse_ops; /* xen_framebuffer.c */
+extern const struct XenDevOps xen_framebuffer_ops;  /* xen_framebuffer.c */
 #ifdef CONFIG_VIRTFS
-extern struct XenDevOps xen_9pfs_ops;   /* xen-9p-backend.c*/
+extern const struct XenDevOps xen_9pfs_ops; /* xen-9p-backend.c  */
 #endif
 #ifdef CONFIG_USB_LIBUSB
-extern struct XenDevOps xen_usb_ops;  /* xen-usb.c */
+extern const struct XenDevOps xen_usb_ops;  /* xen-usb.c */
 #endif
 
 /* configuration (aka xenbus setup) */
diff --git a/hw/9pfs/xen-9p-backend.c b/hw/9pfs/xen-9p-backend.c
index 4aa9c8c736..b1780eb819 100644
--- a/hw/9pfs/xen-9p-backend.c
+++ b/hw/9pfs/xen-9p-backend.c
@@ -513,7 +513,7 @@ static void xen_9pfs_alloc(struct XenLegacyDevice *xendev)
 xenstore_write_be_int(xendev, "max-ring-page-order", MAX_RING_ORDER);
 }
 
-struct XenDevOps xen_9pfs_ops = {
+const struct XenDevOps xen_9pfs_ops = {
 .size   = sizeof(Xen9pfsDev),
 .flags  = DEVOPS_FLAG_NEED_GNTDEV,
 .alloc  = xen_9pfs_alloc,
diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c
index b2130a0d70..dd83d0f5a5 100644
--- a/hw/display/xenfb.c
+++ b/hw/display/xenfb.c
@@ -972,7 +972,7 @@ static void fb_event(struct XenLegacyDevice *xendev)
 
 /*  */
 
-struct XenDevOps xen_kbdmouse_ops = {
+const struct XenDevOps xen_kbdmouse_ops = {
 .size   = sizeof(struct XenInput),
 .init   = input_init,
 .initialise = input_initialise,
@@ -981,7 +981,7 @@ struct XenDevOps xen_kbdmouse_ops = {
 .event  = input_event,
 };
 
-struct XenDevOps xen_framebuffer_ops = {
+const struct XenDevOps xen_framebuffer_ops = {
 .size   = sizeof(struct XenFB),
 .init   = fb_init,
 .initialise = fb_initialise,
diff --git a/hw/usb/xen-usb.c b/hw/usb/xen-usb.c
index 09ec326aea..95a901e81f 100644
--- a/hw/usb/xen-usb.c
+++ b/hw/usb/xen-usb.c
@@ -1083,7 +1083,7 @@ static void usbback_event(struct XenLegacyDevice *xendev)
 qemu_bh_schedule(usbif->bh);
 }
 
-struct XenDevOps xen_usb_ops = {
+const struct XenDevOps xen_usb_ops = {
 .size= sizeof(struct usbback_info),
 .flags   = DEVOPS_FLAG_NEED_GNTDEV,
 .init= usbback_init,
@@ -1102,7 +1102,7 @@ static int usbback_not_supported(void)
 return -EINVAL;
 }
 
-struct XenDevOps xen_usb_ops = {
+const struct XenDevOps xen_usb_ops = {
 .backend_register = usbback_not_supported,
 };
 
-- 
2.41.0




[PATCH v2 3/7] hw/xen: Constify xenstore_be::XenDevOps

2024-05-10 Thread Philippe Mathieu-Daudé
XenDevOps @ops is not updated, mark it const.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/xen/xen-legacy-backend.h | 2 +-
 hw/xen/xen-legacy-backend.c | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/hw/xen/xen-legacy-backend.h 
b/include/hw/xen/xen-legacy-backend.h
index eb22633caa..2b2e43c7e7 100644
--- a/include/hw/xen/xen-legacy-backend.h
+++ b/include/hw/xen/xen-legacy-backend.h
@@ -40,7 +40,7 @@ void xen_be_check_state(struct XenLegacyDevice *xendev);
 
 /* xen backend driver bits */
 void xen_be_init(void);
-int xen_be_register(const char *type, struct XenDevOps *ops);
+int xen_be_register(const char *type, const struct XenDevOps *ops);
 int xen_be_set_state(struct XenLegacyDevice *xendev, enum xenbus_state state);
 int xen_be_bind_evtchn(struct XenLegacyDevice *xendev);
 void xen_be_set_max_grant_refs(struct XenLegacyDevice *xendev,
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
index 35f2b57560..4dc3a561cf 100644
--- a/hw/xen/xen-legacy-backend.c
+++ b/hw/xen/xen-legacy-backend.c
@@ -520,7 +520,7 @@ void xen_be_check_state(struct XenLegacyDevice *xendev)
 struct xenstore_be {
 const char *type;
 int dom;
-struct XenDevOps *ops;
+const struct XenDevOps *ops;
 };
 
 static void xenstore_update_be(void *opaque, const char *watch)
@@ -557,7 +557,7 @@ static void xenstore_update_be(void *opaque, const char 
*watch)
 }
 }
 
-static int xenstore_scan(const char *type, int dom, struct XenDevOps *ops)
+static int xenstore_scan(const char *type, int dom, const struct XenDevOps 
*ops)
 {
 struct XenLegacyDevice *xendev;
 char path[XEN_BUFSIZE];
@@ -632,7 +632,7 @@ void xen_be_init(void)
 #endif
 }
 
-int xen_be_register(const char *type, struct XenDevOps *ops)
+int xen_be_register(const char *type, const struct XenDevOps *ops)
 {
 char path[50];
 int rc;
-- 
2.41.0




[PATCH v2 2/7] hw/xen: Constify XenLegacyDevice::XenDevOps

2024-05-10 Thread Philippe Mathieu-Daudé
XenDevOps @ops is not updated, mark it const.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/xen/xen_pvdev.h  | 2 +-
 hw/xen/xen-legacy-backend.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/hw/xen/xen_pvdev.h b/include/hw/xen/xen_pvdev.h
index ddad4b9f36..fd9a33e6ab 100644
--- a/include/hw/xen/xen_pvdev.h
+++ b/include/hw/xen/xen_pvdev.h
@@ -53,7 +53,7 @@ struct XenLegacyDevice {
 xenevtchn_handle   *evtchndev;
 xengnttab_handle   *gnttabdev;
 
-struct XenDevOps   *ops;
+const struct XenDevOps *ops;
 QTAILQ_ENTRY(XenLegacyDevice) next;
 };
 
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
index 124dd5f3d6..35f2b57560 100644
--- a/hw/xen/xen-legacy-backend.c
+++ b/hw/xen/xen-legacy-backend.c
@@ -170,7 +170,7 @@ int xen_be_copy_grant_refs(struct XenLegacyDevice *xendev,
  */
 static struct XenLegacyDevice *xen_be_get_xendev(const char *type, int dom,
  int dev,
- struct XenDevOps *ops)
+ const struct XenDevOps *ops)
 {
 struct XenLegacyDevice *xendev;
 
-- 
2.41.0




[PATCH v2 0/7] hw/xen: Simplify legacy backends handling

2024-05-10 Thread Philippe Mathieu-Daudé
Respin of Paolo's Xen patches from
https://lore.kernel.org/qemu-devel/20240509170044.190795-1-pbonz...@redhat.com/
rebased on one of my cleanup branches making backend
structures const. Treat xenfb as other backends.

Paolo Bonzini (2):
  hw/xen: initialize legacy backends from xen_bus_init()
  hw/xen: register legacy backends via xen_backend_init

Philippe Mathieu-Daudé (5):
  hw/xen: Remove declarations left over in 'xen-legacy-backend.h'
  hw/xen: Constify XenLegacyDevice::XenDevOps
  hw/xen: Constify xenstore_be::XenDevOps
  hw/xen: Make XenDevOps structures const
  hw/xen: Register framebuffer backend via xen_backend_init()

 include/hw/xen/xen-legacy-backend.h | 15 +--
 include/hw/xen/xen_pvdev.h  |  3 +--
 hw/9pfs/xen-9p-backend.c|  8 +++-
 hw/display/xenfb.c  | 15 +--
 hw/i386/pc.c|  1 -
 hw/usb/xen-usb.c| 14 --
 hw/xen/xen-bus.c|  4 
 hw/xen/xen-hvm-common.c |  2 --
 hw/xen/xen-legacy-backend.c | 24 
 hw/xenpv/xen_machine_pv.c   |  7 +--
 10 files changed, 35 insertions(+), 58 deletions(-)

-- 
2.41.0




Re: [PATCH v4 06/17] xen: mapcache: Break out xen_ram_addr_from_mapcache_single

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Break out xen_ram_addr_from_mapcache_single(), a multi-cache
aware version of xen_ram_addr_from_mapcache.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 17 +++--
  1 file changed, 11 insertions(+), 6 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 09/17] xen: mapcache: Break out xen_invalidate_map_cache_single()

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Break out xen_invalidate_map_cache_single().

No functional changes.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 25 +++--
  1 file changed, 15 insertions(+), 10 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 07/17] xen: mapcache: Refactor xen_replace_cache_entry_unlocked

2024-05-06 Thread Philippe Mathieu-Daudé

On 2/5/24 08:32, Edgar E. Iglesias wrote:

On Wed, May 1, 2024 at 10:46 PM Stefano Stabellini
 wrote:


On Tue, 30 Apr 2024, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Add MapCache argument to xen_replace_cache_entry_unlocked in
preparation for supporting multiple map caches.

No functional change.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 8 +---
  1 file changed, 5 insertions(+), 3 deletions(-)




-static uint8_t *xen_replace_cache_entry_unlocked(hwaddr old_phys_addr,
+static uint8_t *xen_replace_cache_entry_unlocked(MapCache *mc,
+ hwaddr old_phys_addr,
   hwaddr new_phys_addr,
   hwaddr size)
  {
@@ -578,7 +579,7 @@ static uint8_t *xen_replace_cache_entry_unlocked(hwaddr 
old_phys_addr,
  cache_size += MCACHE_BUCKET_SIZE - (cache_size % MCACHE_BUCKET_SIZE);
  }

-entry = &mapcache->entry[address_index % mapcache->nr_buckets];
+entry = &mc->entry[address_index % mc->nr_buckets];
  while (entry && !(entry->paddr_index == address_index &&
entry->size == cache_size)) {
  entry = entry->next;


There is still a global mapcache pointer in use in this function:

   xen_remap_bucket(mapcache, entry, entry->vaddr_base,




Thanks! I had accidentally put the change to use mc in future patches.
Will fix in v5.


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 14/17] xen: Add xen_mr_is_memory()

2024-05-06 Thread Philippe Mathieu-Daudé

On 2/5/24 09:26, David Hildenbrand wrote:

On 30.04.24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Add xen_mr_is_memory() to abstract away tests for the
xen_memory MR.

Signed-off-by: Edgar E. Iglesias 
---


[...]


  #endif
diff --git a/system/physmem.c b/system/physmem.c
index ad7a8c7d95..1a5ffcba2a 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -2227,7 +2227,7 @@ static void *qemu_ram_ptr_length(RAMBlock 
*block, ram_addr_t addr,

   * because we don't want to map the entire memory in QEMU.
   * In that case just map the requested area.
   */
-    if (block->offset == 0) {
+    if (xen_mr_is_memory(block->mr)) {
  return xen_map_cache(block->mr, addr, len, lock, lock,
   is_write);
  }


I'd have moved that into a separate patch, because this is not a simple 
abstraction here.


Yes please, maybe using Stefano review comment in the description.



Acked-by: David Hildenbrand 






Re: [PATCH v4 13/17] softmmu: Pass RAM MemoryRegion and is_write xen_map_cache()

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Propagate MR and is_write to xen_map_cache().
This is in preparation for adding support for grant mappings.

No functional change.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 10 ++
  include/sysemu/xen-mapcache.h | 11 +++
  system/physmem.c  | 31 +++
  3 files changed, 36 insertions(+), 16 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 08/17] xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Add MapCache argument to xen_invalidate_map_cache_entry_unlocked.
This is in preparation for supporting multiple map caches.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 21 +++--
  1 file changed, 11 insertions(+), 10 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 05/17] xen: mapcache: Refactor xen_remap_bucket for multi-instance

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Add MapCache argument to xen_remap_bucket in preparation
to support multiple map caches.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 9 +
  1 file changed, 5 insertions(+), 4 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 04/17] xen: mapcache: Refactor xen_map_cache for multi-instance

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Make xen_map_cache take a MapCache as argument. This is in
prepaparation to support multiple map caches.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 35 ++-
  1 file changed, 18 insertions(+), 17 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH v4 03/17] xen: mapcache: Refactor lock functions for multi-instance

2024-05-06 Thread Philippe Mathieu-Daudé

On 30/4/24 18:49, Edgar E. Iglesias wrote:

From: "Edgar E. Iglesias" 

Make the lock functions take MapCache * as argument. This is
in preparation for supporting multiple caches.

No functional changes.

Signed-off-by: Edgar E. Iglesias 
---
  hw/xen/xen-mapcache.c | 34 +-
  1 file changed, 17 insertions(+), 17 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




[PULL 01/38] exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET

2024-04-26 Thread Philippe Mathieu-Daudé
'NEED_CPU_H' guard target-specific code; it is defined by meson
altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H
as COMPILING_PER_TARGET to clarify its meaning.

Mechanical change running:

 $ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H)

then manually add a /* COMPILING_PER_TARGET */ comment
after the '#endif' when the block is large.

Inspired-by: Peter Maydell 
Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: Richard Henderson 
Message-Id: <20240322161439.6448-4-phi...@linaro.org>
---
 meson.build| 4 ++--
 include/exec/cpu-defs.h| 2 +-
 include/exec/helper-head.h | 4 ++--
 include/exec/memop.h   | 4 ++--
 include/exec/memory.h  | 4 ++--
 include/exec/tswap.h   | 4 ++--
 include/gdbstub/helpers.h  | 2 +-
 include/hw/core/cpu.h  | 4 ++--
 include/qemu/osdep.h   | 2 +-
 include/sysemu/hvf.h   | 8 
 include/sysemu/kvm.h   | 6 +++---
 include/sysemu/nvmm.h  | 4 ++--
 include/sysemu/whpx.h  | 4 ++--
 include/sysemu/xen.h   | 4 ++--
 target/arm/kvm-consts.h| 4 ++--
 scripts/analyze-inclusions | 6 +++---
 16 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/meson.build b/meson.build
index 553b940999..96fdc6dfd2 100644
--- a/meson.build
+++ b/meson.build
@@ -3610,7 +3610,7 @@ foreach d, list : target_modules
 if target.endswith('-softmmu')
   config_target = config_target_mak[target]
   target_inc = [include_directories('target' / 
config_target['TARGET_BASE_ARCH'])]
-  c_args = ['-DNEED_CPU_H',
+  c_args = ['-DCOMPILING_PER_TARGET',
 '-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
 '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)]
   target_module_ss = module_ss.apply(config_target, strict: false)
@@ -3793,7 +3793,7 @@ foreach target : target_dirs
   target_base_arch = config_target['TARGET_BASE_ARCH']
   arch_srcs = [config_target_h[target]]
   arch_deps = []
-  c_args = ['-DNEED_CPU_H',
+  c_args = ['-DCOMPILING_PER_TARGET',
 '-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
 '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)]
   link_args = emulator_link_args
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 3915438b83..0dbef3010c 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -19,7 +19,7 @@
 #ifndef CPU_DEFS_H
 #define CPU_DEFS_H
 
-#ifndef NEED_CPU_H
+#ifndef COMPILING_PER_TARGET
 #error cpu.h included from common code
 #endif
 
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index 28ceab0a46..5ef467a79d 100644
--- a/include/exec/helper-head.h
+++ b/include/exec/helper-head.h
@@ -43,7 +43,7 @@
 #define dh_ctype_noreturn G_NORETURN void
 #define dh_ctype(t) dh_ctype_##t
 
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 # ifdef TARGET_LONG_BITS
 #  if TARGET_LONG_BITS == 32
 #   define dh_alias_tl i32
@@ -54,7 +54,7 @@
 #  endif
 # endif
 # define dh_ctype_tl target_ulong
-#endif
+#endif /* COMPILING_PER_TARGET */
 
 /* We can't use glue() here because it falls foul of C preprocessor
recursive expansion rules.  */
diff --git a/include/exec/memop.h b/include/exec/memop.h
index a86dc6743a..06417ff361 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -35,7 +35,7 @@ typedef enum MemOp {
 MO_LE= 0,
 MO_BE= MO_BSWAP,
 #endif
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 #if TARGET_BIG_ENDIAN
 MO_TE= MO_BE,
 #else
@@ -135,7 +135,7 @@ typedef enum MemOp {
 MO_BESL  = MO_BE | MO_SL,
 MO_BESQ  = MO_BE | MO_SQ,
 
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 MO_TEUW  = MO_TE | MO_UW,
 MO_TEUL  = MO_TE | MO_UL,
 MO_TEUQ  = MO_TE | MO_UQ,
diff --git a/include/exec/memory.h b/include/exec/memory.h
index dbb1bad72f..dadb5cd65a 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -3107,7 +3107,7 @@ address_space_write_cached(MemoryRegionCache *cache, 
hwaddr addr,
 MemTxResult address_space_set(AddressSpace *as, hwaddr addr,
   uint8_t c, hwaddr len, MemTxAttrs attrs);
 
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 /* enum device_endian to MemOp.  */
 static inline MemOp devend_memop(enum device_endian end)
 {
@@ -3125,7 +3125,7 @@ static inline MemOp devend_memop(enum device_endian end)
 return (end == non_host_endianness) ? MO_BSWAP : 0;
 #endif
 }
-#endif
+#endif /* COMPILING_PER_TARGET */
 
 /*
  * Inhibit technologies that require discarding of pages in RAM blocks, e.g.,
diff --git a/include/exec/tswap.h b/include/exec/tswap.h
index 68944a880b..5089cd6a4c 100644
--- a/include/exec/tswap.h
+++ b/include/exec/tswap.h
@@ -15,11 +15,11 @@
  * If we're in target-spec

Re: [PATCH v2 1/2] net: Provide MemReentrancyGuard * to qemu_new_nic()

2024-04-26 Thread Philippe Mathieu-Daudé

On 26/4/24 14:37, Akihiko Odaki wrote:

On 2024/04/24 21:32, Thomas Huth wrote:

On 24/04/2024 12.41, Prasad Pandit wrote:
On Wednesday, 24 April, 2024 at 03:36:01 pm IST, Philippe 
Mathieu-Daudé wrote:

On 1/6/23 05:18, Akihiko Odaki wrote:
Recently MemReentrancyGuard was added to DeviceState to record that 
the
device is engaging in I/O. The network device backend needs to 
update it

when delivering a packet to a device.
In preparation for such a change, add MemReentrancyGuard * as a
parameter of qemu_new_nic().


An user on IRC asked if this patch is related/fixing CVE-2021-20255,
any clue?


* CVE-2021-20255 bug: infinite recursion is pointing at a different 
fix patch.

   -> https://bugzilla.redhat.com/show_bug.cgi?id=CVE-2021-20255

* And the this patch below has different issue tagged
-> https://lists.nongnu.org/archive/html/qemu-devel/2023-05/msg08312.html
   Fixes: CVE-2023-3019


* They look different, former is an infinite recursion issue and the 
latter is a use-after-free one.


I assume the eepro reentrancy issue has been fixed with:

  https://gitlab.com/qemu-project/qemu/-/issues/556
  i.e.:
  https://gitlab.com/qemu-project/qemu/-/commit/c40ca2301c7603524eaddb5308a3


I agree. Commit c40ca2301c7603524eaddb5308a3 should be what fixed 
CVE-2021-20255, not this patch.


Thank you all for clarifying!




Re: [PATCH v2 1/2] net: Provide MemReentrancyGuard * to qemu_new_nic()

2024-04-24 Thread Philippe Mathieu-Daudé

Hi,

On 1/6/23 05:18, Akihiko Odaki wrote:

Recently MemReentrancyGuard was added to DeviceState to record that the
device is engaging in I/O. The network device backend needs to update it
when delivering a packet to a device.

In preparation for such a change, add MemReentrancyGuard * as a
parameter of qemu_new_nic().


An user on IRC asked if this patch is related/fixing CVE-2021-20255,
any clue?


Signed-off-by: Akihiko Odaki 
---
  include/net/net.h | 1 +
  hw/net/allwinner-sun8i-emac.c | 3 ++-
  hw/net/allwinner_emac.c   | 3 ++-
  hw/net/cadence_gem.c  | 3 ++-
  hw/net/dp8393x.c  | 3 ++-
  hw/net/e1000.c| 3 ++-
  hw/net/e1000e.c   | 2 +-
  hw/net/eepro100.c | 4 +++-
  hw/net/etraxfs_eth.c  | 3 ++-
  hw/net/fsl_etsec/etsec.c  | 3 ++-
  hw/net/ftgmac100.c| 3 ++-
  hw/net/i82596.c   | 2 +-
  hw/net/igb.c  | 2 +-
  hw/net/imx_fec.c  | 2 +-
  hw/net/lan9118.c  | 3 ++-
  hw/net/mcf_fec.c  | 3 ++-
  hw/net/mipsnet.c  | 3 ++-
  hw/net/msf2-emac.c| 3 ++-
  hw/net/mv88w8618_eth.c| 3 ++-
  hw/net/ne2000-isa.c   | 3 ++-
  hw/net/ne2000-pci.c   | 3 ++-
  hw/net/npcm7xx_emc.c  | 3 ++-
  hw/net/opencores_eth.c| 3 ++-
  hw/net/pcnet.c| 3 ++-
  hw/net/rocker/rocker_fp.c | 4 ++--
  hw/net/rtl8139.c  | 3 ++-
  hw/net/smc91c111.c| 3 ++-
  hw/net/spapr_llan.c   | 3 ++-
  hw/net/stellaris_enet.c   | 3 ++-
  hw/net/sungem.c   | 2 +-
  hw/net/sunhme.c   | 3 ++-
  hw/net/tulip.c| 3 ++-
  hw/net/virtio-net.c   | 6 --
  hw/net/vmxnet3.c  | 2 +-
  hw/net/xen_nic.c  | 4 ++--
  hw/net/xgmac.c| 3 ++-
  hw/net/xilinx_axienet.c   | 3 ++-
  hw/net/xilinx_ethlite.c   | 3 ++-
  hw/usb/dev-network.c  | 3 ++-
  net/net.c | 1 +
  40 files changed, 75 insertions(+), 41 deletions(-)





Re: [RFC PATCH-for-9.1 09/29] hw/i386/pc: Pass PCMachineState argument to acpi_setup()

2024-03-29 Thread Philippe Mathieu-Daudé

On 28/3/24 19:45, BALATON Zoltan wrote:

On Thu, 28 Mar 2024, Philippe Mathieu-Daudé wrote:

acpi_setup() caller knows about the machine state, so pass
it as argument to avoid a qdev_get_machine() call.

We already resolved X86_MACHINE(pcms) as 'x86ms' so use the
latter.

Signed-off-by: Philippe Mathieu-Daudé 
---
hw/i386/acpi-build.h | 3 ++-
hw/i386/acpi-build.c | 5 ++---
hw/i386/pc.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 0dce155c8c..31de5bddbd 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -2,6 +2,7 @@
#ifndef HW_I386_ACPI_BUILD_H
#define HW_I386_ACPI_BUILD_H
#include "hw/acpi/acpi-defs.h"
+#include "hw/i386/pc.h"

extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;

@@ -9,7 +10,7 @@ extern const struct AcpiGenericAddress 
x86_nvdimm_acpi_dsmio;

#define ACPI_PCIHP_SEJ_BASE 0x8
#define ACPI_PCIHP_BNMR_BASE 0x10

-void acpi_setup(void);
+void acpi_setup(PCMachineState *pcms);


This is changed to PcPciMachineState * in a following patch so can't you 
already introduce it here to avoid some churn?


Unfortunately not, because we'd need to use:

  PcPciMachineState *ppms = PC_PCI_MACHINE(pcms);

which would trigger an assertion at this point.



Regards,
BALATON Zoltan





[RFC PATCH-for-9.1 29/29] hw/i386/pc: Move ISA-only PC machine to pc_isa.c

2024-03-28 Thread Philippe Mathieu-Daudé
Extract the ISA-only PC machine code from pc_piix.c
to a new file, pc_isa.c.

Signed-off-by: Philippe Mathieu-Daudé 
---
 MAINTAINERS |  1 +
 hw/i386/pc_isa.c| 33 +
 hw/i386/pc_piix.c   | 23 ---
 hw/i386/meson.build |  1 +
 4 files changed, 35 insertions(+), 23 deletions(-)
 create mode 100644 hw/i386/pc_isa.c

diff --git a/MAINTAINERS b/MAINTAINERS
index a07af6b9d4..a68fa813b8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1812,6 +1812,7 @@ M: Marcel Apfelbaum 
 S: Supported
 F: include/hw/i386/
 F: hw/i386/
+X: hw/i386/pc_isa.c
 F: hw/pci-host/i440fx.c
 F: hw/pci-host/q35.c
 F: hw/pci-host/pam.c
diff --git a/hw/i386/pc_isa.c b/hw/i386/pc_isa.c
new file mode 100644
index 00..a98c75f3ae
--- /dev/null
+++ b/hw/i386/pc_isa.c
@@ -0,0 +1,33 @@
+/*
+ * QEMU ISA PC System Emulator
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "qemu/osdep.h"
+#include "qom/object.h"
+#include "hw/boards.h"
+#include "hw/i386/pc.h"
+#include "hw/char/parallel-isa.h"
+#include "target/i386/cpu-qom.h"
+
+static void pc_init_isa(MachineState *machine)
+{
+pc_piix_init(machine, NULL);
+}
+
+static void isapc_machine_options(MachineClass *m)
+{
+m->desc = "ISA-only PC";
+m->max_cpus = 1;
+m->option_rom_has_mr = true;
+m->rom_file_has_mr = false;
+m->default_nic = "ne2k_isa";
+m->default_cpu_type = X86_CPU_TYPE_NAME("486");
+m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
+}
+
+DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
+  isapc_machine_options, TYPE_PC_MACHINE);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 4a3ae72fe4..f94221ab92 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -434,13 +434,6 @@ static void pc_set_south_bridge(Object *obj, int value, 
Error **errp)
  * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
  */
 
-#ifdef CONFIG_ISAPC
-static void pc_init_isa(MachineState *machine)
-{
-pc_piix_init(machine, NULL);
-}
-#endif
-
 #ifdef CONFIG_XEN
 static void pc_xen_hvm_init_pci(MachineState *machine)
 {
@@ -820,22 +813,6 @@ static void pc_i440fx_2_4_machine_options(MachineClass *m)
 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
   pc_i440fx_2_4_machine_options)
 
-#ifdef CONFIG_ISAPC
-static void isapc_machine_options(MachineClass *m)
-{
-m->desc = "ISA-only PC";
-m->max_cpus = 1;
-m->option_rom_has_mr = true;
-m->rom_file_has_mr = false;
-m->default_nic = "ne2k_isa";
-m->default_cpu_type = X86_CPU_TYPE_NAME("486");
-m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
-}
-
-DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
-  isapc_machine_options, TYPE_PC_MACHINE);
-#endif
-
 #ifdef CONFIG_XEN
 static void xenfv_4_2_machine_options(MachineClass *m)
 {
diff --git a/hw/i386/meson.build b/hw/i386/meson.build
index 1a6e731196..0576fc6541 100644
--- a/hw/i386/meson.build
+++ b/hw/i386/meson.build
@@ -12,6 +12,7 @@ i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: 
files('x86-iommu.c'),
   if_false: files('x86-iommu-stub.c'))
 i386_ss.add(when: 'CONFIG_AMD_IOMMU', if_true: files('amd_iommu.c'),
   if_false: files('amd_iommu-stub.c'))
+i386_ss.add(when: 'CONFIG_ISAPC', if_true: files('pc_isa.c'))
 i386_ss.add(when: 'CONFIG_I440FX', if_true: files('pc_piix.c'))
 i386_ss.add(when: 'CONFIG_MICROVM', if_true: files('microvm.c', 
'acpi-microvm.c', 'microvm-dt.c'))
 i386_ss.add(when: 'CONFIG_Q35', if_true: files('pc_q35.c'))
-- 
2.41.0




[RFC PATCH-for-9.1 09/29] hw/i386/pc: Pass PCMachineState argument to acpi_setup()

2024-03-28 Thread Philippe Mathieu-Daudé
acpi_setup() caller knows about the machine state, so pass
it as argument to avoid a qdev_get_machine() call.

We already resolved X86_MACHINE(pcms) as 'x86ms' so use the
latter.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/acpi-build.h | 3 ++-
 hw/i386/acpi-build.c | 5 ++---
 hw/i386/pc.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 0dce155c8c..31de5bddbd 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -2,6 +2,7 @@
 #ifndef HW_I386_ACPI_BUILD_H
 #define HW_I386_ACPI_BUILD_H
 #include "hw/acpi/acpi-defs.h"
+#include "hw/i386/pc.h"
 
 extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
 
@@ -9,7 +10,7 @@ extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
 #define ACPI_PCIHP_SEJ_BASE 0x8
 #define ACPI_PCIHP_BNMR_BASE 0x10
 
-void acpi_setup(void);
+void acpi_setup(PCMachineState *pcms);
 Object *acpi_get_i386_pci_host(void);
 
 #endif
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6e8e32e5d2..e702d5e9d2 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2749,9 +2749,8 @@ static const VMStateDescription vmstate_acpi_build = {
 },
 };
 
-void acpi_setup(void)
+void acpi_setup(PCMachineState *pcms)
 {
-PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
 X86MachineState *x86ms = X86_MACHINE(pcms);
 AcpiBuildTables tables;
 AcpiBuildState *build_state;
@@ -2771,7 +2770,7 @@ void acpi_setup(void)
 return;
 }
 
-if (!x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) {
+if (!x86_machine_is_acpi_enabled(x86ms)) {
 ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n");
 return;
 }
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 6d87d1d4c2..dfc0247bb6 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -601,7 +601,7 @@ void pc_machine_done(Notifier *notifier, void *data)
 /* set the number of CPUs */
 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
 
-acpi_setup();
+acpi_setup(pcms);
 if (x86ms->fw_cfg) {
 fw_cfg_build_smbios(pcms, x86ms->fw_cfg, 
pcms->smbios_entry_point_type);
 fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg);
-- 
2.41.0




[RFC PATCH-for-9.1 16/29] hw/i386/pc: Move south-bridge related fields to PcPciMachine

2024-03-28 Thread Philippe Mathieu-Daudé
South bridge type is only relevant for the i440fx/piix
machine, which is PCI-based.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h |  8 
 hw/i386/pc.c |  3 ++-
 hw/i386/pc_piix.c| 12 ++--
 3 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 668347c248..2db2aa03d3 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -38,7 +38,6 @@ typedef struct PCMachineState {
 uint64_t max_ram_below_4g;
 OnOffAuto vmport;
 SmbiosEntryPointType smbios_entry_point_type;
-const char *south_bridge;
 
 bool smbus_enabled;
 bool sata_enabled;
@@ -59,6 +58,7 @@ typedef struct PcPciMachineState {
 Notifier machine_done;
 
 bool acpi_build_enabled;
+const char *southbridge_typename;
 uint64_t max_fw_size;
 
 PFlashCFI01 *flash[2];
@@ -88,9 +88,6 @@ typedef struct PcPciMachineState {
 typedef struct PCMachineClass {
 X86MachineClass parent_class;
 
-/* Device configuration: */
-const char *default_south_bridge;
-
 /* Compat options: */
 
 /* Default CPU model version.  See x86_cpu_set_default_version(). */
@@ -126,6 +123,9 @@ typedef struct PCMachineClass {
 typedef struct PcPciMachineClass {
 PCMachineClass parent_class;
 
+/* Device configuration: */
+const char *default_southbridge_typename;
+
 /* ACPI compat: */
 int pci_root_uid;
 } PcPciMachineClass;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 5753a3ff0b..dd44df0470 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1667,7 +1667,6 @@ static void pc_machine_initfn(Object *obj)
 #endif /* CONFIG_VMPORT */
 pcms->max_ram_below_4g = 0; /* use default */
 pcms->smbios_entry_point_type = pcmc->default_smbios_ep_type;
-pcms->south_bridge = pcmc->default_south_bridge;
 
 pcms->smbus_enabled = true;
 pcms->sata_enabled = true;
@@ -1689,9 +1688,11 @@ static void pc_machine_initfn(Object *obj)
 static void pc_pci_machine_initfn(Object *obj)
 {
 PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
+PcPciMachineClass *ppmc = PC_PCI_MACHINE_GET_CLASS(ppms);
 
 ppms->acpi_build_enabled = true;
 ppms->max_fw_size = 8 * MiB;
+ppms->southbridge_typename = ppmc->default_southbridge_typename;
 
 pc_system_flash_create(ppms);
 cxl_machine_init(obj, &ppms->cxl_devices_state);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 6b3403d0bd..2043a7022a 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -243,7 +243,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 DeviceState *dev;
 size_t i;
 
-pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
+pci_dev = pci_new_multifunction(-1, ppms->southbridge_typename);
 object_property_set_bool(OBJECT(pci_dev), "has-usb",
  machine_usb(machine), &error_abort);
 object_property_set_bool(OBJECT(pci_dev), "has-acpi",
@@ -385,12 +385,12 @@ static const QEnumLookup PCSouthBridgeOption_lookup = {
 
 static int pc_get_south_bridge(Object *obj, Error **errp)
 {
-PCMachineState *pcms = PC_MACHINE(obj);
+PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
 int i;
 
 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) {
 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i],
-  pcms->south_bridge) == 0) {
+  ppms->southbridge_typename) == 0) {
 return i;
 }
 }
@@ -401,7 +401,7 @@ static int pc_get_south_bridge(Object *obj, Error **errp)
 
 static void pc_set_south_bridge(Object *obj, int value, Error **errp)
 {
-PCMachineState *pcms = PC_MACHINE(obj);
+PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
 
 if (value < 0) {
 error_setg(errp, "Value can't be negative");
@@ -413,7 +413,7 @@ static void pc_set_south_bridge(Object *obj, int value, 
Error **errp)
 return;
 }
 
-pcms->south_bridge = PCSouthBridgeOption_lookup.array[value];
+ppms->southbridge_typename = PCSouthBridgeOption_lookup.array[value];
 }
 
 /* Looking for a pc_compat_2_4() function? It doesn't exist.
@@ -472,7 +472,7 @@ static void pc_i440fx_machine_options(MachineClass *m)
 PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
 ObjectClass *oc = OBJECT_CLASS(m);
 
-pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
+ppmc->default_southbridge_typename = TYPE_PIIX3_DEVICE;
 ppmc->pci_root_uid = 0;
 pcmc->default_cpu_version = 1;
 
-- 
2.41.0




[RFC PATCH-for-9.1 23/29] hw/i386/fw_cfg: Inline smbios_defaults()

2024-03-28 Thread Philippe Mathieu-Daudé
All PCI-based machines have the smbios_defaults field
set to %true. Simplify by using an inlined helper
checking whether the machine is PCI-based or not.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 1 -
 hw/i386/fw_cfg.c | 7 ++-
 hw/i386/pc.c | 1 -
 hw/i386/pc_piix.c| 1 -
 4 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 7da0bc8aa4..6a6a8df005 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -86,7 +86,6 @@ typedef struct PCMachineClass {
 int default_cpu_version;
 
 /* SMBIOS compat: */
-bool smbios_defaults;
 bool smbios_legacy_mode;
 SmbiosEntryPointType default_smbios_ep_type;
 
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index 14a7dfbdc9..f60390ed56 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -49,6 +49,11 @@ const char *fw_cfg_arch_key_name(uint16_t key)
 }
 
 #ifdef CONFIG_SMBIOS
+static bool smbios_defaults(PCMachineState *pcms)
+{
+return pc_machine_is_pci_enabled(pcms);
+}
+
 void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
  SmbiosEntryPointType ep_type)
 {
@@ -61,7 +66,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 MachineClass *mc = MACHINE_GET_CLASS(pcms);
 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
 
-if (pcmc->smbios_defaults) {
+if (smbios_defaults(pcms)) {
 /* These values are guest ABI, do not change */
 smbios_set_defaults("QEMU", mc->desc, mc->name);
 }
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index b83abee8e9..7a758a2e84 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1754,7 +1754,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
-pcmc->smbios_defaults = true;
 pcmc->enforce_amd_1tb_hole = true;
 pcmc->pvh_enabled = true;
 pcmc->kvmclock_create_always = true;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index e6178f8653..70dc8686f9 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -828,7 +828,6 @@ static void isapc_machine_options(MachineClass *m)
 m->max_cpus = 1;
 m->option_rom_has_mr = true;
 m->rom_file_has_mr = false;
-pcmc->smbios_defaults = false;
 pcmc->smbios_legacy_mode = true;
 m->default_nic = "ne2k_isa";
 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
-- 
2.41.0




[RFC PATCH-for-9.1 22/29] hw/i386/fw_cfg: Define fw_cfg_build_smbios() stub

2024-03-28 Thread Philippe Mathieu-Daudé
We are going to refactor fw_cfg_build_smbios() in the
next patches. In order to avoid too much #ifdef'ry in
it, define a stub.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/fw_cfg-smbios-stub.c | 15 +++
 hw/i386/fw_cfg.c |  4 ++--
 hw/i386/meson.build  |  1 +
 3 files changed, 18 insertions(+), 2 deletions(-)
 create mode 100644 hw/i386/fw_cfg-smbios-stub.c

diff --git a/hw/i386/fw_cfg-smbios-stub.c b/hw/i386/fw_cfg-smbios-stub.c
new file mode 100644
index 00..37dbfdee7c
--- /dev/null
+++ b/hw/i386/fw_cfg-smbios-stub.c
@@ -0,0 +1,15 @@
+/*
+ * QEMU fw_cfg/SMBIOS stubs
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ * SPDX-FileCopyrightText: 2024 Linaro Ltd.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/firmware/smbios.h"
+#include "fw_cfg.h"
+
+void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
+ SmbiosEntryPointType ep_type)
+{
+}
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index ecc4047a4b..14a7dfbdc9 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -48,10 +48,10 @@ const char *fw_cfg_arch_key_name(uint16_t key)
 return NULL;
 }
 
+#ifdef CONFIG_SMBIOS
 void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
  SmbiosEntryPointType ep_type)
 {
-#ifdef CONFIG_SMBIOS
 uint8_t *smbios_tables, *smbios_anchor;
 size_t smbios_tables_len, smbios_anchor_len;
 struct smbios_phys_mem_area *mem_array;
@@ -100,8 +100,8 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
 smbios_anchor, smbios_anchor_len);
 }
-#endif
 }
+#endif
 
 FWCfgState *fw_cfg_arch_create(MachineState *ms,
   uint16_t boot_cpus,
diff --git a/hw/i386/meson.build b/hw/i386/meson.build
index d8b70ef3e9..1a6e731196 100644
--- a/hw/i386/meson.build
+++ b/hw/i386/meson.build
@@ -6,6 +6,7 @@ i386_ss.add(files(
   'multiboot.c',
   'x86.c',
 ))
+i386_ss.add(when: 'CONFIG_SMBIOS', if_false: files('fw_cfg-smbios-stub.c'))
 
 i386_ss.add(when: 'CONFIG_X86_IOMMU', if_true: files('x86-iommu.c'),
   if_false: files('x86-iommu-stub.c'))
-- 
2.41.0




[RFC PATCH-for-9.1 15/29] hw/i386/pc: Move FW/pflash related fields to PcPciMachineState

2024-03-28 Thread Philippe Mathieu-Daudé
Only PCI-based machines use the set of parallel flash devices.
Move the fields from PCMachineState to PcPciMachineState.
Directly pass a PcPciMachineState argument to the
pc_system_flash/fw methods.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 10 
 hw/i386/pc.c | 25 +-
 hw/i386/pc_piix.c|  3 ++-
 hw/i386/pc_sysfw.c   | 60 +++-
 4 files changed, 45 insertions(+), 53 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 67f8f4730b..668347c248 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -30,7 +30,6 @@ typedef struct PCMachineState {
 /* Pointers to devices and objects: */
 PCIBus *pcibus;
 I2CBus *smbus;
-PFlashCFI01 *flash[2];
 ISADevice *pcspk;
 DeviceState *iommu;
 BusState *idebus[MAX_IDE_BUS];
@@ -47,7 +46,6 @@ typedef struct PCMachineState {
 bool i8042_enabled;
 bool default_bus_bypass_iommu;
 bool fd_bootchk;
-uint64_t max_fw_size;
 
 /* ACPI Memory hotplug IO base address */
 hwaddr memhp_io_base;
@@ -61,7 +59,9 @@ typedef struct PcPciMachineState {
 Notifier machine_done;
 
 bool acpi_build_enabled;
+uint64_t max_fw_size;
 
+PFlashCFI01 *flash[2];
 CXLState cxl_devices_state;
 } PcPciMachineState;
 
@@ -184,9 +184,9 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
 #define TYPE_PORT92 "port92"
 
 /* pc_sysfw.c */
-void pc_system_flash_create(PCMachineState *pcms);
-void pc_system_flash_cleanup_unused(PCMachineState *pcms);
-void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
+void pc_system_flash_create(PcPciMachineState *ppms);
+void pc_system_flash_cleanup_unused(PcPciMachineState *ppms);
+void pc_system_firmware_init(PcPciMachineState *ppms, MemoryRegion 
*rom_memory);
 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
int *data_len);
 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 33724791fd..5753a3ff0b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -957,7 +957,7 @@ void pc_memory_init(PCMachineState *pcms,
 
 /* Initialize PC system firmware */
 if (pci_enabled) {
-pc_system_firmware_init(pcms, rom_memory);
+pc_system_firmware_init(ppms, rom_memory);
 } else {
 x86_bios_rom_init(machine, "bios.bin", rom_memory, true);
 }
@@ -1617,8 +1617,8 @@ static void pc_machine_get_max_fw_size(Object *obj, 
Visitor *v,
const char *name, void *opaque,
Error **errp)
 {
-PCMachineState *pcms = PC_MACHINE(obj);
-uint64_t value = pcms->max_fw_size;
+PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
+uint64_t value = ppms->max_fw_size;
 
 visit_type_size(v, name, &value, errp);
 }
@@ -1627,7 +1627,7 @@ static void pc_machine_set_max_fw_size(Object *obj, 
Visitor *v,
const char *name, void *opaque,
Error **errp)
 {
-PCMachineState *pcms = PC_MACHINE(obj);
+PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
 uint64_t value;
 
 if (!visit_type_size(v, name, &value, errp)) {
@@ -1651,7 +1651,7 @@ static void pc_machine_set_max_fw_size(Object *obj, 
Visitor *v,
 return;
 }
 
-pcms->max_fw_size = value;
+ppms->max_fw_size = value;
 }
 
 
@@ -1672,7 +1672,6 @@ static void pc_machine_initfn(Object *obj)
 pcms->smbus_enabled = true;
 pcms->sata_enabled = true;
 pcms->i8042_enabled = true;
-pcms->max_fw_size = 8 * MiB;
 #ifdef CONFIG_HPET
 pcms->hpet_enabled = true;
 #endif
@@ -1692,8 +1691,9 @@ static void pc_pci_machine_initfn(Object *obj)
 PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
 
 ppms->acpi_build_enabled = true;
+ppms->max_fw_size = 8 * MiB;
 
-pc_system_flash_create(PC_MACHINE(obj));
+pc_system_flash_create(ppms);
 cxl_machine_init(obj, &ppms->cxl_devices_state);
 
 ppms->machine_done.notify = pc_pci_machine_done;
@@ -1815,12 +1815,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 pc_machine_get_default_bus_bypass_iommu,
 pc_machine_set_default_bus_bypass_iommu);
 
-object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
-pc_machine_get_max_fw_size, pc_machine_set_max_fw_size,
-NULL, NULL);
-object_class_property_set_description(oc, PC_MACHINE_MAX_FW_SIZE,
-"Maximum combined firmware size");
-
 object_class_property_add(oc, PC_MACHINE_SMBIOS_EP, "str",
 pc_machine_get_smbios_ep, pc_machine_set_smbios_ep,
 NULL, NULL);
@@ -1834,6 +1828,11 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 
 static void pc_pci_machine_class_

[RFC PATCH-for-9.1 24/29] hw/i386/fw_cfg: Inline smbios_legacy_mode()

2024-03-28 Thread Philippe Mathieu-Daudé
All PCI-based machines have the smbios_legacy_mode
field set to %false. Simplify by using an inlined
helper checking whether the machine is PCI-based or
not.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 1 -
 hw/i386/fw_cfg.c | 8 ++--
 hw/i386/pc_piix.c| 2 --
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 6a6a8df005..6510914803 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -86,7 +86,6 @@ typedef struct PCMachineClass {
 int default_cpu_version;
 
 /* SMBIOS compat: */
-bool smbios_legacy_mode;
 SmbiosEntryPointType default_smbios_ep_type;
 
 /* RAM / address space compat: */
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index f60390ed56..ffa60a4a33 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -54,6 +54,11 @@ static bool smbios_defaults(PCMachineState *pcms)
 return pc_machine_is_pci_enabled(pcms);
 }
 
+static bool smbios_legacy_mode(PCMachineState *pcms)
+{
+return !pc_machine_is_pci_enabled(pcms);
+}
+
 void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
  SmbiosEntryPointType ep_type)
 {
@@ -62,7 +67,6 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 struct smbios_phys_mem_area *mem_array;
 unsigned i, array_count;
 MachineState *ms = MACHINE(pcms);
-PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
 MachineClass *mc = MACHINE_GET_CLASS(pcms);
 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
 
@@ -74,7 +78,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 /* tell smbios about cpuid version and features */
 smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
 
-if (pcmc->smbios_legacy_mode) {
+if (smbios_legacy_mode(pcms)) {
 smbios_tables = smbios_get_table_legacy(&smbios_tables_len,
 &error_fatal);
 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 70dc8686f9..4f07476cfa 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -823,12 +823,10 @@ DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
 #ifdef CONFIG_ISAPC
 static void isapc_machine_options(MachineClass *m)
 {
-PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
 m->desc = "ISA-only PC";
 m->max_cpus = 1;
 m->option_rom_has_mr = true;
 m->rom_file_has_mr = false;
-pcmc->smbios_legacy_mode = true;
 m->default_nic = "ne2k_isa";
 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
-- 
2.41.0




[RFC PATCH-for-9.1 17/29] hw/i386/pc: Inline gigabyte_align()

2024-03-28 Thread Philippe Mathieu-Daudé
All PCI-based machines have the gigabyte_align field
set to %true. Simplify by using an inlined helper
checking whether the machine is PCI-based or not.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h |  9 -
 hw/i386/pc.c |  1 -
 hw/i386/pc_piix.c| 16 +---
 3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 2db2aa03d3..758dd5f29b 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -76,14 +76,6 @@ typedef struct PcPciMachineState {
 
 /**
  * PCMachineClass:
- *
- * Compat fields:
- *
- * @gigabyte_align: Make sure that guest addresses aligned at
- *  1Gbyte boundaries get mapped to host
- *  addresses aligned at 1Gbyte boundaries. This
- *  way we can use 1GByte pages in the host.
- *
  */
 typedef struct PCMachineClass {
 X86MachineClass parent_class;
@@ -99,7 +91,6 @@ typedef struct PCMachineClass {
 SmbiosEntryPointType default_smbios_ep_type;
 
 /* RAM / address space compat: */
-bool gigabyte_align;
 bool has_reserved_memory;
 bool broken_reserved_end;
 bool enforce_amd_1tb_hole;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index dd44df0470..093a7c35f7 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1752,7 +1752,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
 pcmc->smbios_defaults = true;
-pcmc->gigabyte_align = true;
 pcmc->has_reserved_memory = true;
 pcmc->enforce_amd_1tb_hole = true;
 pcmc->pvh_enabled = true;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 2043a7022a..0bc14da768 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -99,6 +99,17 @@ static void piix_intx_routing_notifier_xen(PCIDevice *dev)
 }
 }
 
+/*
+ * gigabyte_align: Make sure that guest addresses aligned at
+ * 1Gbyte boundaries get mapped to host
+ * addresses aligned at 1Gbyte boundaries.
+ * This way we can use 1GByte pages in the host.
+ */
+static bool gigabyte_align(PCMachineState *pcms)
+{
+return pc_machine_is_pci_enabled(pcms);
+}
+
 /* PC hardware initialisation */
 static void pc_init1(MachineState *machine, const char *pci_type)
 {
@@ -130,7 +141,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
  *  - Then, to gigabyte align the memory, we move the split to 3G
  *(lowmem = 0xc000).  But only in case we have to split in
  *the first place, i.e. ram_size is larger than (traditional)
- *lowmem.  And for new machine types (gigabyte_align = true)
+ *lowmem.  And for new machine types (gigabyte_align() = true)
  *only, for live migration compatibility reasons.
  *
  *  - Next the max-ram-below-4g option was added, which allowed to
@@ -160,7 +171,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 }
 lowmem = pcms->max_ram_below_4g;
 if (machine->ram_size >= pcms->max_ram_below_4g) {
-if (pcmc->gigabyte_align) {
+if (gigabyte_align(pcms)) {
 if (lowmem > 0xc000) {
 lowmem = 0xc000;
 }
@@ -818,7 +829,6 @@ static void isapc_machine_options(MachineClass *m)
 m->option_rom_has_mr = true;
 m->rom_file_has_mr = false;
 pcmc->smbios_defaults = false;
-pcmc->gigabyte_align = false;
 pcmc->smbios_legacy_mode = true;
 pcmc->has_reserved_memory = false;
 m->default_nic = "ne2k_isa";
-- 
2.41.0




[RFC PATCH-for-9.1 27/29] hw/i386/pc: Call fw_cfg_build_smbios_legacy() in pc_machine_done()

2024-03-28 Thread Philippe Mathieu-Daudé
Keep fw_cfg_build_smbios() for PCI-based machines, call
fw_cfg_build_smbios_legacy() directly from pc_machine_done().

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/fw_cfg.c | 10 --
 hw/i386/pc.c | 12 +++-
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index be37e28f46..92e058446f 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -49,11 +49,6 @@ const char *fw_cfg_arch_key_name(uint16_t key)
 }
 
 #ifdef CONFIG_SMBIOS
-static bool smbios_legacy_mode(PCMachineState *pcms)
-{
-return !pc_machine_is_pci_enabled(pcms);
-}
-
 void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg)
 {
 uint8_t *smbios_tables;
@@ -81,11 +76,6 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 MachineClass *mc = MACHINE_GET_CLASS(pcms);
 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
 
-if (smbios_legacy_mode(pcms)) {
-fw_cfg_build_smbios_legacy(pcms, fw_cfg);
-return;
-}
-
 /* These values are guest ABI, do not change */
 smbios_set_defaults("QEMU", mc->desc, mc->name);
 
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7a758a2e84..7d06a088cf 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -591,6 +591,11 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int 
level)
 }
 }
 
+static bool smbios_legacy_mode(PCMachineState *pcms)
+{
+return !pc_machine_is_pci_enabled(pcms);
+}
+
 static
 void pc_machine_done(Notifier *notifier, void *data)
 {
@@ -602,7 +607,12 @@ void pc_machine_done(Notifier *notifier, void *data)
 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
 
 if (x86ms->fw_cfg) {
-fw_cfg_build_smbios(pcms, x86ms->fw_cfg, 
pcms->smbios_entry_point_type);
+if (smbios_legacy_mode(pcms)) {
+fw_cfg_build_smbios_legacy(pcms, x86ms->fw_cfg);
+} else {
+fw_cfg_build_smbios(pcms, x86ms->fw_cfg,
+pcms->smbios_entry_point_type);
+}
 fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg);
 /* update FW_CFG_NB_CPUS to account for -device added CPUs */
 fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
-- 
2.41.0




[RFC PATCH-for-9.1 14/29] hw/i386/pc: Move pc_system_flash_create() to pc_pci_machine_initfn()

2024-03-28 Thread Philippe Mathieu-Daudé
pc_system_flash_create() is only useful for PCI-based machines.
Move the call to the PCI-based init() handler.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c   |  2 +-
 hw/i386/pc_sysfw.c | 10 --
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 5b96daa414..33724791fd 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1679,7 +1679,6 @@ static void pc_machine_initfn(Object *obj)
 pcms->fd_bootchk = true;
 pcms->default_bus_bypass_iommu = false;
 
-pc_system_flash_create(pcms);
 pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
 object_property_add_alias(OBJECT(pcms), "pcspk-audiodev",
   OBJECT(pcms->pcspk), "audiodev");
@@ -1694,6 +1693,7 @@ static void pc_pci_machine_initfn(Object *obj)
 
 ppms->acpi_build_enabled = true;
 
+pc_system_flash_create(PC_MACHINE(obj));
 cxl_machine_init(obj, &ppms->cxl_devices_state);
 
 ppms->machine_done.notify = pc_pci_machine_done;
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 541dcaef71..167ff24fcb 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -93,12 +93,10 @@ static PFlashCFI01 *pc_pflash_create(PCMachineState *pcms,
 
 void pc_system_flash_create(PCMachineState *pcms)
 {
-if (pc_machine_is_pci_enabled(pcms)) {
-pcms->flash[0] = pc_pflash_create(pcms, "system.flash0",
-  "pflash0");
-pcms->flash[1] = pc_pflash_create(pcms, "system.flash1",
-  "pflash1");
-}
+assert(pc_machine_is_pci_enabled(pcms));
+
+pcms->flash[0] = pc_pflash_create(pcms, "system.flash0", "pflash0");
+pcms->flash[1] = pc_pflash_create(pcms, "system.flash1", "pflash1");
 }
 
 void pc_system_flash_cleanup_unused(PCMachineState *pcms)
-- 
2.41.0




[RFC PATCH-for-9.1 19/29] hw/i386/pc: Pass PcPciMachineState argument to CXL helpers

2024-03-28 Thread Philippe Mathieu-Daudé
Since CXL helpers expect a PCI-based machine, we
can directly pass them a PcPciMachineState argument.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index e36d76656b..d8e91d18b8 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -705,14 +705,14 @@ static void pc_get_device_memory_range(PCMachineState 
*pcms,
 *device_mem_size = size;
 }
 
-static uint64_t pc_get_cxl_range_start(PCMachineState *pcms)
+static uint64_t pc_get_cxl_range_start(PcPciMachineState *ppms)
 {
+PCMachineState *pcms = PC_MACHINE(ppms);
 MachineState *ms = MACHINE(pcms);
 hwaddr cxl_base;
 ram_addr_t size;
 
-if (has_reserved_memory(pcms) &&
-(ms->ram_size < ms->maxram_size)) {
+if ((ms->ram_size < ms->maxram_size)) {
 pc_get_device_memory_range(pcms, &cxl_base, &size);
 cxl_base += size;
 } else {
@@ -722,10 +722,9 @@ static uint64_t pc_get_cxl_range_start(PCMachineState 
*pcms)
 return cxl_base;
 }
 
-static uint64_t pc_get_cxl_range_end(PCMachineState *pcms)
+static uint64_t pc_get_cxl_range_end(PcPciMachineState *ppms)
 {
-PcPciMachineState *ppms = PC_PCI_MACHINE(pcms);
-uint64_t start = pc_get_cxl_range_start(pcms) + MiB;
+uint64_t start = pc_get_cxl_range_start(ppms) + MiB;
 
 if (ppms->cxl_devices_state.fixed_windows) {
 GList *it;
@@ -937,7 +936,7 @@ void pc_memory_init(PCMachineState *pcms,
 MemoryRegion *mr = &ppms->cxl_devices_state.host_mr;
 hwaddr cxl_size = MiB;
 
-cxl_base = pc_get_cxl_range_start(pcms);
+cxl_base = pc_get_cxl_range_start(ppms);
 memory_region_init(mr, OBJECT(machine), "cxl_host_reg", cxl_size);
 memory_region_add_subregion(system_memory, cxl_base, mr);
 cxl_resv_end = cxl_base + cxl_size;
@@ -1027,7 +1026,7 @@ uint64_t pc_pci_hole64_start(void)
 ram_addr_t size = 0;
 
 if (ppms->cxl_devices_state.is_enabled) {
-hole64_start = pc_get_cxl_range_end(pcms);
+hole64_start = pc_get_cxl_range_end(ppms);
 } else if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) {
 pc_get_device_memory_range(pcms, &hole64_start, &size);
 if (!pcmc->broken_reserved_end) {
-- 
2.41.0




[RFC PATCH-for-9.1 26/29] hw/i386/fw_cfg: Factor fw_cfg_build_smbios_legacy() out

2024-03-28 Thread Philippe Mathieu-Daudé
Factor fw_cfg_build_smbios_legacy() out of
fw_cfg_build_smbios().

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/fw_cfg.h |  1 +
 hw/i386/fw_cfg-smbios-stub.c |  4 
 hw/i386/fw_cfg.c | 33 ++---
 3 files changed, 27 insertions(+), 11 deletions(-)

diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h
index 7a426119f8..25ce86ec1b 100644
--- a/hw/i386/fw_cfg.h
+++ b/hw/i386/fw_cfg.h
@@ -24,6 +24,7 @@
 FWCfgState *fw_cfg_arch_create(MachineState *ms,
uint16_t boot_cpus,
uint16_t apic_id_limit);
+void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg);
 void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
  SmbiosEntryPointType ep_type);
 void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg);
diff --git a/hw/i386/fw_cfg-smbios-stub.c b/hw/i386/fw_cfg-smbios-stub.c
index 37dbfdee7c..da00ffc9ae 100644
--- a/hw/i386/fw_cfg-smbios-stub.c
+++ b/hw/i386/fw_cfg-smbios-stub.c
@@ -13,3 +13,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
  SmbiosEntryPointType ep_type)
 {
 }
+
+void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg)
+{
+}
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index df05fe060c..be37e28f46 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -54,6 +54,22 @@ static bool smbios_legacy_mode(PCMachineState *pcms)
 return !pc_machine_is_pci_enabled(pcms);
 }
 
+void fw_cfg_build_smbios_legacy(PCMachineState *pcms, FWCfgState *fw_cfg)
+{
+uint8_t *smbios_tables;
+size_t smbios_tables_len;
+MachineState *ms = MACHINE(pcms);
+X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+
+/* tell smbios about cpuid version and features */
+smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
+
+smbios_tables = smbios_get_table_legacy(&smbios_tables_len,
+&error_fatal);
+fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ smbios_tables, smbios_tables_len);
+}
+
 void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
  SmbiosEntryPointType ep_type)
 {
@@ -65,22 +81,17 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 MachineClass *mc = MACHINE_GET_CLASS(pcms);
 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
 
-if (!smbios_legacy_mode(pcms)) {
-/* These values are guest ABI, do not change */
-smbios_set_defaults("QEMU", mc->desc, mc->name);
+if (smbios_legacy_mode(pcms)) {
+fw_cfg_build_smbios_legacy(pcms, fw_cfg);
+return;
 }
 
+/* These values are guest ABI, do not change */
+smbios_set_defaults("QEMU", mc->desc, mc->name);
+
 /* tell smbios about cpuid version and features */
 smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
 
-if (smbios_legacy_mode(pcms)) {
-smbios_tables = smbios_get_table_legacy(&smbios_tables_len,
-&error_fatal);
-fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
- smbios_tables, smbios_tables_len);
-return;
-}
-
 /* build the array of physical mem area from e820 table */
 mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
 for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
-- 
2.41.0




[RFC PATCH-for-9.1 28/29] hw/i386/pc: Rename pc_init1() -> pc_piix_init()

2024-03-28 Thread Philippe Mathieu-Daudé
pc_init1() is specific to the isapc and i440fx/piix machines,
rename it as pc_piix_init(). Expose it in "hw/i386/pc.h" to
be able to call it externally (see next patch).

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 1 +
 hw/i386/pc_piix.c| 8 
 hw/isa/piix.c| 2 +-
 hw/pci-host/i440fx.c | 2 +-
 4 files changed, 7 insertions(+), 6 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 6510914803..9a11835b7e 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -163,6 +163,7 @@ void pc_basic_device_init(struct PCMachineState *pcms,
   bool create_fdctrl,
   uint32_t hpet_irqs);
 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
+void pc_piix_init(MachineState *machine, const char *pci_type);
 
 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
 
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 4f07476cfa..4a3ae72fe4 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -111,7 +111,7 @@ static bool gigabyte_align(PCMachineState *pcms)
 }
 
 /* PC hardware initialisation */
-static void pc_init1(MachineState *machine, const char *pci_type)
+void pc_piix_init(MachineState *machine, const char *pci_type)
 {
 PCMachineState *pcms = PC_MACHINE(machine);
 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
@@ -437,7 +437,7 @@ static void pc_set_south_bridge(Object *obj, int value, 
Error **errp)
 #ifdef CONFIG_ISAPC
 static void pc_init_isa(MachineState *machine)
 {
-pc_init1(machine, NULL);
+pc_piix_init(machine, NULL);
 }
 #endif
 
@@ -447,7 +447,7 @@ static void pc_xen_hvm_init_pci(MachineState *machine)
 const char *pci_type = xen_igd_gfx_pt_enabled() ?
 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : 
TYPE_I440FX_PCI_DEVICE;
 
-pc_init1(machine, pci_type);
+pc_piix_init(machine, pci_type);
 }
 
 static void pc_xen_hvm_init(MachineState *machine)
@@ -472,7 +472,7 @@ static void pc_xen_hvm_init(MachineState *machine)
 if (compat) { \
 compat(machine); \
 } \
-pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \
+pc_piix_init(machine, TYPE_I440FX_PCI_DEVICE); \
 } \
 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \
   TYPE_PC_PCI_MACHINE)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 2d30711b17..14dc9e78be 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -432,7 +432,7 @@ static void pci_piix_class_init(ObjectClass *klass, void 
*data)
 k->class_id = PCI_CLASS_BRIDGE_ISA;
 /*
  * Reason: part of PIIX southbridge, needs to be wired up by e.g.
- * pc_piix.c's pc_init1()
+ * pc_piix.c's pc_piix_init()
  */
 dc->user_creatable = false;
 device_class_set_props(dc, pci_piix_props);
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index add99e4f76..9f47d5507a 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -374,7 +374,7 @@ static void i440fx_pcihost_class_init(ObjectClass *klass, 
void *data)
 dc->realize = i440fx_pcihost_realize;
 dc->fw_name = "pci";
 device_class_set_props(dc, i440fx_props);
-/* Reason: needs to be wired up by pc_init1 */
+/* Reason: needs to be wired up by pc_piix_init */
 dc->user_creatable = false;
 
 object_class_property_add(klass, PCI_HOST_PROP_PCI_HOLE_START, "uint32",
-- 
2.41.0




[RFC PATCH-for-9.1 21/29] hw/i386/fw_cfg: Include missing 'qapi-types-machine.h' header

2024-03-28 Thread Philippe Mathieu-Daudé
"fw_cfg.h" declares fw_cfg_build_smbios() which use
SmbiosEntryPointType, itself declared in "qapi-types-machine.h".

  void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg,
   SmbiosEntryPointType ep_type);
   ^^^^

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/fw_cfg.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h
index 92e310f5fd..7a426119f8 100644
--- a/hw/i386/fw_cfg.h
+++ b/hw/i386/fw_cfg.h
@@ -12,6 +12,7 @@
 #include "hw/boards.h"
 #include "hw/i386/pc.h"
 #include "hw/nvram/fw_cfg.h"
+#include "qapi/qapi-types-machine.h"
 
 #define FW_CFG_IO_BASE 0x510
 
-- 
2.41.0




[RFC PATCH-for-9.1 18/29] hw/i386/pc: Inline has_reserved_memory()

2024-03-28 Thread Philippe Mathieu-Daudé
All PCI-based machines have the has_reserved_memory
field set to %true. Simplify by using an inlined helper
checking whether the machine is PCI-based or not.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h |  1 -
 hw/i386/pc.c | 17 ++---
 hw/i386/pc_piix.c|  1 -
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 758dd5f29b..df4c813854 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -91,7 +91,6 @@ typedef struct PCMachineClass {
 SmbiosEntryPointType default_smbios_ep_type;
 
 /* RAM / address space compat: */
-bool has_reserved_memory;
 bool broken_reserved_end;
 bool enforce_amd_1tb_hole;
 
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 093a7c35f7..e36d76656b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -671,6 +671,11 @@ void xen_load_linux(PCMachineState *pcms)
 #define PC_ROM_ALIGN   0x800
 #define PC_ROM_SIZE(PC_ROM_MAX - PC_ROM_MIN_VGA)
 
+static bool has_reserved_memory(PCMachineState *pcms)
+{
+return pc_machine_is_pci_enabled(pcms);
+}
+
 static hwaddr pc_above_4g_end(PCMachineState *pcms)
 {
 X86MachineState *x86ms = X86_MACHINE(pcms);
@@ -702,12 +707,11 @@ static void pc_get_device_memory_range(PCMachineState 
*pcms,
 
 static uint64_t pc_get_cxl_range_start(PCMachineState *pcms)
 {
-PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
 MachineState *ms = MACHINE(pcms);
 hwaddr cxl_base;
 ram_addr_t size;
 
-if (pcmc->has_reserved_memory &&
+if (has_reserved_memory(pcms) &&
 (ms->ram_size < ms->maxram_size)) {
 pc_get_device_memory_range(pcms, &cxl_base, &size);
 cxl_base += size;
@@ -760,7 +764,7 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms, 
uint64_t pci_hole64_size)
  * calculating the highest possible GPA so that we can properly report
  * if someone configures them on a CPU that cannot possibly address them.
  */
-if (pcmc->has_reserved_memory &&
+if (has_reserved_memory(pcms) &&
 (ms->ram_size < ms->maxram_size)) {
 hwaddr devmem_start;
 ram_addr_t devmem_size;
@@ -891,7 +895,7 @@ void pc_memory_init(PCMachineState *pcms,
 e820_add_entry(pcms->sgx_epc.base, pcms->sgx_epc.size, E820_RESERVED);
 }
 
-if (!pcmc->has_reserved_memory &&
+if (!has_reserved_memory(pcms) &&
 (machine->ram_slots ||
  (machine->maxram_size > machine->ram_size))) {
 
@@ -901,7 +905,7 @@ void pc_memory_init(PCMachineState *pcms,
 }
 
 /* initialize device memory address space */
-if (pcmc->has_reserved_memory &&
+if (has_reserved_memory(pcms) &&
 (machine->ram_size < machine->maxram_size)) {
 ram_addr_t device_mem_size;
 hwaddr device_mem_base;
@@ -1024,7 +1028,7 @@ uint64_t pc_pci_hole64_start(void)
 
 if (ppms->cxl_devices_state.is_enabled) {
 hole64_start = pc_get_cxl_range_end(pcms);
-} else if (pcmc->has_reserved_memory && (ms->ram_size < ms->maxram_size)) {
+} else if (has_reserved_memory(pcms) && (ms->ram_size < ms->maxram_size)) {
 pc_get_device_memory_range(pcms, &hole64_start, &size);
 if (!pcmc->broken_reserved_end) {
 hole64_start += size;
@@ -1752,7 +1756,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
 pcmc->smbios_defaults = true;
-pcmc->has_reserved_memory = true;
 pcmc->enforce_amd_1tb_hole = true;
 pcmc->pvh_enabled = true;
 pcmc->kvmclock_create_always = true;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 0bc14da768..e6178f8653 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -830,7 +830,6 @@ static void isapc_machine_options(MachineClass *m)
 m->rom_file_has_mr = false;
 pcmc->smbios_defaults = false;
 pcmc->smbios_legacy_mode = true;
-pcmc->has_reserved_memory = false;
 m->default_nic = "ne2k_isa";
 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
-- 
2.41.0




[RFC PATCH-for-9.1 20/29] hw/i386/pc: Pass PcPciMachineState argument to pc_pci_hole64_start()

2024-03-28 Thread Philippe Mathieu-Daudé
pc_pci_hole64_start() is only used by PCI-based
machines.  Pass it a PcPciMachineState argument,
removing a qdev_get_machine() call.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 2 +-
 hw/i386/pc.c | 8 
 hw/pci-host/i440fx.c | 2 +-
 hw/pci-host/q35.c| 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index df4c813854..7da0bc8aa4 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -157,7 +157,7 @@ void pc_memory_init(PCMachineState *pcms,
 MemoryRegion *system_memory,
 MemoryRegion *rom_memory,
 uint64_t pci_hole64_size);
-uint64_t pc_pci_hole64_start(void);
+uint64_t pc_pci_hole64_start(PcPciMachineState *ppms);
 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
 void pc_basic_device_init(struct PCMachineState *pcms,
   ISABus *isa_bus, qemu_irq *gsi,
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index d8e91d18b8..b83abee8e9 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -747,7 +747,8 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms, 
uint64_t pci_hole64_size)
 
 if (cpu->env.features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
 /* 64-bit systems */
-return pc_pci_hole64_start() + pci_hole64_size - 1;
+PcPciMachineState *ppms = PC_PCI_MACHINE(pcms);
+return pc_pci_hole64_start(ppms) + pci_hole64_size - 1;
 }
 
 /* 32-bit systems */
@@ -1016,11 +1017,10 @@ void pc_memory_init(PCMachineState *pcms,
  * The 64bit pci hole starts after "above 4G RAM" and
  * potentially the space reserved for memory hotplug.
  */
-uint64_t pc_pci_hole64_start(void)
+uint64_t pc_pci_hole64_start(PcPciMachineState *ppms)
 {
-PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
+PCMachineState *pcms = PC_MACHINE(ppms);
 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
-PcPciMachineState *ppms = PC_PCI_MACHINE(pcms);
 MachineState *ms = MACHINE(pcms);
 uint64_t hole64_start = 0;
 ram_addr_t size = 0;
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index 4f0a0438d7..add99e4f76 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -180,7 +180,7 @@ static uint64_t 
i440fx_pcihost_get_pci_hole64_start_value(Object *obj)
 pci_bus_get_w64_range(h->bus, &w64);
 value = range_is_empty(&w64) ? 0 : range_lob(&w64);
 if (!value && s->pci_hole64_fix) {
-value = pc_pci_hole64_start();
+value = pc_pci_hole64_start(PC_PCI_MACHINE(qdev_get_machine()));
 }
 return value;
 }
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 0d7d4e3f08..baf55897b2 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -123,7 +123,7 @@ static uint64_t q35_host_get_pci_hole64_start_value(Object 
*obj)
 pci_bus_get_w64_range(h->bus, &w64);
 value = range_is_empty(&w64) ? 0 : range_lob(&w64);
 if (!value && s->pci_hole64_fix) {
-value = pc_pci_hole64_start();
+value = pc_pci_hole64_start(PC_PCI_MACHINE(qdev_get_machine()));
 }
 return value;
 }
-- 
2.41.0




[RFC PATCH-for-9.1 25/29] hw/i386/fw_cfg: Replace smbios_defaults() by !smbios_legacy_mode()

2024-03-28 Thread Philippe Mathieu-Daudé
smbios_defaults() and smbios_legacy_mode() are logical
opposite. Simplify using the latter.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/fw_cfg.c | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index ffa60a4a33..df05fe060c 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -49,11 +49,6 @@ const char *fw_cfg_arch_key_name(uint16_t key)
 }
 
 #ifdef CONFIG_SMBIOS
-static bool smbios_defaults(PCMachineState *pcms)
-{
-return pc_machine_is_pci_enabled(pcms);
-}
-
 static bool smbios_legacy_mode(PCMachineState *pcms)
 {
 return !pc_machine_is_pci_enabled(pcms);
@@ -70,7 +65,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState 
*fw_cfg,
 MachineClass *mc = MACHINE_GET_CLASS(pcms);
 X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
 
-if (smbios_defaults(pcms)) {
+if (!smbios_legacy_mode(pcms)) {
 /* These values are guest ABI, do not change */
 smbios_set_defaults("QEMU", mc->desc, mc->name);
 }
-- 
2.41.0




[RFC PATCH-for-9.1 13/29] hw/i386/pc: Remove non-PCI code from pc_system_firmware_init()

2024-03-28 Thread Philippe Mathieu-Daudé
x86_bios_rom_init() is the single non-PCI-machine call
from pc_system_firmware_init(). Extract it to the caller.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c   | 6 +-
 hw/i386/pc_sysfw.c | 5 +
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f184808e3e..5b96daa414 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -956,7 +956,11 @@ void pc_memory_init(PCMachineState *pcms,
 }
 
 /* Initialize PC system firmware */
-pc_system_firmware_init(pcms, rom_memory);
+if (pci_enabled) {
+pc_system_firmware_init(pcms, rom_memory);
+} else {
+x86_bios_rom_init(machine, "bios.bin", rom_memory, true);
+}
 
 option_rom_mr = g_malloc(sizeof(*option_rom_mr));
 memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
diff --git a/hw/i386/pc_sysfw.c b/hw/i386/pc_sysfw.c
index 862a082b0a..541dcaef71 100644
--- a/hw/i386/pc_sysfw.c
+++ b/hw/i386/pc_sysfw.c
@@ -202,10 +202,7 @@ void pc_system_firmware_init(PCMachineState *pcms,
 int i;
 BlockBackend *pflash_blk[ARRAY_SIZE(pcms->flash)];
 
-if (!pc_machine_is_pci_enabled(pcms)) {
-x86_bios_rom_init(MACHINE(pcms), "bios.bin", rom_memory, true);
-return;
-}
+assert(pc_machine_is_pci_enabled(pcms));
 
 /* Map legacy -drive if=pflash to machine properties */
 for (i = 0; i < ARRAY_SIZE(pcms->flash); i++) {
-- 
2.41.0




[RFC PATCH-for-9.1 11/29] hw/i386/pc: Move acpi_setup() call to pc_pci_machine_done()

2024-03-28 Thread Philippe Mathieu-Daudé
acpi_setup() returns early if acpi_build_enabled is not set:

  2752 void acpi_setup(PCMachineState *pcms)
  2753 {
   ...
  2768 if (!pcms->acpi_build_enabled) {
  2769 ACPI_BUILD_DPRINTF("ACPI build disabled. Bailing out.\n");
  2770 return;
  2771 }

acpi_build_enabled is only set on PCI-based machines, so it
is pointless to call acpi_setup() from non-PCI like the ISA-only
machine, move the call to pc_pci_machine_done().

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f0dc04e2fc..47fe3a7c02 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -601,7 +601,6 @@ void pc_machine_done(Notifier *notifier, void *data)
 /* set the number of CPUs */
 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
 
-acpi_setup(pcms);
 if (x86ms->fw_cfg) {
 fw_cfg_build_smbios(pcms, x86ms->fw_cfg, 
pcms->smbios_entry_point_type);
 fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg);
@@ -627,6 +626,8 @@ static void pc_pci_machine_done(Notifier *notifier, void 
*data)
 }
 
 fw_cfg_add_extra_pci_roots(pcms->pcibus, x86ms->fw_cfg);
+
+acpi_setup(pcms);
 }
 
 /* setup pci memory address space mapping into system address space */
-- 
2.41.0




[RFC PATCH-for-9.1 12/29] hw/i386/pc: Move acpi_build_enabled to PcPciMachineState

2024-03-28 Thread Philippe Mathieu-Daudé
Since only PCI-based machines use the 'acpi_build_enabled',
move it to PcPciMachineState.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/acpi-build.h  | 2 +-
 include/hw/i386/pc.h  | 3 ++-
 hw/i386/acpi-build.c  | 8 
 hw/i386/pc.c  | 5 ++---
 hw/i386/xen/xen-hvm.c | 3 ++-
 5 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 31de5bddbd..4c1511c432 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -10,7 +10,7 @@ extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
 #define ACPI_PCIHP_SEJ_BASE 0x8
 #define ACPI_PCIHP_BNMR_BASE 0x10
 
-void acpi_setup(PCMachineState *pcms);
+void acpi_setup(PcPciMachineState *ppms);
 Object *acpi_get_i386_pci_host(void);
 
 #endif
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index dd5ee448ef..67f8f4730b 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -41,7 +41,6 @@ typedef struct PCMachineState {
 SmbiosEntryPointType smbios_entry_point_type;
 const char *south_bridge;
 
-bool acpi_build_enabled;
 bool smbus_enabled;
 bool sata_enabled;
 bool hpet_enabled;
@@ -61,6 +60,8 @@ typedef struct PcPciMachineState {
 
 Notifier machine_done;
 
+bool acpi_build_enabled;
+
 CXLState cxl_devices_state;
 } PcPciMachineState;
 
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index e702d5e9d2..ee0e99a2fa 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2749,9 +2749,9 @@ static const VMStateDescription vmstate_acpi_build = {
 },
 };
 
-void acpi_setup(PCMachineState *pcms)
+void acpi_setup(PcPciMachineState *ppms)
 {
-X86MachineState *x86ms = X86_MACHINE(pcms);
+X86MachineState *x86ms = X86_MACHINE(ppms);
 AcpiBuildTables tables;
 AcpiBuildState *build_state;
 Object *vmgenid_dev;
@@ -2765,7 +2765,7 @@ void acpi_setup(PCMachineState *pcms)
 return;
 }
 
-if (!pcms->acpi_build_enabled) {
+if (!ppms->acpi_build_enabled) {
 ACPI_BUILD_DPRINTF("ACPI build disabled. Bailing out.\n");
 return;
 }
@@ -2778,7 +2778,7 @@ void acpi_setup(PCMachineState *pcms)
 build_state = g_malloc0(sizeof *build_state);
 
 acpi_build_tables_init(&tables);
-acpi_build(&tables, MACHINE(pcms));
+acpi_build(&tables, MACHINE(ppms));
 
 /* Now expose it all to Guest */
 build_state->table_mr = acpi_add_rom_blob(acpi_build_update,
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 47fe3a7c02..f184808e3e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -627,7 +627,7 @@ static void pc_pci_machine_done(Notifier *notifier, void 
*data)
 
 fw_cfg_add_extra_pci_roots(pcms->pcibus, x86ms->fw_cfg);
 
-acpi_setup(pcms);
+acpi_setup(ppms);
 }
 
 /* setup pci memory address space mapping into system address space */
@@ -1687,9 +1687,8 @@ static void pc_machine_initfn(Object *obj)
 static void pc_pci_machine_initfn(Object *obj)
 {
 PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
-PCMachineState *pcms = PC_MACHINE(obj);
 
-pcms->acpi_build_enabled = true;
+ppms->acpi_build_enabled = true;
 
 cxl_machine_init(obj, &ppms->cxl_devices_state);
 
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 7745cb3963..ce48d51842 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -586,6 +586,7 @@ static void xen_wakeup_notifier(Notifier *notifier, void 
*data)
 void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion **ram_memory)
 {
 MachineState *ms = MACHINE(pcms);
+PcPciMachineState *ppms = PC_PCI_MACHINE(pcms);
 unsigned int max_cpus = ms->smp.max_cpus;
 int rc;
 xen_pfn_t ioreq_pfn;
@@ -624,7 +625,7 @@ void xen_hvm_init_pc(PCMachineState *pcms, MemoryRegion 
**ram_memory)
 xen_ram_init(pcms, ms->ram_size, ram_memory);
 
 /* Disable ACPI build because Xen handles it */
-pcms->acpi_build_enabled = false;
+ppms->acpi_build_enabled = false;
 
 return;
 
-- 
2.41.0




[RFC PATCH-for-9.1 08/29] hw/i386/pc: Move CXLState to PcPciMachineState

2024-03-28 Thread Philippe Mathieu-Daudé
CXL depends on PCIe, which isn't available on non-PCI
machines such the ISA-only PC one.
Move CXLState to PcPciMachineState, and move the CXL
specific calls to pc_pci_machine_initfn() and
pc_pci_machine_done().

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h |  3 ++-
 hw/i386/acpi-build.c | 14 +++---
 hw/i386/pc.c | 39 ---
 3 files changed, 33 insertions(+), 23 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 24c8e17e62..a97493d29d 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -54,13 +54,14 @@ typedef struct PCMachineState {
 hwaddr memhp_io_base;
 
 SGXEPCState sgx_epc;
-CXLState cxl_devices_state;
 } PCMachineState;
 
 typedef struct PcPciMachineState {
 PCMachineState parent_obj;
 
 Notifier machine_done;
+
+CXLState cxl_devices_state;
 } PcPciMachineState;
 
 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b9890886f6..6e8e32e5d2 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1554,6 +1554,11 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 crs_range_set_init(&crs_range_set);
 bus = PC_MACHINE(machine)->pcibus;
 if (bus) {
+PcPciMachineState *ppms;
+
+assert(pc_machine_is_pci_enabled(pcms));
+ppms = PC_PCI_MACHINE(machine);
+
 QLIST_FOREACH(bus, &bus->child, sibling) {
 uint8_t bus_num = pci_bus_num(bus);
 uint8_t numa_node = pci_bus_numa_node(bus);
@@ -1607,7 +1612,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 
 /* Handle the ranges for the PXB expanders */
 if (pci_bus_is_cxl(bus)) {
-MemoryRegion *mr = &pcms->cxl_devices_state.host_mr;
+MemoryRegion *mr = &ppms->cxl_devices_state.host_mr;
 uint64_t base = mr->addr;
 
 cxl_present = true;
@@ -2513,6 +2518,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState 
*machine)
 Object *vmgenid_dev;
 char *oem_id;
 char *oem_table_id;
+bool pci_enabled = pc_machine_is_pci_enabled(pcms);
+PcPciMachineState *ppms = pci_enabled ? PC_PCI_MACHINE(pcms) : NULL;
 
 acpi_get_pm_info(machine, &pm);
 acpi_get_misc_info(&misc);
@@ -2640,9 +2647,10 @@ void acpi_build(AcpiBuildTables *tables, MachineState 
*machine)
   machine->nvdimms_state, machine->ram_slots,
   x86ms->oem_id, x86ms->oem_table_id);
 }
-if (pcms->cxl_devices_state.is_enabled) {
+if (ppms && ppms->cxl_devices_state.is_enabled) {
 cxl_build_cedt(table_offsets, tables_blob, tables->linker,
-   x86ms->oem_id, x86ms->oem_table_id, 
&pcms->cxl_devices_state);
+   x86ms->oem_id, x86ms->oem_table_id,
+   &ppms->cxl_devices_state);
 }
 
 acpi_add_table(table_offsets, tables_blob);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index f9226f7115..6d87d1d4c2 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -598,13 +598,6 @@ void pc_machine_done(Notifier *notifier, void *data)
 PCMachineState, machine_done);
 X86MachineState *x86ms = X86_MACHINE(pcms);
 
-cxl_hook_up_pxb_registers(pcms->pcibus, &pcms->cxl_devices_state,
-  &error_fatal);
-
-if (pcms->cxl_devices_state.is_enabled) {
-cxl_fmws_link_targets(&pcms->cxl_devices_state, &error_fatal);
-}
-
 /* set the number of CPUs */
 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
 
@@ -626,6 +619,13 @@ static void pc_pci_machine_done(Notifier *notifier, void 
*data)
 PCMachineState *pcms = PC_MACHINE(ppms);
 X86MachineState *x86ms = X86_MACHINE(pcms);
 
+cxl_hook_up_pxb_registers(pcms->pcibus, &ppms->cxl_devices_state,
+  &error_fatal);
+
+if (ppms->cxl_devices_state.is_enabled) {
+cxl_fmws_link_targets(&ppms->cxl_devices_state, &error_fatal);
+}
+
 fw_cfg_add_extra_pci_roots(pcms->pcibus, x86ms->fw_cfg);
 }
 
@@ -719,13 +719,14 @@ static uint64_t pc_get_cxl_range_start(PCMachineState 
*pcms)
 
 static uint64_t pc_get_cxl_range_end(PCMachineState *pcms)
 {
+PcPciMachineState *ppms = PC_PCI_MACHINE(pcms);
 uint64_t start = pc_get_cxl_range_start(pcms) + MiB;
 
-if (pcms->cxl_devices_state.fixed_windows) {
+if (ppms->cxl_devices_state.fixed_windows) {
 GList *it;
 
 start = ROUND_UP(start, 256 * MiB);
-for (it = pcms->cxl_devices_state.fixed_windows; it; it = it->next) {
+for (it = ppms->cxl_devices_state.fixed_windows; it; it = it->next) {
 CXLFixedWindow *fw = it->data;
 start += fw->size;

[RFC PATCH-for-9.1 10/29] hw/i386/pc: Remove PCMachineClass::has_acpi_build field

2024-03-28 Thread Philippe Mathieu-Daudé
PCMachineClass::has_acpi_build is always %true for PCI
based machines. Remove it, setting the 'acpi_build_enabled'
field once in pc_pci_machine_initfn().

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 3 ---
 hw/i386/pc.c | 6 +++---
 hw/i386/pc_piix.c| 1 -
 3 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index a97493d29d..dd5ee448ef 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -95,9 +95,6 @@ typedef struct PCMachineClass {
 /* Default CPU model version.  See x86_cpu_set_default_version(). */
 int default_cpu_version;
 
-/* ACPI compat: */
-bool has_acpi_build;
-
 /* SMBIOS compat: */
 bool smbios_defaults;
 bool smbios_legacy_mode;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index dfc0247bb6..f0dc04e2fc 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1664,8 +1664,6 @@ static void pc_machine_initfn(Object *obj)
 pcms->smbios_entry_point_type = pcmc->default_smbios_ep_type;
 pcms->south_bridge = pcmc->default_south_bridge;
 
-/* acpi build is enabled by default if machine supports it */
-pcms->acpi_build_enabled = pcmc->has_acpi_build;
 pcms->smbus_enabled = true;
 pcms->sata_enabled = true;
 pcms->i8042_enabled = true;
@@ -1688,6 +1686,9 @@ static void pc_machine_initfn(Object *obj)
 static void pc_pci_machine_initfn(Object *obj)
 {
 PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
+PCMachineState *pcms = PC_MACHINE(obj);
+
+pcms->acpi_build_enabled = true;
 
 cxl_machine_init(obj, &ppms->cxl_devices_state);
 
@@ -1745,7 +1746,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
-pcmc->has_acpi_build = true;
 pcmc->smbios_defaults = true;
 pcmc->gigabyte_align = true;
 pcmc->has_reserved_memory = true;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c42dd46e59..7aa2598e10 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -816,7 +816,6 @@ static void isapc_machine_options(MachineClass *m)
 m->max_cpus = 1;
 m->option_rom_has_mr = true;
 m->rom_file_has_mr = false;
-pcmc->has_acpi_build = false;
 pcmc->smbios_defaults = false;
 pcmc->gigabyte_align = false;
 pcmc->smbios_legacy_mode = true;
-- 
2.41.0




[RFC PATCH-for-9.1 06/29] hw/i386/pc: Move pci_root_uid field to PcPciMachineClass

2024-03-28 Thread Philippe Mathieu-Daudé
The 'pci_root_uid' field is irrelevant for non-PCI
machines, restrict it to the PcPciMachineClass.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 4 +++-
 hw/i386/acpi-build.c | 9 +++--
 hw/i386/pc_piix.c| 7 +--
 hw/i386/pc_q35.c | 7 +--
 4 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 0b23e5ec7b..24c8e17e62 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -96,7 +96,6 @@ typedef struct PCMachineClass {
 
 /* ACPI compat: */
 bool has_acpi_build;
-int pci_root_uid;
 
 /* SMBIOS compat: */
 bool smbios_defaults;
@@ -127,6 +126,9 @@ typedef struct PCMachineClass {
 
 typedef struct PcPciMachineClass {
 PCMachineClass parent_class;
+
+/* ACPI compat: */
+int pci_root_uid;
 } PcPciMachineClass;
 
 #define TYPE_PC_MACHINE "common-pc-machine"
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6f9925d176..b9890886f6 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1426,6 +1426,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 CrsRangeSet crs_range_set;
 PCMachineState *pcms = PC_MACHINE(machine);
 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine);
+PcPciMachineClass *ppmc;
 X86MachineState *x86ms = X86_MACHINE(machine);
 AcpiMcfgInfo mcfg;
 bool mcfg_valid = !!acpi_get_mcfg(&mcfg);
@@ -1448,10 +1449,12 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 
 build_dbg_aml(dsdt);
 if (i440fx) {
+ppmc = PC_PCI_MACHINE_GET_CLASS(machine);
+
 sb_scope = aml_scope("_SB");
 dev = aml_device("PCI0");
 aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
-aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
+aml_append(dev, aml_name_decl("_UID", aml_int(ppmc->pci_root_uid)));
 aml_append(dev, aml_pci_edsm());
 aml_append(sb_scope, dev);
 aml_append(dsdt, sb_scope);
@@ -1461,11 +1464,13 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 }
 build_piix4_pci0_int(dsdt);
 } else if (q35) {
+ppmc = PC_PCI_MACHINE_GET_CLASS(machine);
+
 sb_scope = aml_scope("_SB");
 dev = aml_device("PCI0");
 aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
 aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
-aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
+aml_append(dev, aml_name_decl("_UID", aml_int(ppmc->pci_root_uid)));
 aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
 aml_append(dev, aml_pci_edsm());
 aml_append(sb_scope, dev);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 776d02db73..c42dd46e59 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -468,9 +468,11 @@ static void pc_xen_hvm_init(MachineState *machine)
 static void pc_i440fx_machine_options(MachineClass *m)
 {
 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
+PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
 ObjectClass *oc = OBJECT_CLASS(m);
+
 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
-pcmc->pci_root_uid = 0;
+ppmc->pci_root_uid = 0;
 pcmc->default_cpu_version = 1;
 
 m->family = "pc_piix";
@@ -622,12 +624,13 @@ DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
 static void pc_i440fx_5_1_machine_options(MachineClass *m)
 {
 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
+PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
 
 pc_i440fx_5_2_machine_options(m);
 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
 pcmc->kvmclock_create_always = false;
-pcmc->pci_root_uid = 1;
+ppmc->pci_root_uid = 1;
 }
 
 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index c3b0467ef3..dc0bf85464 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -345,7 +345,9 @@ static void pc_q35_init(MachineState *machine)
 static void pc_q35_machine_options(MachineClass *m)
 {
 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-pcmc->pci_root_uid = 0;
+PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
+
+ppmc->pci_root_uid = 0;
 pcmc->default_cpu_version = 1;
 
 m->family = "pc_q35";
@@ -495,12 +497,13 @@ DEFINE_Q35_MACHINE(v5_2, "pc-q35-5.2", NULL,
 static void pc_q35_5_1_machine_options(MachineClass *m)
 {
 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
+PcPciMachineClass *ppmc = PC_PCI_MACHINE_CLASS(m);
 
 pc_q35_5_2_machine_options(m);
 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
 pcmc->kvmclock_create_always = false;
-pcmc->pci_root_uid = 1;
+ppmc->pci_root_uid = 1;
 }
 
 DEFINE_Q35_MACHINE(v5_1, "pc-q35-5.1", NULL,
-- 
2.41.0




[RFC PATCH-for-9.1 04/29] hw/i386/pc: Introduce PC_PCI_MACHINE QOM type

2024-03-28 Thread Philippe Mathieu-Daudé
Introduce TYPE_PC_PCI_MACHINE for machines where PCI
is expected (as opposition to the ISA-only PC machine).

This type inherits from the well known TYPE_PC_MACHINE.

Convert I440FX/PIIX and Q35 machines to use it.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 25 -
 hw/i386/pc.c | 25 +
 hw/i386/pc_piix.c|  6 +++---
 hw/i386/pc_q35.c |  2 +-
 4 files changed, 45 insertions(+), 13 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 33023ebbbe..1a4a61148a 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -22,11 +22,8 @@
  * @boot_cpus: number of present VCPUs
  */
 typedef struct PCMachineState {
-/*< private >*/
 X86MachineState parent_obj;
 
-/*  */
-
 /* State for other subsystems/APIs: */
 Notifier machine_done;
 
@@ -60,6 +57,12 @@ typedef struct PCMachineState {
 CXLState cxl_devices_state;
 } PCMachineState;
 
+typedef struct PcPciMachineState {
+PCMachineState parent_obj;
+
+Notifier machine_done;
+} PcPciMachineState;
+
 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
 #define PC_MACHINE_VMPORT   "vmport"
@@ -80,12 +83,9 @@ typedef struct PCMachineState {
  *  way we can use 1GByte pages in the host.
  *
  */
-struct PCMachineClass {
-/*< private >*/
+typedef struct PCMachineClass {
 X86MachineClass parent_class;
 
-/*< public >*/
-
 /* Device configuration: */
 bool pci_enabled;
 const char *default_south_bridge;
@@ -124,13 +124,20 @@ struct PCMachineClass {
  * check for memory.
  */
 bool broken_32bit_mem_addr_check;
-};
+} PCMachineClass;
 
-#define TYPE_PC_MACHINE "generic-pc-machine"
+typedef struct PcPciMachineClass {
+PCMachineClass parent_class;
+} PcPciMachineClass;
+
+#define TYPE_PC_MACHINE "common-pc-machine"
 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
 
 bool pc_machine_is_pci_enabled(PCMachineState *pcms);
 
+#define TYPE_PC_PCI_MACHINE "pci-pc-machine"
+OBJECT_DECLARE_TYPE(PcPciMachineState, PcPciMachineClass, PC_PCI_MACHINE)
+
 /* ioapic.c */
 
 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7065f11e97..eafd521489 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -621,6 +621,10 @@ void pc_machine_done(Notifier *notifier, void *data)
 pc_cmos_init_late(pcms);
 }
 
+static void pc_pci_machine_done(Notifier *notifier, void *data)
+{
+}
+
 /* setup pci memory address space mapping into system address space */
 void pc_pci_as_mapping_init(MemoryRegion *system_memory,
 MemoryRegion *pci_address_space)
@@ -1678,6 +1682,14 @@ static void pc_machine_initfn(Object *obj)
 qemu_add_machine_init_done_notifier(&pcms->machine_done);
 }
 
+static void pc_pci_machine_initfn(Object *obj)
+{
+PcPciMachineState *ppms = PC_PCI_MACHINE(obj);
+
+ppms->machine_done.notify = pc_pci_machine_done;
+qemu_add_machine_init_done_notifier(&ppms->machine_done);
+}
+
 static void pc_machine_reset(MachineState *machine, ShutdownCause reason)
 {
 CPUState *cs;
@@ -1812,6 +1824,10 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 pc_machine_set_fd_bootchk);
 }
 
+static void pc_pci_machine_class_init(ObjectClass *oc, void *data)
+{
+}
+
 bool pc_machine_is_pci_enabled(PCMachineState *pcms)
 {
 return PC_MACHINE_GET_CLASS(pcms)->pci_enabled;
@@ -1831,6 +1847,15 @@ static const TypeInfo pc_machine_types[] = {
  { }
 },
 },
+{
+.name   = TYPE_PC_PCI_MACHINE,
+.parent = TYPE_PC_MACHINE,
+.abstract   = true,
+.instance_size  = sizeof(PcPciMachineState),
+.instance_init  = pc_pci_machine_initfn,
+.class_size = sizeof(PcPciMachineClass),
+.class_init = pc_pci_machine_class_init,
+},
 };
 
 DEFINE_TYPES(pc_machine_types)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index b9f85148e3..7ada452f91 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -463,7 +463,7 @@ static void pc_xen_hvm_init(MachineState *machine)
 pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \
 } \
 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \
-  TYPE_PC_MACHINE)
+  TYPE_PC_PCI_MACHINE)
 
 static void pc_i440fx_machine_options(MachineClass *m)
 {
@@ -838,7 +838,7 @@ static void xenfv_4_2_machine_options(MachineClass *m)
 }
 
 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
-  xenfv_4_2_machine_options, TYPE_PC_MACHINE);
+  xenfv_4_2_machine_options, TYPE_PC_PCI_MACHINE);
 
 static void xenfv_3_1_machine_options(MachineClass *m)
 {
@@ -850,5 +850,5 @@ static

[RFC PATCH-for-9.1 07/29] hw/i386/pc: Call fw_cfg_add_extra_pci_roots() in pc_pci_machine_done()

2024-03-28 Thread Philippe Mathieu-Daudé
fw_cfg_add_extra_pci_roots() expects a PCI bus, which only
PCI-based machines have. No need to call it on the ISA-only
machine. Move it to the PCI-specific machine_done handler.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a16bb1554c..f9226f7115 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -608,8 +608,6 @@ void pc_machine_done(Notifier *notifier, void *data)
 /* set the number of CPUs */
 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
 
-fw_cfg_add_extra_pci_roots(pcms->pcibus, x86ms->fw_cfg);
-
 acpi_setup();
 if (x86ms->fw_cfg) {
 fw_cfg_build_smbios(pcms, x86ms->fw_cfg, 
pcms->smbios_entry_point_type);
@@ -623,6 +621,12 @@ void pc_machine_done(Notifier *notifier, void *data)
 
 static void pc_pci_machine_done(Notifier *notifier, void *data)
 {
+PcPciMachineState *ppms = container_of(notifier,
+   PcPciMachineState, machine_done);
+PCMachineState *pcms = PC_MACHINE(ppms);
+X86MachineState *x86ms = X86_MACHINE(pcms);
+
+fw_cfg_add_extra_pci_roots(pcms->pcibus, x86ms->fw_cfg);
 }
 
 /* setup pci memory address space mapping into system address space */
-- 
2.41.0




[RFC PATCH-for-9.1 05/29] hw/i386/pc: Remove PCMachineClass::pci_enabled field

2024-03-28 Thread Philippe Mathieu-Daudé
All TYPE_PC_PCI_MACHINE-based machines have pci_enabled
set to %true. By checking a TYPE_PC_MACHINE inherits the
TYPE_PC_PCI_MACHINE base class, we don't need this field
anymore.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 1 -
 hw/i386/pc.c | 3 +--
 hw/i386/pc_piix.c| 1 -
 3 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 1a4a61148a..0b23e5ec7b 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -87,7 +87,6 @@ typedef struct PCMachineClass {
 X86MachineClass parent_class;
 
 /* Device configuration: */
-bool pci_enabled;
 const char *default_south_bridge;
 
 /* Compat options: */
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index eafd521489..a16bb1554c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1740,7 +1740,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
-pcmc->pci_enabled = true;
 pcmc->has_acpi_build = true;
 pcmc->smbios_defaults = true;
 pcmc->gigabyte_align = true;
@@ -1830,7 +1829,7 @@ static void pc_pci_machine_class_init(ObjectClass *oc, 
void *data)
 
 bool pc_machine_is_pci_enabled(PCMachineState *pcms)
 {
-return PC_MACHINE_GET_CLASS(pcms)->pci_enabled;
+return !!object_dynamic_cast(OBJECT(pcms), TYPE_PC_PCI_MACHINE);
 }
 
 static const TypeInfo pc_machine_types[] = {
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 7ada452f91..776d02db73 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -813,7 +813,6 @@ static void isapc_machine_options(MachineClass *m)
 m->max_cpus = 1;
 m->option_rom_has_mr = true;
 m->rom_file_has_mr = false;
-pcmc->pci_enabled = false;
 pcmc->has_acpi_build = false;
 pcmc->smbios_defaults = false;
 pcmc->gigabyte_align = false;
-- 
2.41.0




[RFC PATCH-for-9.1 02/29] hw/i386/pc: Extract pc_machine_is_pci_enabled() helper

2024-03-28 Thread Philippe Mathieu-Daudé
Introduce the pc_machine_is_pci_enabled() helper to be
able to alter PCMachineClass fields later.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h |  2 ++
 hw/i386/pc.c | 11 +--
 hw/i386/pc_piix.c| 11 ++-
 hw/i386/pc_q35.c |  2 +-
 hw/i386/pc_sysfw.c   | 11 ---
 5 files changed, 22 insertions(+), 15 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 0ad971782c..6b885424bb 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -129,6 +129,8 @@ struct PCMachineClass {
 #define TYPE_PC_MACHINE "generic-pc-machine"
 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
 
+bool pc_machine_is_pci_enabled(PCMachineState *pcms);
+
 /* ioapic.c */
 
 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 2c41b08478..7065f11e97 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -814,6 +814,7 @@ void pc_memory_init(PCMachineState *pcms,
 hwaddr maxphysaddr, maxusedaddr;
 hwaddr cxl_base, cxl_resv_end = 0;
 X86CPU *cpu = X86_CPU(first_cpu);
+bool pci_enabled = pc_machine_is_pci_enabled(pcms);
 
 assert(machine->ram_size == x86ms->below_4g_mem_size +
 x86ms->above_4g_mem_size);
@@ -949,7 +950,7 @@ void pc_memory_init(PCMachineState *pcms,
 option_rom_mr = g_malloc(sizeof(*option_rom_mr));
 memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
&error_fatal);
-if (pcmc->pci_enabled) {
+if (pci_enabled) {
 memory_region_set_readonly(option_rom_mr, true);
 }
 memory_region_add_subregion_overlap(rom_memory,
@@ -1642,6 +1643,7 @@ static void pc_machine_initfn(Object *obj)
 {
 PCMachineState *pcms = PC_MACHINE(obj);
 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
+bool pci_enabled = pc_machine_is_pci_enabled(pcms);
 
 #ifdef CONFIG_VMPORT
 pcms->vmport = ON_OFF_AUTO_AUTO;
@@ -1668,7 +1670,7 @@ static void pc_machine_initfn(Object *obj)
 pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
 object_property_add_alias(OBJECT(pcms), "pcspk-audiodev",
   OBJECT(pcms->pcspk), "audiodev");
-if (pcmc->pci_enabled) {
+if (pci_enabled) {
 cxl_machine_init(obj, &pcms->cxl_devices_state);
 }
 
@@ -1810,6 +1812,11 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 pc_machine_set_fd_bootchk);
 }
 
+bool pc_machine_is_pci_enabled(PCMachineState *pcms)
+{
+return PC_MACHINE_GET_CLASS(pcms)->pci_enabled;
+}
+
 static const TypeInfo pc_machine_types[] = {
 {
 .name   = TYPE_PC_MACHINE,
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index c00d2a66a6..1be1e050c7 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -117,6 +117,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 MemoryRegion *rom_memory = system_memory;
 ram_addr_t lowmem;
 uint64_t hole64_size = 0;
+bool pci_enabled = pc_machine_is_pci_enabled(pcms);
 
 /*
  * Calculate ram split, for memory below and above 4G.  It's a bit
@@ -187,7 +188,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 kvmclock_create(pcmc->kvmclock_create_always);
 }
 
-if (pcmc->pci_enabled) {
+if (pci_enabled) {
 pci_memory = g_new(MemoryRegion, 1);
 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
 rom_memory = pci_memory;
@@ -234,9 +235,9 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 }
 }
 
-gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
+gsi_state = pc_gsi_create(&x86ms->gsi, pci_enabled);
 
-if (pcmc->pci_enabled) {
+if (pci_enabled) {
 PCIDevice *pci_dev;
 DeviceState *dev;
 size_t i;
@@ -308,7 +309,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 x86_register_ferr_irq(x86ms->gsi[13]);
 }
 
-pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL);
+pc_vga_init(isa_bus, pci_enabled ? pcms->pcibus : NULL);
 
 assert(pcms->vmport != ON_OFF_AUTO__MAX);
 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
@@ -322,7 +323,7 @@ static void pc_init1(MachineState *machine, const char 
*pci_type)
 pc_nic_init(pcmc, isa_bus, pcms->pcibus);
 
 #ifdef CONFIG_IDE_ISA
-if (!pcmc->pci_enabled) {
+if (!pci_enabled) {
 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 int i;
 
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index b5922b44af..43ee1e595c 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -145,7 +145,7 @@ static void pc_q35_init(MachineState *machine)
 bool keep_pci_slot_hpc;
 uint64_t pci_hole64_size = 0;
 
-assert(pcmc->pci_enabled);
+assert(pc_machine_is_pci_enabled(pcms));
 
   

[RFC PATCH-for-9.1 03/29] hw/i386/pc: Pass base machine type as argument to DEFINE_PC_MACHINE()

2024-03-28 Thread Philippe Mathieu-Daudé
Currently PC machines are based on TYPE_PC_MACHINE.
In preparation of being based on different types,
pass the current type as argument.

Signed-off-by: Philippe Mathieu-Daudé 
---
 include/hw/i386/pc.h | 4 ++--
 hw/i386/pc_piix.c| 9 +
 hw/i386/pc_q35.c | 3 ++-
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 6b885424bb..33023ebbbe 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -268,7 +268,7 @@ extern const size_t pc_compat_2_4_len;
 extern GlobalProperty pc_compat_2_3[];
 extern const size_t pc_compat_2_3_len;
 
-#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
+#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn, parent_class) \
 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
 { \
 MachineClass *mc = MACHINE_CLASS(oc); \
@@ -277,7 +277,7 @@ extern const size_t pc_compat_2_3_len;
 } \
 static const TypeInfo pc_machine_type_##suffix = { \
 .name   = namestr TYPE_MACHINE_SUFFIX, \
-.parent = TYPE_PC_MACHINE, \
+.parent = parent_class, \
 .class_init = pc_machine_##suffix##_class_init, \
 }; \
 static void pc_machine_init_##suffix(void) \
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 1be1e050c7..b9f85148e3 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -462,7 +462,8 @@ static void pc_xen_hvm_init(MachineState *machine)
 } \
 pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \
 } \
-DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
+DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \
+  TYPE_PC_MACHINE)
 
 static void pc_i440fx_machine_options(MachineClass *m)
 {
@@ -824,7 +825,7 @@ static void isapc_machine_options(MachineClass *m)
 }
 
 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
-  isapc_machine_options);
+  isapc_machine_options, TYPE_PC_MACHINE);
 #endif
 
 #ifdef CONFIG_XEN
@@ -837,7 +838,7 @@ static void xenfv_4_2_machine_options(MachineClass *m)
 }
 
 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
-  xenfv_4_2_machine_options);
+  xenfv_4_2_machine_options, TYPE_PC_MACHINE);
 
 static void xenfv_3_1_machine_options(MachineClass *m)
 {
@@ -849,5 +850,5 @@ static void xenfv_3_1_machine_options(MachineClass *m)
 }
 
 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
-  xenfv_3_1_machine_options);
+  xenfv_3_1_machine_options, TYPE_PC_MACHINE);
 #endif
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 43ee1e595c..7dbee38f03 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -338,7 +338,8 @@ static void pc_q35_init(MachineState *machine)
 } \
 pc_q35_init(machine); \
 } \
-DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
+DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn, \
+  TYPE_PC_MACHINE)
 
 
 static void pc_q35_machine_options(MachineClass *m)
-- 
2.41.0




[RFC PATCH-for-9.1 00/29] hw/i386/pc: Decouple ISA vs PCI-based machines

2024-03-28 Thread Philippe Mathieu-Daudé
Hi Igor,

This is the first steps to decouple the isapc VS q35/i440fx
machines. A new TYPE_PC_PCI_MACHINE is introduced to help
differentiating. Fields unrelated to the legacy isapc are
moved to the new PcPciMachineState structure.

More work remain in hw/i386/pc_piix.c so we can build a
binary with only CONFIG_ISAPC enabled.

Based-on: <20240327095124.73639-1-phi...@linaro.org>
"hw/i386: Remove deprecated pc-i440fx-2.0 -> 2.3 machines"

Philippe Mathieu-Daudé (29):
  hw/i386/pc: Declare CPU QOM types using DEFINE_TYPES() macro
  hw/i386/pc: Extract pc_machine_is_pci_enabled() helper
  hw/i386/pc: Pass base machine type as argument to DEFINE_PC_MACHINE()
  hw/i386/pc: Introduce PC_PCI_MACHINE QOM type
  hw/i386/pc: Remove PCMachineClass::pci_enabled field
  hw/i386/pc: Move pci_root_uid field to PcPciMachineClass
  hw/i386/pc: Call fw_cfg_add_extra_pci_roots() in pc_pci_machine_done()
  hw/i386/pc: Move CXLState to PcPciMachineState
  hw/i386/pc: Pass PCMachineState argument to acpi_setup()
  hw/i386/pc: Remove PCMachineClass::has_acpi_build field
  hw/i386/pc: Move acpi_setup() call to pc_pci_machine_done()
  hw/i386/pc: Move acpi_build_enabled to PcPciMachineState
  hw/i386/pc: Remove non-PCI code from pc_system_firmware_init()
  hw/i386/pc: Move pc_system_flash_create() to pc_pci_machine_initfn()
  hw/i386/pc: Move FW/pflash related fields to PcPciMachineState
  hw/i386/pc: Move south-bridge related fields to PcPciMachine
  hw/i386/pc: Inline gigabyte_align()
  hw/i386/pc: Inline has_reserved_memory()
  hw/i386/pc: Pass PcPciMachineState argument to CXL helpers
  hw/i386/pc: Pass PcPciMachineState argument to pc_pci_hole64_start()
  hw/i386/fw_cfg: Include missing 'qapi-types-machine.h' header
  hw/i386/fw_cfg: Define fw_cfg_build_smbios() stub
  hw/i386/fw_cfg: Inline smbios_defaults()
  hw/i386/fw_cfg: Inline smbios_legacy_mode()
  hw/i386/fw_cfg: Replace smbios_defaults() by !smbios_legacy_mode()
  hw/i386/fw_cfg: Factor fw_cfg_build_smbios_legacy() out
  hw/i386/pc: Call fw_cfg_build_smbios_legacy() in pc_machine_done()
  hw/i386/pc: Rename pc_init1() -> pc_piix_init()
  hw/i386/pc: Move ISA-only PC machine to pc_isa.c

 MAINTAINERS  |   1 +
 hw/i386/acpi-build.h |   3 +-
 hw/i386/fw_cfg.h |   2 +
 include/hw/i386/pc.h |  78 +++---
 hw/i386/acpi-build.c |  34 --
 hw/i386/fw_cfg-smbios-stub.c |  19 
 hw/i386/fw_cfg.c |  35 +++---
 hw/i386/pc.c | 199 ++-
 hw/i386/pc_isa.c |  33 ++
 hw/i386/pc_piix.c|  91 +++-
 hw/i386/pc_q35.c |  12 ++-
 hw/i386/pc_sysfw.c   |  68 +---
 hw/i386/xen/xen-hvm.c|   3 +-
 hw/isa/piix.c|   2 +-
 hw/pci-host/i440fx.c |   4 +-
 hw/pci-host/q35.c|   2 +-
 hw/i386/meson.build  |   2 +
 17 files changed, 342 insertions(+), 246 deletions(-)
 create mode 100644 hw/i386/fw_cfg-smbios-stub.c
 create mode 100644 hw/i386/pc_isa.c

-- 
2.41.0




[RFC PATCH-for-9.1 01/29] hw/i386/pc: Declare CPU QOM types using DEFINE_TYPES() macro

2024-03-28 Thread Philippe Mathieu-Daudé
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.

In few commits we are going to add more types, so replace
the type_register_static() to ease further reviews.

Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/i386/pc.c | 31 ++-
 1 file changed, 14 insertions(+), 17 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0be8f08c47..2c41b08478 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1810,23 +1810,20 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 pc_machine_set_fd_bootchk);
 }
 
-static const TypeInfo pc_machine_info = {
-.name = TYPE_PC_MACHINE,
-.parent = TYPE_X86_MACHINE,
-.abstract = true,
-.instance_size = sizeof(PCMachineState),
-.instance_init = pc_machine_initfn,
-.class_size = sizeof(PCMachineClass),
-.class_init = pc_machine_class_init,
-.interfaces = (InterfaceInfo[]) {
- { TYPE_HOTPLUG_HANDLER },
- { }
+static const TypeInfo pc_machine_types[] = {
+{
+.name   = TYPE_PC_MACHINE,
+.parent = TYPE_X86_MACHINE,
+.abstract   = true,
+.instance_size  = sizeof(PCMachineState),
+.instance_init  = pc_machine_initfn,
+.class_size = sizeof(PCMachineClass),
+.class_init = pc_machine_class_init,
+.interfaces = (InterfaceInfo[]) {
+ { TYPE_HOTPLUG_HANDLER },
+ { }
+},
 },
 };
 
-static void pc_machine_register_types(void)
-{
-type_register_static(&pc_machine_info);
-}
-
-type_init(pc_machine_register_types)
+DEFINE_TYPES(pc_machine_types)
-- 
2.41.0




[PATCH-for-9.1 v2 3/3] exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET

2024-03-22 Thread Philippe Mathieu-Daudé
'NEED_CPU_H' guard target-specific code; it is defined by meson
altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H
as COMPILING_PER_TARGET to clarify its meaning.

Mechanical change running:

 $ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H)

then manually add a /* COMPILING_PER_TARGET */ comment
after the '#endif' when the block is large.

Inspired-by: Peter Maydell 
Signed-off-by: Philippe Mathieu-Daudé 
---
 meson.build| 4 ++--
 include/exec/cpu-defs.h| 2 +-
 include/exec/helper-head.h | 4 ++--
 include/exec/memop.h   | 4 ++--
 include/exec/memory.h  | 4 ++--
 include/exec/tswap.h   | 4 ++--
 include/gdbstub/helpers.h  | 2 +-
 include/hw/core/cpu.h  | 4 ++--
 include/qemu/osdep.h   | 2 +-
 include/sysemu/hvf.h   | 8 
 include/sysemu/kvm.h   | 6 +++---
 include/sysemu/nvmm.h  | 4 ++--
 include/sysemu/whpx.h  | 4 ++--
 include/sysemu/xen.h   | 4 ++--
 target/arm/kvm-consts.h| 4 ++--
 scripts/analyze-inclusions | 6 +++---
 16 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/meson.build b/meson.build
index b375248a76..f13ad52f5f 100644
--- a/meson.build
+++ b/meson.build
@@ -3637,7 +3637,7 @@ foreach d, list : target_modules
 if target.endswith('-softmmu')
   config_target = config_target_mak[target]
   target_inc = [include_directories('target' / 
config_target['TARGET_BASE_ARCH'])]
-  c_args = ['-DNEED_CPU_H',
+  c_args = ['-DCOMPILING_PER_TARGET',
 '-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
 '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)]
   target_module_ss = module_ss.apply(config_target, strict: false)
@@ -3820,7 +3820,7 @@ foreach target : target_dirs
   target_base_arch = config_target['TARGET_BASE_ARCH']
   arch_srcs = [config_target_h[target]]
   arch_deps = []
-  c_args = ['-DNEED_CPU_H',
+  c_args = ['-DCOMPILING_PER_TARGET',
 '-DCONFIG_TARGET="@0@-config-target.h"'.format(target),
 '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)]
   link_args = emulator_link_args
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
index 3915438b83..0dbef3010c 100644
--- a/include/exec/cpu-defs.h
+++ b/include/exec/cpu-defs.h
@@ -19,7 +19,7 @@
 #ifndef CPU_DEFS_H
 #define CPU_DEFS_H
 
-#ifndef NEED_CPU_H
+#ifndef COMPILING_PER_TARGET
 #error cpu.h included from common code
 #endif
 
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index 28ceab0a46..5ef467a79d 100644
--- a/include/exec/helper-head.h
+++ b/include/exec/helper-head.h
@@ -43,7 +43,7 @@
 #define dh_ctype_noreturn G_NORETURN void
 #define dh_ctype(t) dh_ctype_##t
 
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 # ifdef TARGET_LONG_BITS
 #  if TARGET_LONG_BITS == 32
 #   define dh_alias_tl i32
@@ -54,7 +54,7 @@
 #  endif
 # endif
 # define dh_ctype_tl target_ulong
-#endif
+#endif /* COMPILING_PER_TARGET */
 
 /* We can't use glue() here because it falls foul of C preprocessor
recursive expansion rules.  */
diff --git a/include/exec/memop.h b/include/exec/memop.h
index a86dc6743a..06417ff361 100644
--- a/include/exec/memop.h
+++ b/include/exec/memop.h
@@ -35,7 +35,7 @@ typedef enum MemOp {
 MO_LE= 0,
 MO_BE= MO_BSWAP,
 #endif
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 #if TARGET_BIG_ENDIAN
 MO_TE= MO_BE,
 #else
@@ -135,7 +135,7 @@ typedef enum MemOp {
 MO_BESL  = MO_BE | MO_SL,
 MO_BESQ  = MO_BE | MO_SQ,
 
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 MO_TEUW  = MO_TE | MO_UW,
 MO_TEUL  = MO_TE | MO_UL,
 MO_TEUQ  = MO_TE | MO_UQ,
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 8626a355b3..bb51e90fe1 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -3087,7 +3087,7 @@ address_space_write_cached(MemoryRegionCache *cache, 
hwaddr addr,
 MemTxResult address_space_set(AddressSpace *as, hwaddr addr,
   uint8_t c, hwaddr len, MemTxAttrs attrs);
 
-#ifdef NEED_CPU_H
+#ifdef COMPILING_PER_TARGET
 /* enum device_endian to MemOp.  */
 static inline MemOp devend_memop(enum device_endian end)
 {
@@ -3105,7 +3105,7 @@ static inline MemOp devend_memop(enum device_endian end)
 return (end == non_host_endianness) ? MO_BSWAP : 0;
 #endif
 }
-#endif
+#endif /* COMPILING_PER_TARGET */
 
 /*
  * Inhibit technologies that require discarding of pages in RAM blocks, e.g.,
diff --git a/include/exec/tswap.h b/include/exec/tswap.h
index 68944a880b..5089cd6a4c 100644
--- a/include/exec/tswap.h
+++ b/include/exec/tswap.h
@@ -15,11 +15,11 @@
  * If we're in target-specific code, we can hard-code the swapping
  * condition, otherwise we have to do (slower) r

[PULL 13/43] hw/xen/hvm: Propagate page_mask to a pair of functions

2024-03-09 Thread Philippe Mathieu-Daudé
We are going to replace TARGET_PAGE_MASK by a
runtime variable. In order to reduce code duplication,
propagate TARGET_PAGE_MASK to get_physmapping() and
xen_phys_offset_to_gaddr().

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: Manos Pitsidianakis 
Message-Id: <20231114163123.74888-3-phi...@linaro.org>
---
 hw/i386/xen/xen-hvm.c | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 8235782ef7..844b11ae08 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -174,11 +174,12 @@ static void xen_ram_init(PCMachineState *pcms,
 }
 }
 
-static XenPhysmap *get_physmapping(hwaddr start_addr, ram_addr_t size)
+static XenPhysmap *get_physmapping(hwaddr start_addr, ram_addr_t size,
+   int page_mask)
 {
 XenPhysmap *physmap = NULL;
 
-start_addr &= TARGET_PAGE_MASK;
+start_addr &= page_mask;
 
 QLIST_FOREACH(physmap, &xen_physmap, list) {
 if (range_covers_byte(physmap->start_addr, physmap->size, start_addr)) 
{
@@ -188,9 +189,10 @@ static XenPhysmap *get_physmapping(hwaddr start_addr, 
ram_addr_t size)
 return NULL;
 }
 
-static hwaddr xen_phys_offset_to_gaddr(hwaddr phys_offset, ram_addr_t size)
+static hwaddr xen_phys_offset_to_gaddr(hwaddr phys_offset, ram_addr_t size,
+   int page_mask)
 {
-hwaddr addr = phys_offset & TARGET_PAGE_MASK;
+hwaddr addr = phys_offset & page_mask;
 XenPhysmap *physmap = NULL;
 
 QLIST_FOREACH(physmap, &xen_physmap, list) {
@@ -252,7 +254,7 @@ static int xen_add_to_physmap(XenIOState *state,
 hwaddr phys_offset = memory_region_get_ram_addr(mr);
 const char *mr_name;
 
-if (get_physmapping(start_addr, size)) {
+if (get_physmapping(start_addr, size, TARGET_PAGE_MASK)) {
 return 0;
 }
 if (size <= 0) {
@@ -325,7 +327,7 @@ static int xen_remove_from_physmap(XenIOState *state,
 XenPhysmap *physmap = NULL;
 hwaddr phys_offset = 0;
 
-physmap = get_physmapping(start_addr, size);
+physmap = get_physmapping(start_addr, size, TARGET_PAGE_MASK);
 if (physmap == NULL) {
 return -1;
 }
@@ -373,7 +375,7 @@ static void xen_sync_dirty_bitmap(XenIOState *state,
 int rc, i, j;
 const XenPhysmap *physmap = NULL;
 
-physmap = get_physmapping(start_addr, size);
+physmap = get_physmapping(start_addr, size, TARGET_PAGE_MASK);
 if (physmap == NULL) {
 /* not handled */
 return;
@@ -633,7 +635,7 @@ void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t 
length)
 int rc;
 ram_addr_t start_pfn, nb_pages;
 
-start = xen_phys_offset_to_gaddr(start, length);
+start = xen_phys_offset_to_gaddr(start, length, TARGET_PAGE_MASK);
 
 if (length == 0) {
 length = TARGET_PAGE_SIZE;
-- 
2.41.0




[PULL 15/43] hw/char/xen_console: Fix missing ERRP_GUARD() for error_prepend()

2024-03-09 Thread Philippe Mathieu-Daudé
From: Zhao Liu 

As the comment in qapi/error, passing @errp to error_prepend() requires
ERRP_GUARD():

* = Why, when and how to use ERRP_GUARD() =
*
* Without ERRP_GUARD(), use of the @errp parameter is restricted:
...
* - It should not be passed to error_prepend(), error_vprepend() or
*   error_append_hint(), because that doesn't work with &error_fatal.
* ERRP_GUARD() lifts these restrictions.
*
* To use ERRP_GUARD(), add it right at the beginning of the function.
* @errp can then be used without worrying about the argument being
* NULL or &error_fatal.

ERRP_GUARD() could avoid the case when @errp is the pointer of
error_fatal, the user can't see this additional information, because
exit() happens in error_setg earlier than information is added [1].

The xen_console_connect() passes @errp to error_prepend() without
ERRP_GUARD().

There're 2 places will call xen_console_connect():
 - xen_console_realize(): the @errp is from DeviceClass.realize()'s
  parameter.
 - xen_console_frontend_changed(): the @errp points its caller's
   @local_err.

To avoid the issue like [1] said, add missing ERRP_GUARD() at the
beginning of xen_console_connect().

[1]: Issue description in the commit message of commit ae7c80a7bd73
 ("error: New macro ERRP_GUARD()").

Cc: Stefano Stabellini 
Cc: Anthony Perard 
Cc: Paul Durrant 
Cc: "Marc-André Lureau" 
Cc: Paolo Bonzini 
Signed-off-by: Zhao Liu 
Acked-by: Anthony PERARD 
Message-ID: <20240228163723.1775791-15-zhao1....@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/char/xen_console.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c
index 5cbee2f184..683c92aca1 100644
--- a/hw/char/xen_console.c
+++ b/hw/char/xen_console.c
@@ -206,6 +206,7 @@ static bool con_event(void *_xendev)
 
 static bool xen_console_connect(XenDevice *xendev, Error **errp)
 {
+ERRP_GUARD();
 XenConsole *con = XEN_CONSOLE_DEVICE(xendev);
 unsigned int port, limit;
 
-- 
2.41.0




[PULL 16/43] hw/net/xen_nic: Fix missing ERRP_GUARD() for error_prepend()

2024-03-09 Thread Philippe Mathieu-Daudé
From: Zhao Liu 

As the comment in qapi/error, passing @errp to error_prepend() requires
ERRP_GUARD():

* = Why, when and how to use ERRP_GUARD() =
*
* Without ERRP_GUARD(), use of the @errp parameter is restricted:
...
* - It should not be passed to error_prepend(), error_vprepend() or
*   error_append_hint(), because that doesn't work with &error_fatal.
* ERRP_GUARD() lifts these restrictions.
*
* To use ERRP_GUARD(), add it right at the beginning of the function.
* @errp can then be used without worrying about the argument being
* NULL or &error_fatal.

ERRP_GUARD() could avoid the case when @errp is the pointer of
error_fatal, the user can't see this additional information, because
exit() happens in error_setg earlier than information is added [1].

The xen_netdev_connect() passes @errp to error_prepend(), and its @errp
parameter is from xen_device_frontend_changed().

Though its @errp points to @local_err of xen_device_frontend_changed(),
to follow the requirement of @errp, add missing ERRP_GUARD() at the
beginning of this function.

[1]: Issue description in the commit message of commit ae7c80a7bd73
 ("error: New macro ERRP_GUARD()").

Cc: Stefano Stabellini 
Cc: Anthony Perard 
Cc: Paul Durrant 
Cc: Jason Wang 
Signed-off-by: Zhao Liu 
Acked-by: Anthony PERARD 
Reviewed-by: Thomas Huth 
Message-ID: <20240229143914.1977550-3-zhao1@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/net/xen_nic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/net/xen_nic.c b/hw/net/xen_nic.c
index 453fdb9819..89487b49ba 100644
--- a/hw/net/xen_nic.c
+++ b/hw/net/xen_nic.c
@@ -351,6 +351,7 @@ static bool net_event(void *_xendev)
 
 static bool xen_netdev_connect(XenDevice *xendev, Error **errp)
 {
+ERRP_GUARD();
 XenNetDev *netdev = XEN_NET_DEVICE(xendev);
 unsigned int port, rx_copy;
 
-- 
2.41.0




[PULL 14/43] hw/xen/hvm: Get target page size at runtime

2024-03-09 Thread Philippe Mathieu-Daudé
In order to build this file once for all targets, replace:

  TARGET_PAGE_BITS -> qemu_target_page_bits()
  TARGET_PAGE_SIZE -> qemu_target_page_size()
  TARGET_PAGE_MASK -> -qemu_target_page_size()

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: Manos Pitsidianakis 
Message-Id: <20231114163123.74888-4-phi...@linaro.org>
---
 hw/i386/xen/xen-hvm.c | 62 +++
 1 file changed, 39 insertions(+), 23 deletions(-)

diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 844b11ae08..7745cb3963 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -23,6 +23,7 @@
 #include "hw/xen/xen-hvm-common.h"
 #include "hw/xen/arch_hvm.h"
 #include 
+#include "exec/target_page.h"
 
 static MemoryRegion ram_640k, ram_lo, ram_hi;
 static MemoryRegion *framebuffer;
@@ -247,6 +248,9 @@ static int xen_add_to_physmap(XenIOState *state,
   MemoryRegion *mr,
   hwaddr offset_within_region)
 {
+unsigned target_page_bits = qemu_target_page_bits();
+int page_size = qemu_target_page_size();
+int page_mask = -page_size;
 unsigned long nr_pages;
 int rc = 0;
 XenPhysmap *physmap = NULL;
@@ -254,7 +258,7 @@ static int xen_add_to_physmap(XenIOState *state,
 hwaddr phys_offset = memory_region_get_ram_addr(mr);
 const char *mr_name;
 
-if (get_physmapping(start_addr, size, TARGET_PAGE_MASK)) {
+if (get_physmapping(start_addr, size, page_mask)) {
 return 0;
 }
 if (size <= 0) {
@@ -294,9 +298,9 @@ go_physmap:
 return 0;
 }
 
-pfn = phys_offset >> TARGET_PAGE_BITS;
-start_gpfn = start_addr >> TARGET_PAGE_BITS;
-nr_pages = size >> TARGET_PAGE_BITS;
+pfn = phys_offset >> target_page_bits;
+start_gpfn = start_addr >> target_page_bits;
+nr_pages = size >> target_page_bits;
 rc = xendevicemodel_relocate_memory(xen_dmod, xen_domid, nr_pages, pfn,
 start_gpfn);
 if (rc) {
@@ -310,8 +314,8 @@ go_physmap:
 }
 
 rc = xendevicemodel_pin_memory_cacheattr(xen_dmod, xen_domid,
-   start_addr >> TARGET_PAGE_BITS,
-   (start_addr + size - 1) >> TARGET_PAGE_BITS,
+   start_addr >> target_page_bits,
+   (start_addr + size - 1) >> target_page_bits,
XEN_DOMCTL_MEM_CACHEATTR_WB);
 if (rc) {
 error_report("pin_memory_cacheattr failed: %s", strerror(errno));
@@ -323,11 +327,14 @@ static int xen_remove_from_physmap(XenIOState *state,
hwaddr start_addr,
ram_addr_t size)
 {
+unsigned target_page_bits = qemu_target_page_bits();
+int page_size = qemu_target_page_size();
+int page_mask = -page_size;
 int rc = 0;
 XenPhysmap *physmap = NULL;
 hwaddr phys_offset = 0;
 
-physmap = get_physmapping(start_addr, size, TARGET_PAGE_MASK);
+physmap = get_physmapping(start_addr, size, page_mask);
 if (physmap == NULL) {
 return -1;
 }
@@ -338,9 +345,9 @@ static int xen_remove_from_physmap(XenIOState *state,
 DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", at "
 "%"HWADDR_PRIx"\n", start_addr, start_addr + size, phys_offset);
 
-size >>= TARGET_PAGE_BITS;
-start_addr >>= TARGET_PAGE_BITS;
-phys_offset >>= TARGET_PAGE_BITS;
+size >>= target_page_bits;
+start_addr >>= target_page_bits;
+phys_offset >>= target_page_bits;
 rc = xendevicemodel_relocate_memory(xen_dmod, xen_domid, size, start_addr,
 phys_offset);
 if (rc) {
@@ -369,13 +376,16 @@ static void xen_sync_dirty_bitmap(XenIOState *state,
   hwaddr start_addr,
   ram_addr_t size)
 {
-hwaddr npages = size >> TARGET_PAGE_BITS;
+unsigned target_page_bits = qemu_target_page_bits();
+int page_size = qemu_target_page_size();
+int page_mask = -page_size;
+hwaddr npages = size >> target_page_bits;
 const int width = sizeof(unsigned long) * 8;
 size_t bitmap_size = DIV_ROUND_UP(npages, width);
 int rc, i, j;
 const XenPhysmap *physmap = NULL;
 
-physmap = get_physmapping(start_addr, size, TARGET_PAGE_MASK);
+physmap = get_physmapping(start_addr, size, page_mask);
 if (physmap == NULL) {
 /* not handled */
 return;
@@ -389,7 +399,7 @@ static void xen_sync_dirty_bitmap(XenIOState *state,
 return;
 }
 
-rc = xen_track_dirty_vram(xen_domid, start_addr >> TARGET_PAGE_BITS,
+rc = xen_track_dirty_vram(xen_domid, start_addr >&g

[PULL 11/43] hw/i386/xen: Compile 'xen-hvm.c' with Xen CPPFLAGS

2024-03-09 Thread Philippe Mathieu-Daudé
xen-hvm.c calls xc_set_hvm_param() from ,
so better compile it with Xen CPPFLAGS.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-19-phi...@linaro.org>
---
 hw/i386/xen/meson.build | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/i386/xen/meson.build b/hw/i386/xen/meson.build
index 3dc4c4f106..3f0df8bc07 100644
--- a/hw/i386/xen/meson.build
+++ b/hw/i386/xen/meson.build
@@ -1,8 +1,10 @@
 i386_ss.add(when: 'CONFIG_XEN', if_true: files(
-  'xen-hvm.c',
   'xen_apic.c',
   'xen_pvdevice.c',
 ))
+i386_ss.add(when: ['CONFIG_XEN', xen], if_true: files(
+  'xen-hvm.c',
+))
 
 i386_ss.add(when: 'CONFIG_XEN_BUS', if_true: files(
   'xen_platform.c',
-- 
2.41.0




[PULL 12/43] hw/xen/hvm: Inline TARGET_PAGE_ALIGN() macro

2024-03-09 Thread Philippe Mathieu-Daudé
Use TARGET_PAGE_SIZE to calculate TARGET_PAGE_ALIGN.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: Manos Pitsidianakis 
Message-Id: <20231114163123.74888-2-phi...@linaro.org>
---
 hw/i386/xen/xen-hvm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 1ae943370b..8235782ef7 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -678,7 +678,7 @@ void arch_xen_set_memory(XenIOState *state, 
MemoryRegionSection *section,
 trace_xen_client_set_memory(start_addr, size, log_dirty);
 
 start_addr &= TARGET_PAGE_MASK;
-size = TARGET_PAGE_ALIGN(size);
+size = ROUND_UP(size, TARGET_PAGE_SIZE);
 
 if (add) {
 if (!memory_region_is_rom(section->mr)) {
-- 
2.41.0




[PULL 09/43] hw/xen/xen_pt: Add missing license

2024-03-09 Thread Philippe Mathieu-Daudé
Commit eaab4d60d3 ("Introduce Xen PCI Passthrough, qdevice")
introduced both xen_pt.[ch], but only added the license to
xen_pt.c. Use the same license for xen_pt.h.

Suggested-by: David Woodhouse 
Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-17-phi...@linaro.org>
---
 hw/xen/xen_pt.h | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index 31bcfdf705..d3180bb134 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -1,3 +1,13 @@
+/*
+ * Copyright (c) 2007, Neocleus Corporation.
+ * Copyright (c) 2007, Intel Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Alex Novik 
+ * Allen Kay 
+ * Guy Zana 
+ */
 #ifndef XEN_PT_H
 #define XEN_PT_H
 
-- 
2.41.0




[PULL 07/43] hw/xen: Rename 'ram_memory' global variable as 'xen_memory'

2024-03-09 Thread Philippe Mathieu-Daudé
To avoid a potential global variable shadow in
hw/i386/pc_piix.c::pc_init1(), rename Xen's
"ram_memory" as "xen_memory".

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-11-phi...@linaro.org>
---
 include/hw/xen/xen-hvm-common.h |  2 +-
 hw/arm/xen_arm.c|  6 +++---
 hw/i386/xen/xen-hvm.c   | 10 +-
 hw/xen/xen-hvm-common.c |  6 +++---
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/include/hw/xen/xen-hvm-common.h b/include/hw/xen/xen-hvm-common.h
index 4b1d728f35..65a51aac2e 100644
--- a/include/hw/xen/xen-hvm-common.h
+++ b/include/hw/xen/xen-hvm-common.h
@@ -15,7 +15,7 @@
 #include "qemu/error-report.h"
 #include 
 
-extern MemoryRegion ram_memory;
+extern MemoryRegion xen_memory;
 extern MemoryListener xen_io_listener;
 extern DeviceListener xen_device_listener;
 
diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.c
index 32776d94df..15fa7dfa84 100644
--- a/hw/arm/xen_arm.c
+++ b/hw/arm/xen_arm.c
@@ -114,14 +114,14 @@ static void xen_init_ram(MachineState *machine)
 block_len = GUEST_RAM1_BASE + ram_size[1];
 }
 
-memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
+memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len,
&error_fatal);
 
-memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo", &ram_memory,
+memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo", &xen_memory,
  GUEST_RAM0_BASE, ram_size[0]);
 memory_region_add_subregion(sysmem, GUEST_RAM0_BASE, &ram_lo);
 if (ram_size[1] > 0) {
-memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi", &ram_memory,
+memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi", &xen_memory,
  GUEST_RAM1_BASE, ram_size[1]);
 memory_region_add_subregion(sysmem, GUEST_RAM1_BASE, &ram_hi);
 }
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index f42621e674..1ae943370b 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -149,12 +149,12 @@ static void xen_ram_init(PCMachineState *pcms,
  */
 block_len = (4 * GiB) + x86ms->above_4g_mem_size;
 }
-memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
+memory_region_init_ram(&xen_memory, NULL, "xen.ram", block_len,
&error_fatal);
-*ram_memory_p = &ram_memory;
+*ram_memory_p = &xen_memory;
 
 memory_region_init_alias(&ram_640k, NULL, "xen.ram.640k",
- &ram_memory, 0, 0xa);
+ &xen_memory, 0, 0xa);
 memory_region_add_subregion(sysmem, 0, &ram_640k);
 /* Skip of the VGA IO memory space, it will be registered later by the VGA
  * emulated device.
@@ -163,12 +163,12 @@ static void xen_ram_init(PCMachineState *pcms,
  * the Options ROM, so it is registered here as RAM.
  */
 memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo",
- &ram_memory, 0xc,
+ &xen_memory, 0xc,
  x86ms->below_4g_mem_size - 0xc);
 memory_region_add_subregion(sysmem, 0xc, &ram_lo);
 if (x86ms->above_4g_mem_size > 0) {
 memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi",
- &ram_memory, 0x1ULL,
+ &xen_memory, 0x1ULL,
  x86ms->above_4g_mem_size);
 memory_region_add_subregion(sysmem, 0x1ULL, &ram_hi);
 }
diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c
index baa1adb9f2..dc69cada57 100644
--- a/hw/xen/xen-hvm-common.c
+++ b/hw/xen/xen-hvm-common.c
@@ -9,7 +9,7 @@
 #include "hw/boards.h"
 #include "hw/xen/arch_hvm.h"
 
-MemoryRegion ram_memory;
+MemoryRegion xen_memory;
 
 void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, MemoryRegion *mr,
Error **errp)
@@ -26,7 +26,7 @@ void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, 
MemoryRegion *mr,
 return;
 }
 
-if (mr == &ram_memory) {
+if (mr == &xen_memory) {
 return;
 }
 
@@ -53,7 +53,7 @@ static void xen_set_memory(struct MemoryListener *listener,
 {
 XenIOState *state = container_of(listener, XenIOState, memory_listener);
 
-if (section->mr == &ram_memory) {
+if (section->mr == &xen_memory) {
 return;
 } else {
 if (add) {
-- 
2.41.0




[PULL 10/43] hw/xen: Extract 'xen_igd.h' from 'xen_pt.h'

2024-03-09 Thread Philippe Mathieu-Daudé
"hw/xen/xen_pt.h" requires "hw/xen/xen_native.h" which is target
specific. It also declares IGD methods, which are not target
specific.

Target-agnostic code can use IGD methods. To allow that, extract
these methos into a new "hw/xen/xen_igd.h" header.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-18-phi...@linaro.org>
---
 hw/xen/xen_pt.h | 14 --
 include/hw/xen/xen_igd.h| 33 +
 accel/xen/xen-all.c |  1 +
 hw/i386/pc_piix.c   |  1 +
 hw/xen/xen_pt.c |  3 ++-
 hw/xen/xen_pt_config_init.c |  3 ++-
 hw/xen/xen_pt_graphics.c|  3 ++-
 hw/xen/xen_pt_stub.c|  2 +-
 8 files changed, 42 insertions(+), 18 deletions(-)
 create mode 100644 include/hw/xen/xen_igd.h

diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h
index d3180bb134..095a0f0365 100644
--- a/hw/xen/xen_pt.h
+++ b/hw/xen/xen_pt.h
@@ -15,9 +15,6 @@
 #include "xen-host-pci-device.h"
 #include "qom/object.h"
 
-bool xen_igd_gfx_pt_enabled(void);
-void xen_igd_gfx_pt_set(bool value, Error **errp);
-
 void xen_pt_log(const PCIDevice *d, const char *f, ...) G_GNUC_PRINTF(2, 3);
 
 #define XEN_PT_ERR(d, _f, _a...) xen_pt_log(d, "%s: Error: "_f, __func__, ##_a)
@@ -62,12 +59,6 @@ typedef struct XenPTDeviceClass {
 XenPTQdevRealize pci_qdev_realize;
 } XenPTDeviceClass;
 
-uint32_t igd_read_opregion(XenPCIPassthroughState *s);
-void xen_igd_reserve_slot(PCIBus *pci_bus);
-void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
-void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
-   XenHostPCIDevice *dev);
-
 /* function type for config reg */
 typedef int (*xen_pt_conf_reg_init)
 (XenPCIPassthroughState *, XenPTRegInfo *, uint32_t real_offset,
@@ -353,11 +344,6 @@ static inline bool 
xen_pt_has_msix_mapping(XenPCIPassthroughState *s, int bar)
 void *pci_assign_dev_load_option_rom(PCIDevice *dev, int *size,
  unsigned int domain, unsigned int bus,
  unsigned int slot, unsigned int function);
-static inline bool is_igd_vga_passthrough(XenHostPCIDevice *dev)
-{
-return (xen_igd_gfx_pt_enabled()
-&& ((dev->class_code >> 0x8) == PCI_CLASS_DISPLAY_VGA));
-}
 int xen_pt_register_vga_regions(XenHostPCIDevice *dev);
 int xen_pt_unregister_vga_regions(XenHostPCIDevice *dev);
 void xen_pt_setup_vga(XenPCIPassthroughState *s, XenHostPCIDevice *dev,
diff --git a/include/hw/xen/xen_igd.h b/include/hw/xen/xen_igd.h
new file mode 100644
index 00..7ffca06c10
--- /dev/null
+++ b/include/hw/xen/xen_igd.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2007, Neocleus Corporation.
+ * Copyright (c) 2007, Intel Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0-only
+ *
+ * Alex Novik 
+ * Allen Kay 
+ * Guy Zana 
+ */
+#ifndef XEN_IGD_H
+#define XEN_IGD_H
+
+#include "hw/xen/xen-host-pci-device.h"
+
+typedef struct XenPCIPassthroughState XenPCIPassthroughState;
+
+bool xen_igd_gfx_pt_enabled(void);
+void xen_igd_gfx_pt_set(bool value, Error **errp);
+
+uint32_t igd_read_opregion(XenPCIPassthroughState *s);
+void xen_igd_reserve_slot(PCIBus *pci_bus);
+void igd_write_opregion(XenPCIPassthroughState *s, uint32_t val);
+void xen_igd_passthrough_isa_bridge_create(XenPCIPassthroughState *s,
+   XenHostPCIDevice *dev);
+
+static inline bool is_igd_vga_passthrough(XenHostPCIDevice *dev)
+{
+return (xen_igd_gfx_pt_enabled()
+&& ((dev->class_code >> 0x8) == PCI_CLASS_DISPLAY_VGA));
+}
+
+#endif
diff --git a/accel/xen/xen-all.c b/accel/xen/xen-all.c
index 5ff0cb8bd9..0bdefce537 100644
--- a/accel/xen/xen-all.c
+++ b/accel/xen/xen-all.c
@@ -15,6 +15,7 @@
 #include "hw/xen/xen_native.h"
 #include "hw/xen/xen-legacy-backend.h"
 #include "hw/xen/xen_pt.h"
+#include "hw/xen/xen_igd.h"
 #include "chardev/char.h"
 #include "qemu/accel.h"
 #include "sysemu/cpus.h"
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index ce6aad758d..e123458bbc 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -55,6 +55,7 @@
 #ifdef CONFIG_XEN
 #include 
 #include "hw/xen/xen_pt.h"
+#include "hw/xen/xen_igd.h"
 #endif
 #include "hw/xen/xen-x86.h"
 #include "hw/xen/xen.h"
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 36e6f93c37..a8edabdabc 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -59,7 +59,8 @@
 #include "hw/pci/pci.h"
 #include "hw/qdev-properties.h"
 #include "hw/qdev-properties-system.h"
-#include "xen_pt.h"
+#include "hw/xen/xen_pt.h"
+#include "hw/xen/xen_igd.h"
 #include "hw/xen/xen.h"
 #include "hw/xen/xen-legacy-backend

[PULL 08/43] hw/xen: Use target-agnostic qemu_target_page_bits()

2024-03-09 Thread Philippe Mathieu-Daudé
Instead of the target-specific TARGET_PAGE_BITS definition,
use qemu_target_page_bits() which is target agnostic.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: Richard Henderson 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-15-phi...@linaro.org>
---
 hw/xen/xen-hvm-common.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c
index dc69cada57..1627da7398 100644
--- a/hw/xen/xen-hvm-common.c
+++ b/hw/xen/xen-hvm-common.c
@@ -1,6 +1,7 @@
 #include "qemu/osdep.h"
 #include "qemu/units.h"
 #include "qapi/error.h"
+#include "exec/target_page.h"
 #include "trace.h"
 
 #include "hw/pci/pci_host.h"
@@ -14,6 +15,7 @@ MemoryRegion xen_memory;
 void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, MemoryRegion *mr,
Error **errp)
 {
+unsigned target_page_bits = qemu_target_page_bits();
 unsigned long nr_pfn;
 xen_pfn_t *pfn_list;
 int i;
@@ -32,11 +34,11 @@ void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, 
MemoryRegion *mr,
 
 trace_xen_ram_alloc(ram_addr, size);
 
-nr_pfn = size >> TARGET_PAGE_BITS;
+nr_pfn = size >> target_page_bits;
 pfn_list = g_new(xen_pfn_t, nr_pfn);
 
 for (i = 0; i < nr_pfn; i++) {
-pfn_list[i] = (ram_addr >> TARGET_PAGE_BITS) + i;
+pfn_list[i] = (ram_addr >> target_page_bits) + i;
 }
 
 if (xc_domain_populate_physmap_exact(xen_xc, xen_domid, nr_pfn, 0, 0, 
pfn_list)) {
-- 
2.41.0




[PULL 03/43] sysemu/xen-mapcache: Check Xen availability with CONFIG_XEN_IS_POSSIBLE

2024-03-09 Thread Philippe Mathieu-Daudé
"sysemu/xen.h" defines CONFIG_XEN_IS_POSSIBLE as a target-agnostic
version of CONFIG_XEN accelerator.
Use it in order to use "sysemu/xen-mapcache.h" in target-agnostic files.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-4-phi...@linaro.org>
---
 include/sysemu/xen-mapcache.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/sysemu/xen-mapcache.h b/include/sysemu/xen-mapcache.h
index c8e7c2f6cf..10c2e3082a 100644
--- a/include/sysemu/xen-mapcache.h
+++ b/include/sysemu/xen-mapcache.h
@@ -10,10 +10,11 @@
 #define XEN_MAPCACHE_H
 
 #include "exec/cpu-common.h"
+#include "sysemu/xen.h"
 
 typedef hwaddr (*phys_offset_to_gaddr_t)(hwaddr phys_offset,
  ram_addr_t size);
-#ifdef CONFIG_XEN
+#ifdef CONFIG_XEN_IS_POSSIBLE
 
 void xen_map_cache_init(phys_offset_to_gaddr_t f,
 void *opaque);
-- 
2.41.0




[PULL 06/43] hw/xen: Remove unnecessary xen_hvm_inject_msi() stub

2024-03-09 Thread Philippe Mathieu-Daudé
Since commit 04b0de0ee8 ("xen: factor out common functions")
xen_hvm_inject_msi() stub is not required.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-8-phi...@linaro.org>
---
 stubs/xen-hw-stub.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/stubs/xen-hw-stub.c b/stubs/xen-hw-stub.c
index 7d7ffe83a9..6cf0e9a4c1 100644
--- a/stubs/xen-hw-stub.c
+++ b/stubs/xen-hw-stub.c
@@ -24,10 +24,6 @@ int xen_set_pci_link_route(uint8_t link, uint8_t irq)
 return -1;
 }
 
-void xen_hvm_inject_msi(uint64_t addr, uint32_t data)
-{
-}
-
 int xen_is_pirq_msi(uint32_t msi_data)
 {
 return 0;
-- 
2.41.0




[PULL 02/43] sysemu/xen: Forbid using Xen headers in user emulation

2024-03-09 Thread Philippe Mathieu-Daudé
Xen is a system specific accelerator, it makes no sense
to include its headers in user emulation.

Signed-off-by: Philippe Mathieu-Daudé 
Reviewed-by: Richard Henderson 
Reviewed-by: David Woodhouse 
Message-Id: <20231114143816.71079-3-phi...@linaro.org>
---
 include/sysemu/xen.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/sysemu/xen.h b/include/sysemu/xen.h
index bc13ad5692..a9f591f26d 100644
--- a/include/sysemu/xen.h
+++ b/include/sysemu/xen.h
@@ -10,6 +10,10 @@
 #ifndef SYSEMU_XEN_H
 #define SYSEMU_XEN_H
 
+#ifdef CONFIG_USER_ONLY
+#error Cannot include sysemu/xen.h from user emulation
+#endif
+
 #include "exec/cpu-common.h"
 
 #ifdef NEED_CPU_H
@@ -26,16 +30,13 @@ extern bool xen_allowed;
 
 #define xen_enabled()   (xen_allowed)
 
-#ifndef CONFIG_USER_ONLY
 void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t length);
 void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size,
struct MemoryRegion *mr, Error **errp);
-#endif
 
 #else /* !CONFIG_XEN_IS_POSSIBLE */
 
 #define xen_enabled() 0
-#ifndef CONFIG_USER_ONLY
 static inline void xen_hvm_modified_memory(ram_addr_t start, ram_addr_t length)
 {
 /* nothing */
@@ -45,7 +46,6 @@ static inline void xen_ram_alloc(ram_addr_t ram_addr, 
ram_addr_t size,
 {
 g_assert_not_reached();
 }
-#endif
 
 #endif /* CONFIG_XEN_IS_POSSIBLE */
 
-- 
2.41.0




Re: [RFC PATCH-for-9.0 v2 13/19] hw/xen: Remove use of 'target_ulong' in handle_ioreq()

2024-03-06 Thread Philippe Mathieu-Daudé

Cc'ing Anton.

On 14/11/23 15:38, Philippe Mathieu-Daudé wrote:

Per commit f17068c1c7 ("xen-hvm: reorganize xen-hvm and move common
function to xen-hvm-common"), handle_ioreq() is expected to be
target-agnostic. However it uses 'target_ulong', which is a target
specific definition.

Per xen/include/public/hvm/ioreq.h header:

   struct ioreq {
 uint64_t addr;  /* physical address */
 uint64_t data;  /* data (or paddr of data) */
 uint32_t count; /* for rep prefixes */
 uint32_t size;  /* size in bytes */
 uint32_t vp_eport;  /* evtchn for notifications to/from device model */
 uint16_t _pad0;
 uint8_t state:4;
 uint8_t data_is_ptr:1;  /* if 1, data above is the guest paddr
  * of the real data to use. */
 uint8_t dir:1;  /* 1=read, 0=write */
 uint8_t df:1;
 uint8_t _pad1:1;
 uint8_t type;   /* I/O type */
   };
   typedef struct ioreq ioreq_t;

If 'data' is not a pointer, it is a u64.

- In PIO / VMWARE_PORT modes, only 32-bit are used.

- In MMIO COPY mode, memory is accessed by chunks of 64-bit

- In PCI_CONFIG mode, access is u8 or u16 or u32.

- None of TIMEOFFSET / INVALIDATE use 'req'.

- Fallback is only used in x86 for VMWARE_PORT.

Masking the upper bits of 'data' to keep 'req->size' low bits
is irrelevant of the target word size. Remove the word size
check and always extract the relevant bits.

Signed-off-by: Philippe Mathieu-Daudé 
---
  hw/xen/xen-hvm-common.c | 6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/xen/xen-hvm-common.c b/hw/xen/xen-hvm-common.c
index bb3cfb200c..fb81bd8fbc 100644
--- a/hw/xen/xen-hvm-common.c
+++ b/hw/xen/xen-hvm-common.c
@@ -1,5 +1,6 @@
  #include "qemu/osdep.h"
  #include "qemu/units.h"
+#include "qemu/bitops.h"
  #include "qapi/error.h"
  #include "trace.h"
  
@@ -426,9 +427,8 @@ static void handle_ioreq(XenIOState *state, ioreq_t *req)

  trace_handle_ioreq(req, req->type, req->dir, req->df, req->data_is_ptr,
 req->addr, req->data, req->count, req->size);
  
-if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) &&

-(req->size < sizeof (target_ulong))) {
-req->data &= ((target_ulong) 1 << (8 * req->size)) - 1;
+if (!req->data_is_ptr && (req->dir == IOREQ_WRITE)) {
+req->data = extract64(req->data, 0, BITS_PER_BYTE * req->size);
  }
  
  if (req->dir == IOREQ_WRITE)





Re: [PATCH-for-9.0 v2 10/19] hw/xen: Rename 'ram_memory' global variable as 'xen_memory'

2024-03-06 Thread Philippe Mathieu-Daudé

On 14/11/23 16:49, David Woodhouse wrote:

On 14 November 2023 09:38:06 GMT-05:00, "Philippe Mathieu-Daudé" 
 wrote:

To avoid a potential global variable shadow in
hw/i386/pc_piix.c::pc_init1(), rename Xen's
"ram_memory" as "xen_memory".

Signed-off-by: Philippe Mathieu-Daudé 


Well OK, but aren't you going to be coming back later to eliminate global 
variables which are actually per-VM?

Or is that the point, because *then* the conflicting name will actually matter?


Eh I wasn't thinking about running 2 Xen VMs in the same QEMU process,
but this is a good test case. I was thinking of running a Xen guest VM
and another TCG VM in the same process.

So IIUC xen_memory should be part of PCMachineState.



Reviewed-by: David Woodhouse 


Thanks!




Re: [RFC PATCH-for-9.0 0/9] hw/xen: Have ARM targets use common xen_memory_listener

2024-03-06 Thread Philippe Mathieu-Daudé

ping ^ 2

On 13/12/23 18:00, Philippe Mathieu-Daudé wrote:

ping?

On 14/11/23 17:31, Philippe Mathieu-Daudé wrote:

Hi,

While looking at Xen target-specific code, I noticed some
generic code used by x86 which is not implemented for ARM.

Maybe ARM machines don't need it, I don't know. But I
wanted to see if I can get this common code target agnostic
and build it once, possibly bringing smth useful to ARM.

The changes don't break CI testing and Avocado local tests.
If this xen_memory_listener feature isn't required for ARM,
I'll send follow up patch that keep this series with common
xen_memory_listener but with a runtime flag to disable.

Patches do the usual "change target-specific API to a
target-agnostic one", in particular using "exec/target_page.h"
at runtime. Then non-x86 code is extracted, then merged to
the generic xen/xen-hvm-common.c.

Thoughts?

Regards,

Phil.

Based-on: <20231114143816.71079-1-phi...@linaro.org>







Re: [PATCH 1/2] hw/xen: detect when running inside stubdomain

2024-02-26 Thread Philippe Mathieu-Daudé

On 19/2/24 19:16, Marek Marczykowski-Górecki wrote:

Introduce global xen_is_stubdomain variable when qemu is running inside
a stubdomain instead of dom0. This will be relevant for subsequent
patches, as few things like accessing PCI config space need to be done
differently.

Signed-off-by: Marek Marczykowski-Górecki 
---
  hw/xen/xen-legacy-backend.c | 15 +++
  include/hw/xen/xen.h|  1 +
  system/globals.c|  1 +
  3 files changed, 17 insertions(+)




+static bool xen_check_stubdomain(void)
+{
+char *dm_path = g_strdup_printf("/local/domain/%d/image", xen_domid);
+uint32_t dm_domid;
+bool is_stubdom = false;
+
+if (!xenstore_read_int(dm_path, "device-model-domid", &dm_domid))


BTW missing braces for QEMU coding style: {


+is_stubdom = dm_domid != 0;


}


+
+g_free(dm_path);
+return is_stubdom;
+}





Re: [PATCH 1/2] hw/xen: detect when running inside stubdomain

2024-02-19 Thread Philippe Mathieu-Daudé

On 19/2/24 19:16, Marek Marczykowski-Górecki wrote:

Introduce global xen_is_stubdomain variable when qemu is running inside
a stubdomain instead of dom0. This will be relevant for subsequent
patches, as few things like accessing PCI config space need to be done
differently.

Signed-off-by: Marek Marczykowski-Górecki 
---
  hw/xen/xen-legacy-backend.c | 15 +++
  include/hw/xen/xen.h|  1 +
  system/globals.c|  1 +
  3 files changed, 17 insertions(+)




diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h
index 37ecc91fc3..ecb89ecfc1 100644
--- a/include/hw/xen/xen.h
+++ b/include/hw/xen/xen.h
@@ -36,6 +36,7 @@ enum xen_mode {
  extern uint32_t xen_domid;
  extern enum xen_mode xen_mode;
  extern bool xen_domid_restrict;
+extern bool xen_is_stubdomain;
  
  int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num);

  int xen_set_pci_link_route(uint8_t link, uint8_t irq);
diff --git a/system/globals.c b/system/globals.c
index b6d4e72530..ac27d88bd4 100644
--- a/system/globals.c
+++ b/system/globals.c
@@ -62,6 +62,7 @@ bool qemu_uuid_set;
  uint32_t xen_domid;
  enum xen_mode xen_mode = XEN_DISABLED;
  bool xen_domid_restrict;
+bool xen_is_stubdomain;


Note for myself, Paolo and Claudio, IIUC these fields belong
to TYPE_XEN_ACCEL in accel/xen/xen-all.c. Maybe resulting in
smth like:

-- >8 --
diff --git a/accel/xen/xen-all.c b/accel/xen/xen-all.c
index 5ff0cb8bd9..fc25d8c912 100644
--- a/accel/xen/xen-all.c
+++ b/accel/xen/xen-all.c
@@ -24,11 +24,31 @@
 #include "migration/global_state.h"
 #include "hw/boards.h"

-bool xen_allowed;
+struct XenAccelState
+{
+AccelState parent_obj;
+
+bool xen_allowed;
+
+enum xen_mode xen_mode;
+
+uint32_t xen_domid;
+bool xen_domid_restrict;

 xc_interface *xen_xc;
 xenforeignmemory_handle *xen_fmem;
 xendevicemodel_handle *xen_dmod;
+};
+
+struct XenAccelOpsClass
+{
+AccelOpsClass parent_class;
+
+struct evtchn_backend_ops *xen_evtchn_ops;
+struct gnttab_backend_ops *xen_gnttab_ops;
+struct foreignmem_backend_ops *xen_foreignmem_ops;
+struct xenstore_backend_ops *xen_xenstore_ops;
+}

 static void xenstore_record_dm_state(const char *state)
 {
@@ -114,6 +134,13 @@ static int xen_init(MachineState *ms)
 return 0;
 }

+static void xen_accel_init(Object *obj)
+{
+XenAccelState *s = XEN_ACCEL(obj);
+
+s->xen_mode = XEN_DISABLED;
+}
+
 static void xen_accel_class_init(ObjectClass *oc, void *data)
 {
 AccelClass *ac = ACCEL_CLASS(oc);
@@ -142,6 +169,8 @@ static void xen_accel_class_init(ObjectClass *oc, 
void *data)

 static const TypeInfo xen_accel_type = {
 .name = TYPE_XEN_ACCEL,
 .parent = TYPE_ACCEL,
+.instance_size = sizeof(XenAccelState),
+.instance_init = xen_accel_init,
 .class_init = xen_accel_class_init,
 };

@@ -157,6 +186,7 @@ static const TypeInfo xen_accel_ops_type = {

 .parent = TYPE_ACCEL_OPS,
 .class_init = xen_accel_ops_class_init,
+.class_size = sizeof(XenAccelOpsClass),
 .abstract = true,
 };

---



Re: [PATCH v3 14/29] target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-01-29 Thread Philippe Mathieu-Daudé

On 29/1/24 17:44, Philippe Mathieu-Daudé wrote:

Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé 
---
  target/i386/hvf/vmx.h| 13 ++---
  hw/i386/fw_cfg.c |  3 +-
  hw/i386/vmmouse.c|  6 ++--
  hw/i386/xen/xen-hvm.c|  3 +-
  target/i386/arch_dump.c  | 11 ++--
  target/i386/arch_memory_mapping.c|  3 +-
  target/i386/cpu-dump.c   |  3 +-
  target/i386/cpu.c| 37 
  target/i386/helper.c | 42 
  target/i386/hvf/hvf.c|  8 ++
  target/i386/hvf/x86.c|  4 +--
  target/i386/hvf/x86_emu.c|  6 ++--
  target/i386/hvf/x86_task.c   | 10 ++-
  target/i386/hvf/x86hvf.c |  9 ++
  target/i386/kvm/kvm.c|  6 ++--
  target/i386/kvm/xen-emu.c| 32 +++--
  target/i386/tcg/sysemu/bpt_helper.c  |  3 +-
  target/i386/tcg/sysemu/excp_helper.c |  3 +-
  target/i386/tcg/tcg-cpu.c| 14 +++---
  target/i386/tcg/user/excp_helper.c   |  6 ++--
  target/i386/tcg/user/seg_helper.c|  3 +-
  21 files changed, 67 insertions(+), 158 deletions(-)


Actually this one had:

Reviewed-by: Richard Henderson 
Acked-by: David Woodhouse 
Reviewed-by: Zhao Liu 

But since I addressed Zhao's suggestion in patch 1
("bulk: Access existing variables initialized to &S->F when available")
which added more changes to this patch, I dropped the tags.



[PATCH v3 14/29] target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-01-29 Thread Philippe Mathieu-Daudé
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé 
---
 target/i386/hvf/vmx.h| 13 ++---
 hw/i386/fw_cfg.c |  3 +-
 hw/i386/vmmouse.c|  6 ++--
 hw/i386/xen/xen-hvm.c|  3 +-
 target/i386/arch_dump.c  | 11 ++--
 target/i386/arch_memory_mapping.c|  3 +-
 target/i386/cpu-dump.c   |  3 +-
 target/i386/cpu.c| 37 
 target/i386/helper.c | 42 
 target/i386/hvf/hvf.c|  8 ++
 target/i386/hvf/x86.c|  4 +--
 target/i386/hvf/x86_emu.c|  6 ++--
 target/i386/hvf/x86_task.c   | 10 ++-
 target/i386/hvf/x86hvf.c |  9 ++
 target/i386/kvm/kvm.c|  6 ++--
 target/i386/kvm/xen-emu.c| 32 +++--
 target/i386/tcg/sysemu/bpt_helper.c  |  3 +-
 target/i386/tcg/sysemu/excp_helper.c |  3 +-
 target/i386/tcg/tcg-cpu.c| 14 +++---
 target/i386/tcg/user/excp_helper.c   |  6 ++--
 target/i386/tcg/user/seg_helper.c|  3 +-
 21 files changed, 67 insertions(+), 158 deletions(-)

diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 0fffcfa46c..1ad042269b 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -175,8 +175,7 @@ static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t 
cr4)
 
 static inline void macvm_set_rip(CPUState *cpu, uint64_t rip)
 {
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = &x86_cpu->env;
+CPUX86State *env = cpu_env(cpu);
 uint64_t val;
 
 /* BUG, should take considering overlap.. */
@@ -196,10 +195,7 @@ static inline void macvm_set_rip(CPUState *cpu, uint64_t 
rip)
 
 static inline void vmx_clear_nmi_blocking(CPUState *cpu)
 {
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = &x86_cpu->env;
-
-env->hflags2 &= ~HF2_NMI_MASK;
+cpu_env(cpu)->hflags2 &= ~HF2_NMI_MASK;
 uint32_t gi = (uint32_t) rvmcs(cpu->accel->fd, 
VMCS_GUEST_INTERRUPTIBILITY);
 gi &= ~VMCS_INTERRUPTIBILITY_NMI_BLOCKING;
 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi);
@@ -207,10 +203,7 @@ static inline void vmx_clear_nmi_blocking(CPUState *cpu)
 
 static inline void vmx_set_nmi_blocking(CPUState *cpu)
 {
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = &x86_cpu->env;
-
-env->hflags2 |= HF2_NMI_MASK;
+cpu_env(cpu)->hflags2 |= HF2_NMI_MASK;
 uint32_t gi = (uint32_t)rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY);
 gi |= VMCS_INTERRUPTIBILITY_NMI_BLOCKING;
 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi);
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index 7362daa45a..5239cd40fa 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -155,8 +155,7 @@ FWCfgState *fw_cfg_arch_create(MachineState *ms,
 
 void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg)
 {
-X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(ms->possible_cpus->cpus[0].cpu);
 uint32_t unused, ebx, ecx, edx;
 uint64_t feature_control_bits = 0;
 uint64_t *val;
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index a8d014d09a..f292a14a15 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -74,8 +74,7 @@ struct VMMouseState {
 
 static void vmmouse_get_data(uint32_t *data)
 {
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(current_cpu);
 
 data[0] = env->regs[R_EAX]; data[1] = env->regs[R_EBX];
 data[2] = env->regs[R_ECX]; data[3] = env->regs[R_EDX];
@@ -84,8 +83,7 @@ static void vmmouse_get_data(uint32_t *data)
 
 static void vmmouse_set_data(const uint32_t *data)
 {
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(current_cpu);
 
 env->regs[R_EAX] = data[0]; env->regs[R_EBX] = data[1];
 env->regs[R_ECX] = data[2]; env->regs[R_EDX] = data[3];
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index f42621e674..61e5060117 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -487,8 +487,7 @@ static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t 
*req)
 
 static void regs_from_cpu(vmware_regs_t *vmport_regs)
 {
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(current_cpu);
 
 vmport_regs->ebx = env->regs[R_EBX];
 vmport_regs->ecx = env->regs[R_ECX];
diff --git a/target/i386/arch_dump.c b/target/i386/arch_dump.c
index c290910a04..8939ff9fa9 100644
--- a/target/i386/arch_dump.c
+++ b/target/i386/arch_dump.c
@@ -203,7 +203,6 @@ int x86_cpu_write_elf64_note(Wri

[PATCH v3 01/29] bulk: Access existing variables initialized to &S->F when available

2024-01-29 Thread Philippe Mathieu-Daudé
When a variable is initialized to &struct->field, use it
in place. Rationale: while this makes the code more concise,
this also helps static analyzers.

Mechanical change using the following Coccinelle spatch script:

 @@
 type S, F;
 identifier s, m, v;
 @@
  S *s;
  ...
  F *v = &s->m;
  <+...
 -&s->m
 +v
  ...+>

Inspired-by: Zhao Liu 
Signed-off-by: Philippe Mathieu-Daudé 
---
 hw/display/ati.c  |  2 +-
 hw/misc/macio/pmu.c   |  2 +-
 hw/misc/pvpanic-pci.c |  2 +-
 hw/pci-bridge/cxl_root_port.c |  2 +-
 hw/ppc/pnv.c  | 20 ++--
 hw/virtio/vhost-user-gpio.c   |  8 
 hw/virtio/vhost-user-scmi.c   |  6 +++---
 hw/virtio/virtio-pci.c|  2 +-
 hw/xen/xen_pt.c   |  6 +++---
 migration/multifd-zlib.c  |  2 +-
 target/arm/cpu.c  |  4 ++--
 target/arm/kvm.c  |  2 +-
 target/arm/machine.c  |  6 +++---
 target/i386/hvf/x86hvf.c  |  2 +-
 target/m68k/helper.c  |  2 +-
 target/ppc/kvm.c  |  8 
 target/riscv/cpu_helper.c |  2 +-
 17 files changed, 39 insertions(+), 39 deletions(-)

diff --git a/hw/display/ati.c b/hw/display/ati.c
index 569b8f6165..8d2501bd82 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -991,7 +991,7 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp)
 }
 vga_init(vga, OBJECT(s), pci_address_space(dev),
  pci_address_space_io(dev), true);
-vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, &s->vga);
+vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, vga);
 if (s->cursor_guest_mode) {
 vga->cursor_invalidate = ati_cursor_invalidate;
 vga->cursor_draw_line = ati_cursor_draw_line;
diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c
index e9a90da88f..7fe1c4e517 100644
--- a/hw/misc/macio/pmu.c
+++ b/hw/misc/macio/pmu.c
@@ -737,7 +737,7 @@ static void pmu_realize(DeviceState *dev, Error **errp)
 timer_mod(s->one_sec_timer, s->one_sec_target);
 
 if (s->has_adb) {
-qbus_init(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
+qbus_init(adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
   dev, "adb.0");
 adb_register_autopoll_callback(adb_bus, pmu_adb_poll, s);
 }
diff --git a/hw/misc/pvpanic-pci.c b/hw/misc/pvpanic-pci.c
index c01e4ce864..83be95d0d2 100644
--- a/hw/misc/pvpanic-pci.c
+++ b/hw/misc/pvpanic-pci.c
@@ -48,7 +48,7 @@ static void pvpanic_pci_realizefn(PCIDevice *dev, Error 
**errp)
 PVPanicPCIState *s = PVPANIC_PCI_DEVICE(dev);
 PVPanicState *ps = &s->pvpanic;
 
-pvpanic_setup_io(&s->pvpanic, DEVICE(s), 2);
+pvpanic_setup_io(ps, DEVICE(s), 2);
 
 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &ps->mr);
 }
diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c
index 8f97697631..2cf2f7bf5f 100644
--- a/hw/pci-bridge/cxl_root_port.c
+++ b/hw/pci-bridge/cxl_root_port.c
@@ -175,7 +175,7 @@ static void cxl_rp_realize(DeviceState *dev, Error **errp)
 
 cxl_cstate->dvsec_offset = CXL_ROOT_PORT_DVSEC_OFFSET;
 cxl_cstate->pdev = pci_dev;
-build_dvsecs(&crp->cxl_cstate);
+build_dvsecs(cxl_cstate);
 
 cxl_component_register_block_init(OBJECT(pci_dev), cxl_cstate,
   TYPE_CXL_ROOT_PORT);
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 0297871bdd..202a569e27 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1257,11 +1257,11 @@ static void pnv_chip_power8_realize(DeviceState *dev, 
Error **errp)
 }
 
 /* Processor Service Interface (PSI) Host Bridge */
-object_property_set_int(OBJECT(&chip8->psi), "bar", PNV_PSIHB_BASE(chip),
+object_property_set_int(OBJECT(psi8), "bar", PNV_PSIHB_BASE(chip),
 &error_fatal);
-object_property_set_link(OBJECT(&chip8->psi), ICS_PROP_XICS,
+object_property_set_link(OBJECT(psi8), ICS_PROP_XICS,
  OBJECT(chip8->xics), &error_abort);
-if (!qdev_realize(DEVICE(&chip8->psi), NULL, errp)) {
+if (!qdev_realize(DEVICE(psi8), NULL, errp)) {
 return;
 }
 pnv_xscom_add_subregion(chip, PNV_XSCOM_PSIHB_BASE,
@@ -1292,7 +1292,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, 
Error **errp)
 }
 pnv_xscom_add_subregion(chip, PNV_XSCOM_OCC_BASE, &chip8->occ.xscom_regs);
 qdev_connect_gpio_out(DEVICE(&chip8->occ), 0,
-  qdev_get_gpio_in(DEVICE(&chip8->psi), 
PSIHB_IRQ_OCC));
+  qdev_get_gpio_in(DEVICE(psi8), PSIHB_IRQ_OCC));
 
 /* OCC SRAM model */
 memory_region_add_subregion(get_system_memory(), PNV_OCC_SENSOR_BASE(chip),
@@ -1543,12 +1543,12 @@ static void pnv_chip_power9_realize(DeviceState *dev, 
Error **err

Re: [PATCH v2 10/23] target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-01-28 Thread Philippe Mathieu-Daudé

On 27/1/24 13:21, Zhao Liu wrote:

Hi Philippe,

On Fri, Jan 26, 2024 at 11:03:52PM +0100, Philippe Mathieu-Daudé wrote:

Date: Fri, 26 Jan 2024 23:03:52 +0100
From: Philippe Mathieu-Daudé 
Subject: [PATCH v2 10/23] target/i386: Prefer fast cpu_env() over slower
  CPU QOM cast macro
X-Mailer: git-send-email 2.41.0

Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé 
---
  target/i386/hvf/vmx.h   | 13 +++---
  hw/i386/vmmouse.c   |  6 ++---
  hw/i386/xen/xen-hvm.c   |  3 +--
  target/i386/arch_memory_mapping.c   |  3 +--
  target/i386/cpu-dump.c  |  3 +--
  target/i386/cpu.c   | 37 +--
  target/i386/helper.c| 39 -
  target/i386/hvf/hvf.c   |  8 ++
  target/i386/hvf/x86.c   |  4 +--
  target/i386/hvf/x86_emu.c   |  6 ++---
  target/i386/hvf/x86_task.c  | 10 +++-
  target/i386/hvf/x86hvf.c|  6 ++---
  target/i386/kvm/kvm.c   |  6 ++---
  target/i386/kvm/xen-emu.c   | 32 ---
  target/i386/tcg/sysemu/bpt_helper.c |  3 +--
  target/i386/tcg/tcg-cpu.c   | 14 +++
  target/i386/tcg/user/excp_helper.c  |  3 +--
  target/i386/tcg/user/seg_helper.c   |  3 +--
  18 files changed, 59 insertions(+), 140 deletions(-)



[snip]


diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c
index 3b1ef5f49a..1e7fd587fe 100644
--- a/target/i386/hvf/x86hvf.c
+++ b/target/i386/hvf/x86hvf.c
@@ -238,8 +238,7 @@ void hvf_get_msrs(CPUState *cs)
  
  int hvf_put_registers(CPUState *cs)

  {
-X86CPU *x86cpu = X86_CPU(cs);
-CPUX86State *env = &x86cpu->env;
+CPUX86State *env = cpu_env(cs);
  
  wreg(cs->accel->fd, HV_X86_RAX, env->regs[R_EAX]);

  wreg(cs->accel->fd, HV_X86_RBX, env->regs[R_EBX]);
@@ -282,8 +281,7 @@ int hvf_put_registers(CPUState *cs)
  
  int hvf_get_registers(CPUState *cs)

  {
-X86CPU *x86cpu = X86_CPU(cs);
-CPUX86State *env = &x86cpu->env;
+CPUX86State *env = cpu_env(cs);
  
  env->regs[R_EAX] = rreg(cs->accel->fd, HV_X86_RAX);

  env->regs[R_EBX] = rreg(cs->accel->fd, HV_X86_RBX);


In this file, there's another corner case:

diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c
index 3b1ef5f49a8a..9a145aa5aa4f 100644
--- a/target/i386/hvf/x86hvf.c
+++ b/target/i386/hvf/x86hvf.c
@@ -342,8 +342,7 @@ void vmx_clear_int_window_exiting(CPUState *cs)

  bool hvf_inject_interrupts(CPUState *cs)
  {
-X86CPU *x86cpu = X86_CPU(cs);
-CPUX86State *env = &x86cpu->env;
+CPUX86State *env = cpu_env(cs);

  uint8_t vector;
  uint64_t intr_type;
@@ -408,7 +407,7 @@ bool hvf_inject_interrupts(CPUState *cs)
  if (!(env->hflags & HF_INHIBIT_IRQ_MASK) &&
  (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
  (env->eflags & IF_MASK) && !(info & VMCS_INTR_VALID)) {
-int line = cpu_get_pic_interrupt(&x86cpu->env);
+int line = cpu_get_pic_interrupt(env);
  cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
  if (line >= 0) {
  wvmcs(cs->accel->fd, VMCS_ENTRY_INTR_INFO, line |


For this special case, I'm not sure if the script can cover it as well,
otherwise maybe it's OK to be cleaned up manually ;-).


BTW I forgot to mention I had to skip target/i386/tcg/translate.c
(7100 LoC) because it is too complex for Coccinelle.



[PATCH v2 10/23] target/i386: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-01-26 Thread Philippe Mathieu-Daudé
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé 
---
 target/i386/hvf/vmx.h   | 13 +++---
 hw/i386/vmmouse.c   |  6 ++---
 hw/i386/xen/xen-hvm.c   |  3 +--
 target/i386/arch_memory_mapping.c   |  3 +--
 target/i386/cpu-dump.c  |  3 +--
 target/i386/cpu.c   | 37 +--
 target/i386/helper.c| 39 -
 target/i386/hvf/hvf.c   |  8 ++
 target/i386/hvf/x86.c   |  4 +--
 target/i386/hvf/x86_emu.c   |  6 ++---
 target/i386/hvf/x86_task.c  | 10 +++-
 target/i386/hvf/x86hvf.c|  6 ++---
 target/i386/kvm/kvm.c   |  6 ++---
 target/i386/kvm/xen-emu.c   | 32 ---
 target/i386/tcg/sysemu/bpt_helper.c |  3 +--
 target/i386/tcg/tcg-cpu.c   | 14 +++
 target/i386/tcg/user/excp_helper.c  |  3 +--
 target/i386/tcg/user/seg_helper.c   |  3 +--
 18 files changed, 59 insertions(+), 140 deletions(-)

diff --git a/target/i386/hvf/vmx.h b/target/i386/hvf/vmx.h
index 0fffcfa46c..1ad042269b 100644
--- a/target/i386/hvf/vmx.h
+++ b/target/i386/hvf/vmx.h
@@ -175,8 +175,7 @@ static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t 
cr4)
 
 static inline void macvm_set_rip(CPUState *cpu, uint64_t rip)
 {
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = &x86_cpu->env;
+CPUX86State *env = cpu_env(cpu);
 uint64_t val;
 
 /* BUG, should take considering overlap.. */
@@ -196,10 +195,7 @@ static inline void macvm_set_rip(CPUState *cpu, uint64_t 
rip)
 
 static inline void vmx_clear_nmi_blocking(CPUState *cpu)
 {
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = &x86_cpu->env;
-
-env->hflags2 &= ~HF2_NMI_MASK;
+cpu_env(cpu)->hflags2 &= ~HF2_NMI_MASK;
 uint32_t gi = (uint32_t) rvmcs(cpu->accel->fd, 
VMCS_GUEST_INTERRUPTIBILITY);
 gi &= ~VMCS_INTERRUPTIBILITY_NMI_BLOCKING;
 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi);
@@ -207,10 +203,7 @@ static inline void vmx_clear_nmi_blocking(CPUState *cpu)
 
 static inline void vmx_set_nmi_blocking(CPUState *cpu)
 {
-X86CPU *x86_cpu = X86_CPU(cpu);
-CPUX86State *env = &x86_cpu->env;
-
-env->hflags2 |= HF2_NMI_MASK;
+cpu_env(cpu)->hflags2 |= HF2_NMI_MASK;
 uint32_t gi = (uint32_t)rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY);
 gi |= VMCS_INTERRUPTIBILITY_NMI_BLOCKING;
 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi);
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index a8d014d09a..f292a14a15 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -74,8 +74,7 @@ struct VMMouseState {
 
 static void vmmouse_get_data(uint32_t *data)
 {
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(current_cpu);
 
 data[0] = env->regs[R_EAX]; data[1] = env->regs[R_EBX];
 data[2] = env->regs[R_ECX]; data[3] = env->regs[R_EDX];
@@ -84,8 +83,7 @@ static void vmmouse_get_data(uint32_t *data)
 
 static void vmmouse_set_data(const uint32_t *data)
 {
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(current_cpu);
 
 env->regs[R_EAX] = data[0]; env->regs[R_EBX] = data[1];
 env->regs[R_ECX] = data[2]; env->regs[R_EDX] = data[3];
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index f42621e674..61e5060117 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -487,8 +487,7 @@ static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t 
*req)
 
 static void regs_from_cpu(vmware_regs_t *vmport_regs)
 {
-X86CPU *cpu = X86_CPU(current_cpu);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(current_cpu);
 
 vmport_regs->ebx = env->regs[R_EBX];
 vmport_regs->ecx = env->regs[R_ECX];
diff --git a/target/i386/arch_memory_mapping.c 
b/target/i386/arch_memory_mapping.c
index d1ff659128..c0604d5956 100644
--- a/target/i386/arch_memory_mapping.c
+++ b/target/i386/arch_memory_mapping.c
@@ -269,8 +269,7 @@ static void walk_pml5e(MemoryMappingList *list, 
AddressSpace *as,
 bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
 Error **errp)
 {
-X86CPU *cpu = X86_CPU(cs);
-CPUX86State *env = &cpu->env;
+CPUX86State *env = cpu_env(cs);
 int32_t a20_mask;
 
 if (!cpu_paging_enabled(cs)) {
diff --git a/target/i386/cpu-dump.c b/target/i386/cpu-dump.c
index 40697064d9..5459d84abd 100644
--- a/target/i386/cpu-dump.c
+++ b/target/i386/cpu-dump.c
@@ -343,8 +343,7 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, int flags)
 
 void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags)
 {
-X86CPU *cpu = X86_CPU(cs);

Re: [PATCH 2/2] bulk: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-01-26 Thread Philippe Mathieu-Daudé

On 26/1/24 18:09, Thomas Huth wrote:

On 25/01/2024 17.56, Philippe Mathieu-Daudé wrote:

Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé 
---



  114 files changed, 273 insertions(+), 548 deletions(-)


A huge patch ... I wonder whether it would make sense to split it up by 
target architecture to ease the review?


...

diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index a8d014d09a..eb0613bfbe 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -74,8 +74,7 @@ struct VMMouseState {
  static void vmmouse_get_data(uint32_t *data)
  {
-    X86CPU *cpu = X86_CPU(current_cpu);
-    CPUX86State *env = &cpu->env;
+    CPUX86State *env = cpu_env(CPU(current_cpu));


No need for the CPU() cast here, current_cpu is already
of type "CPUState *".


Yes, Paolo noticed and I fixed for v2.


I'll stop here, please respin with the cpu_env(CPU(current_cpu)) fixed to
cpu_env(current_cpu), and please split the patch by target CPU types.


Well I don't know, this is an reproducible mechanical patch..
But indeed as Paolo you found an optimization so worth not making
human review a pain.

I was about to post v2 but I'll see how to split.

Thanks for the review!

Phil.



[PATCH 2/2] bulk: Prefer fast cpu_env() over slower CPU QOM cast macro

2024-01-25 Thread Philippe Mathieu-Daudé
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.

Signed-off-by: Philippe Mathieu-Daudé 
---
 target/i386/hvf/vmx.h   |  9 +++
 hw/i386/vmmouse.c   |  6 ++---
 hw/i386/xen/xen-hvm.c   |  3 +--
 hw/intc/arm_gicv3_cpuif_common.c|  3 +--
 hw/ppc/mpc8544_guts.c   |  3 +--
 hw/ppc/pnv.c|  3 +--
 hw/ppc/pnv_xscom.c  |  3 +--
 hw/ppc/ppce500_spin.c   |  3 +--
 hw/ppc/spapr.c  |  3 +--
 hw/ppc/spapr_caps.c |  6 ++---
 target/alpha/cpu.c  | 21 +--
 target/alpha/gdbstub.c  |  6 ++---
 target/alpha/helper.c   | 12 +++--
 target/alpha/mem_helper.c   |  9 +++
 target/arm/cpu.c| 15 ---
 target/arm/debug_helper.c   |  6 ++---
 target/arm/gdbstub.c|  6 ++---
 target/arm/gdbstub64.c  |  6 ++---
 target/arm/helper.c |  9 +++
 target/arm/hvf/hvf.c| 12 +++--
 target/arm/kvm.c|  3 +--
 target/arm/ptw.c|  3 +--
 target/arm/tcg/cpu32.c  |  3 +--
 target/avr/cpu.c| 21 +--
 target/avr/gdbstub.c|  6 ++---
 target/avr/helper.c |  9 +++
 target/cris/cpu.c   |  3 +--
 target/cris/gdbstub.c   |  9 +++
 target/cris/helper.c| 12 +++--
 target/cris/translate.c |  3 +--
 target/hppa/cpu.c   |  6 ++---
 target/hppa/int_helper.c|  6 ++---
 target/hppa/mem_helper.c|  3 +--
 target/i386/arch_memory_mapping.c   |  3 +--
 target/i386/cpu-dump.c  |  3 +--
 target/i386/cpu.c   | 36 +
 target/i386/helper.c| 30 +++--
 target/i386/hvf/hvf.c   |  6 ++---
 target/i386/hvf/x86.c   |  3 +--
 target/i386/hvf/x86_emu.c   |  6 ++---
 target/i386/hvf/x86_task.c  | 10 +++
 target/i386/hvf/x86hvf.c|  6 ++---
 target/i386/kvm/kvm.c   |  6 ++---
 target/i386/kvm/xen-emu.c   | 30 +++--
 target/i386/tcg/sysemu/bpt_helper.c |  3 +--
 target/i386/tcg/tcg-cpu.c   | 12 +++--
 target/i386/tcg/user/excp_helper.c  |  3 +--
 target/i386/tcg/user/seg_helper.c   |  3 +--
 target/m68k/cpu.c   | 30 +++--
 target/m68k/gdbstub.c   |  6 ++---
 target/m68k/helper.c|  3 +--
 target/m68k/m68k-semi.c |  6 ++---
 target/m68k/op_helper.c |  9 +++
 target/m68k/translate.c |  3 +--
 target/microblaze/helper.c  |  3 +--
 target/microblaze/translate.c   |  3 +--
 target/mips/cpu.c   |  9 +++
 target/mips/gdbstub.c   |  6 ++---
 target/mips/kvm.c   | 27 +++
 target/mips/sysemu/physaddr.c   |  3 +--
 target/mips/tcg/exception.c |  3 +--
 target/mips/tcg/op_helper.c |  3 +--
 target/mips/tcg/sysemu/special_helper.c |  3 +--
 target/mips/tcg/sysemu/tlb_helper.c |  6 ++---
 target/mips/tcg/translate.c |  3 +--
 target/nios2/cpu.c  |  9 +++
 target/nios2/helper.c   |  3 +--
 target/nios2/nios2-semi.c   |  6 ++---
 target/openrisc/gdbstub.c   |  3 +--
 target/openrisc/interrupt.c |  6 ++---
 target/openrisc/translate.c |  3 +--
 target/ppc/cpu_init.c   |  9 +++
 target/ppc/excp_helper.c|  3 +--
 target/ppc/gdbstub.c| 12 +++--
 target/ppc/kvm.c|  6 ++---
 target/ppc/ppc-qmp-cmds.c   |  3 +--
 target/ppc/user_only_helper.c   |  3 +--
 target/riscv/arch_dump.c|  6 ++---
 target/riscv/cpu.c  | 15 ---
 target/riscv/cpu_helper.c   | 13 +++--
 target/riscv/debug.c|  9 +++
 target/riscv/gdbstub.c  |  6 ++---
 target/riscv/kvm/kvm-cpu.c  |  6 ++---
 target/riscv/tcg/tcg-cpu.c  |  9 +++
 target/riscv/translate.c|  3 +--
 target/rx/gdbstub.c |  6 ++---
 target/rx/helper.c  |  6 ++---
 target/rx/translate.c   |  3 +--
 target/s390x/cpu-dump.c |  3 +--
 target/s390x/gdbstub.c  |  6 ++---
 target/s390x/helper.c   |  3 +--
 target/s390x/kvm/kvm.c

Re: [PATCH] hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent

2024-01-24 Thread Philippe Mathieu-Daudé

On 14/1/24 13:25, Michael S. Tsirkin wrote:

On Sun, Jan 14, 2024 at 12:21:59PM +, Bernhard Beschow wrote:



Am 7. Januar 2024 23:16:23 UTC schrieb Bernhard Beschow :

This is a follow-up on commit 89965db43cce "hw/isa/piix3: Avoid Xen-specific
variant of piix3_write_config()" which introduced
piix_intx_routing_notifier_xen(). This function is implemented in board code but
accesses the PCI configuration space of the PIIX ISA function to determine the
PCI interrupt routes. Avoid this by reusing pci_device_route_intx_to_irq() which
makes piix_intx_routing_notifier_xen() more device-agnostic.

One remaining improvement would be making piix_intx_routing_notifier_xen()
agnostic towards the number of PCI interrupt routes and move it to xen-hvm.
This might be useful for possible Q35 Xen efforts but remains a future exercise
for now.

Signed-off-by: Bernhard Beschow 


Hi Michael,

could you tag this, too? Or do we need another R-b?

Best regards,
Bernhard


tagged, too.


FYI merged as commit ebd92d6de3.



Re: [PATCH v2 5/5] hw/xen: convert stderr prints to error/warn reports

2024-01-19 Thread Philippe Mathieu-Daudé

On 19/1/24 14:24, Manos Pitsidianakis wrote:

According to the QEMU Coding Style document:


Do not use printf(), fprintf() or monitor_printf(). Instead, use
error_report() or error_vreport() from error-report.h. This ensures the
error is reported in the right place (current monitor or stderr), and in
a uniform format.
Use error_printf() & friends to print additional information.


This commit changes fprintfs that report warnings and errors to the
appropriate report functions.

Signed-off-by: Manos Pitsidianakis 
---
  hw/xen/xen-hvm-common.c | 12 ++--
  hw/xen/xen-mapcache.c   |  5 ++---
  2 files changed, 8 insertions(+), 9 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH] hw/i386/pc_piix: Make piix_intx_routing_notifier_xen() more device independent

2024-01-08 Thread Philippe Mathieu-Daudé

On 8/1/24 00:16, Bernhard Beschow wrote:

This is a follow-up on commit 89965db43cce "hw/isa/piix3: Avoid Xen-specific
variant of piix3_write_config()" which introduced
piix_intx_routing_notifier_xen(). This function is implemented in board code but
accesses the PCI configuration space of the PIIX ISA function to determine the
PCI interrupt routes. Avoid this by reusing pci_device_route_intx_to_irq() which
makes piix_intx_routing_notifier_xen() more device-agnostic.

One remaining improvement would be making piix_intx_routing_notifier_xen()
agnostic towards the number of PCI interrupt routes and move it to xen-hvm.
This might be useful for possible Q35 Xen efforts but remains a future exercise
for now.

Signed-off-by: Bernhard Beschow 
---
  hw/i386/pc_piix.c | 9 +++--
  1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 042c13cdbc..abfcfe4d2b 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -92,13 +92,10 @@ static void piix_intx_routing_notifier_xen(PCIDevice *dev)
  {
  int i;
  
-/* Scan for updates to PCI link routes (0x60-0x63). */

+/* Scan for updates to PCI link routes. */
  for (i = 0; i < PIIX_NUM_PIRQS; i++) {
-uint8_t v = dev->config_read(dev, PIIX_PIRQCA + i, 1);
-if (v & 0x80) {
-v = 0;
-}
-v &= 0xf;
+const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i);


This indeed dispatch to piix_route_intx_pin_to_irq().

Reviewed-by: Philippe Mathieu-Daudé 


+const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0;
  xen_set_pci_link_route(i, v);
  }
  }





Re: [RFC PATCH-for-9.0 0/9] hw/xen: Have ARM targets use common xen_memory_listener

2023-12-13 Thread Philippe Mathieu-Daudé

ping?

On 14/11/23 17:31, Philippe Mathieu-Daudé wrote:

Hi,

While looking at Xen target-specific code, I noticed some
generic code used by x86 which is not implemented for ARM.

Maybe ARM machines don't need it, I don't know. But I
wanted to see if I can get this common code target agnostic
and build it once, possibly bringing smth useful to ARM.

The changes don't break CI testing and Avocado local tests.
If this xen_memory_listener feature isn't required for ARM,
I'll send follow up patch that keep this series with common
xen_memory_listener but with a runtime flag to disable.

Patches do the usual "change target-specific API to a
target-agnostic one", in particular using "exec/target_page.h"
at runtime. Then non-x86 code is extracted, then merged to
the generic xen/xen-hvm-common.c.

Thoughts?

Regards,

Phil.

Based-on: <20231114143816.71079-1-phi...@linaro.org>





Re: [PATCH 6/6] Rename "QEMU global mutex" to "BQL" in comments and docs

2023-11-30 Thread Philippe Mathieu-Daudé

On 29/11/23 22:26, Stefan Hajnoczi wrote:

The term "QEMU global mutex" is identical to the more widely used Big
QEMU Lock ("BQL"). Update the code comments and documentation to use
"BQL" instead of "QEMU global mutex".

Signed-off-by: Stefan Hajnoczi 
---
  docs/devel/multi-thread-tcg.rst   |  7 +++
  docs/devel/qapi-code-gen.rst  |  2 +-
  docs/devel/replay.rst |  2 +-
  docs/devel/multiple-iothreads.txt | 16 
  include/block/blockjob.h  |  6 +++---
  include/io/task.h |  2 +-
  include/qemu/coroutine-core.h |  2 +-
  include/qemu/coroutine.h  |  2 +-
  hw/block/dataplane/virtio-blk.c   |  8 
  hw/block/virtio-blk.c |  2 +-
  hw/scsi/virtio-scsi-dataplane.c   |  6 +++---
  net/tap.c |  2 +-
  12 files changed, 28 insertions(+), 29 deletions(-)




diff --git a/include/block/blockjob.h b/include/block/blockjob.h
index e594c10d23..b2bc7c04d6 100644
--- a/include/block/blockjob.h
+++ b/include/block/blockjob.h
@@ -54,7 +54,7 @@ typedef struct BlockJob {
  
  /**

   * Speed that was set with @block_job_set_speed.
- * Always modified and read under QEMU global mutex (GLOBAL_STATE_CODE).
+ * Always modified and read under BQL (GLOBAL_STATE_CODE).


"under the BQL"


   */
  int64_t speed;
  
@@ -66,7 +66,7 @@ typedef struct BlockJob {
  
  /**

   * Block other operations when block job is running.
- * Always modified and read under QEMU global mutex (GLOBAL_STATE_CODE).
+ * Always modified and read under BQL (GLOBAL_STATE_CODE).


Ditto,


   */
  Error *blocker;
  
@@ -89,7 +89,7 @@ typedef struct BlockJob {
  
  /**

   * BlockDriverStates that are involved in this block job.
- * Always modified and read under QEMU global mutex (GLOBAL_STATE_CODE).
+ * Always modified and read under BQL (GLOBAL_STATE_CODE).


Ditto.


   */
  GSList *nodes;
  } BlockJob;


Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH 5/6] Replace "iothread lock" with "BQL" in comments

2023-11-30 Thread Philippe Mathieu-Daudé

Hi Stefan,

On 29/11/23 22:26, Stefan Hajnoczi wrote:

The term "iothread lock" is obsolete. The APIs use Big QEMU Lock (BQL)
in their names. Update the code comments to use "BQL" instead of
"iothread lock".

Signed-off-by: Stefan Hajnoczi 
---
  docs/devel/reset.rst |  2 +-
  hw/display/qxl.h |  2 +-
  include/exec/cpu-common.h|  2 +-
  include/exec/memory.h|  4 ++--
  include/exec/ramblock.h  |  2 +-
  include/migration/register.h |  8 
  target/arm/internals.h   |  4 ++--
  accel/tcg/cputlb.c   |  4 ++--
  accel/tcg/tcg-accel-ops-icount.c |  2 +-
  hw/remote/mpqemu-link.c  |  2 +-
  migration/block-dirty-bitmap.c   | 10 +-
  migration/block.c| 24 
  migration/colo.c |  2 +-
  migration/migration.c|  2 +-
  migration/ram.c  |  4 ++--
  system/physmem.c |  6 +++---
  target/arm/helper.c  |  2 +-
  target/arm/tcg/m_helper.c|  2 +-
  ui/spice-core.c  |  2 +-
  util/rcu.c   |  2 +-
  audio/coreaudio.m|  4 ++--
  ui/cocoa.m   |  6 +++---
  22 files changed, 49 insertions(+), 49 deletions(-)




diff --git a/include/exec/ramblock.h b/include/exec/ramblock.h
index 69c6a53902..a2bc0a345d 100644
--- a/include/exec/ramblock.h
+++ b/include/exec/ramblock.h
@@ -34,7 +34,7 @@ struct RAMBlock {
  ram_addr_t max_length;
  void (*resized)(const char*, uint64_t length, void *host);
  uint32_t flags;
-/* Protected by iothread lock.  */
+/* Protected by BQL.  */


There is only one single BQL, so preferably:

"by the BQL"


  char idstr[256];
  /* RCU-enabled, writes protected by the ramlist lock */
  QLIST_ENTRY(RAMBlock) next;






-/* Called with iothread lock taken.  */
+/* Called with BQL taken.  */


"with the BQL" (other uses)

Otherwise,

Reviewed-by: Philippe Mathieu-Daudé 


  static void dirty_bitmap_do_save_cleanup(DBMSaveState *s)
  {
  SaveBitmapState *dbms;
@@ -479,7 +479,7 @@ static void dirty_bitmap_do_save_cleanup(DBMSaveState *s)
  }
  }





Re: [PATCH 4/6] system/cpus: rename qemu_global_mutex to qemu_bql

2023-11-30 Thread Philippe Mathieu-Daudé

Hi Stefan,

On 29/11/23 22:26, Stefan Hajnoczi wrote:

The APIs using qemu_global_mutex now follow the Big QEMU Lock (BQL)
nomenclature. It's a little strange that the actual QemuMutex variable
that embodies the BQL is called qemu_global_mutex instead of qemu_bql.
Rename it for consistency.

Signed-off-by: Stefan Hajnoczi 
---
  system/cpus.c | 20 ++--
  1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/system/cpus.c b/system/cpus.c
index eb24a4db8e..138720a540 100644
--- a/system/cpus.c
+++ b/system/cpus.c
@@ -65,7 +65,7 @@
  
  #endif /* CONFIG_LINUX */
  
-static QemuMutex qemu_global_mutex;

+static QemuMutex qemu_bql;


I thought we were using _cond/_sem/_mutex suffixes, but
this is not enforced:

$ git grep -hE 'Qemu(Cond|Mutex|Semaphore) [a-zA-Z]' \
  | sed -e 's/static //' -e 's/extern //' -e 's/^ *//' \
  | sort -u
QemuCond comp_done_cond;
QemuCond cond;
QemuCond decomp_done_cond;
QemuCond event_complete_cond;
QemuCond exclusive_cond;
QemuCond exclusive_resume;
QemuCond fwnmi_machine_check_interlock_cond;
QemuCond handle_apdu_cond;
QemuCond init_done_cond;/* is thread initialization done? */
QemuCond key_cond;
QemuCond mutex_cond;
QemuCond page_cond;
QemuCond page_request_cond;
QemuCond qemu_cpu_cond;
QemuCond qemu_pause_cond;
QemuCond qemu_work_cond;
QemuCond request_cond;
QemuCond reset_cond;
QemuCond thr_cond;
QemuCond thread_cond;
QemuCond worker_stopped;
QemuMutex active_timers_lock;
QemuMutex aio_context_list_lock;
QemuMutex bitmap_mutex;
QemuMutex blkio_lock;
QemuMutex chr_write_lock;
QemuMutex cmdq_mutex;
QemuMutex colo_compare_mutex;
QemuMutex comp_done_lock;
QemuMutex counts_mutex;
QemuMutex decomp_done_lock;
QemuMutex dirty_bitmap_mutex;
QemuMutex dirtylimit_mutex;
QemuMutex error_mutex;
QemuMutex event_list_mutex;
QemuMutex event_mtx;
QemuMutex evlock;
QemuMutex free_page_lock;
QemuMutex global_mutex;
QemuMutex gnt_lock;
QemuMutex handle_apdu_mutex;
QemuMutex handlers_mutex;
QemuMutex init_done_lock;
QemuMutex intp_mutex; /* protect the intp_list IRQ state */
QemuMutex io_mutex;
QemuMutex iommu_lock;
QemuMutex irq_level_lock[REMOTE_IOHUB_NB_PIRQS];
QemuMutex job_mutex;
QemuMutex key_mutex;
QemuMutex kml_slots_lock;
QemuMutex lock;
QemuMutex m;
QemuMutex map_client_list_lock;
QemuMutex migration_threads_lock;
QemuMutex mon_fdsets_lock;
QemuMutex mon_lock;
QemuMutex monitor_lock;
QemuMutex mutex;
QemuMutex output_mutex;
QemuMutex page_mutex;
QemuMutex page_request_mutex;
QemuMutex pending_out_mutex;
QemuMutex port_lock;
QemuMutex postcopy_prio_thread_mutex;
QemuMutex qemu_cpu_list_lock;
QemuMutex qemu_file_lock;
QemuMutex qemu_global_mutex;
QemuMutex qemu_sigp_mutex;
QemuMutex qjack_shutdown_lock;
QemuMutex qmp_queue_lock;
QemuMutex queue_mutex;
QemuMutex queued_requests_lock; /* protects queued_requests */
QemuMutex ram_block_discard_disable_mutex;
QemuMutex rcu_registry_lock;
QemuMutex rcu_sync_lock;
QemuMutex readdir_mutex_L;
QemuMutex reqs_lock;
QemuMutex requests_lock;
QemuMutex rp_mutex;/* We send replies from multiple threads */
QemuMutex rsp_mutex;
QemuMutex rx_queue_lock;
QemuMutex sigbus_mutex;
QemuMutex sint_routes_mutex;
QemuMutex src_page_req_mutex;
QemuMutex start_lock;
QemuMutex target_fd_trans_lock;
QemuMutex thr_mutex;
QemuMutex thread_lock;
QemuMutex vdev_mutex;
QemuMutex vmstop_lock;
QemuMutex vreader_mutex; /* and guest_apdu_list mutex */
QemuMutex work_mutex;
QemuMutex xen_timers_lock;
QemuMutex yank_lock;
QemuSemaphore channels_ready;
QemuSemaphore colo_exit_sem;
QemuSemaphore colo_incoming_sem;
QemuSemaphore init_done_sem; /* is thread init done? */
QemuSemaphore pause_sem;
QemuSemaphore postcopy_pause_sem;
QemuSemaphore postcopy_pause_sem_dst;
QemuSemaphore postcopy_pause_sem_fast_load;
QemuSemaphore postcopy_pause_sem_fault;
QemuSemaphore postcopy_qemufile_dst_done;
QemuSemaphore postcopy_qemufile_src_sem;
QemuSemaphore rate_limit_sem;
QemuSemaphore rp_pong_acks;
QemuSemaphore rp_sem;
QemuSemaphore sem;
QemuSemaphore sem_sync;
QemuSemaphore sem_thread;
QemuSemaphore wait_unplug_sem;

So:
Reviewed-by: Philippe Mathieu-Daudé 




Re: [PATCH 3/6] qemu/main-loop: rename qemu_cond_wait_iothread() to qemu_cond_wait_bql()

2023-11-30 Thread Philippe Mathieu-Daudé

On 29/11/23 22:26, Stefan Hajnoczi wrote:

The name "iothread" is overloaded. Use the term Big QEMU Lock (BQL)
instead, it is already widely used and unambiguous.

Signed-off-by: Stefan Hajnoczi 
---
  include/qemu/main-loop.h  | 8 
  accel/tcg/tcg-accel-ops-rr.c  | 4 ++--
  hw/display/virtio-gpu.c   | 2 +-
  hw/ppc/spapr_events.c | 2 +-
  system/cpu-throttle.c | 2 +-
  system/cpus.c | 4 ++--
  target/i386/nvmm/nvmm-accel-ops.c | 2 +-
  target/i386/whpx/whpx-accel-ops.c | 2 +-
  8 files changed, 13 insertions(+), 13 deletions(-)


Reviewed-by: Philippe Mathieu-Daudé 




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