Re: [PATCH 2/2] ns16550: Add support for Intel LPSS UART

[Jan Beulich]

On 10.03.2022 15:34, Marek Marczykowski-Górecki wrote:
> This adds support for serial console as found in a laptop with TGL-LP
> (StarBook MkV). Since the device is on the bus 0, it needs to be enabled
> via "com1=...,amt", not just "...,pci".
> 
> Device specification is in Intel docs 631119-007 and 631120-001.
> 
> Signed-off-by: Marek Marczykowski-Górecki 

Reviewed-by: Jan Beulich 

> ---
> This adds only a single device (UART#2) to the table - the only one I
> have present, but the specification includes other device ids too. Should I
> add them too? I don't have a way to test that, though.

Personally I would have added the other ones as well, likely even going
further and including those from the other 500 Series variant as well,
and maybe yet further including e.g. 600 Series IDs too. But if you
want to restrict this to what you can test, that's certainly fine.

Jan

[PATCH 2/2] ns16550: Add support for Intel LPSS UART

[Marek Marczykowski-Górecki]

This adds support for serial console as found in a laptop with TGL-LP
(StarBook MkV). Since the device is on the bus 0, it needs to be enabled
via "com1=...,amt", not just "...,pci".

Device specification is in Intel docs 631119-007 and 631120-001.

Signed-off-by: Marek Marczykowski-Górecki 
---
This adds only a single device (UART#2) to the table - the only one I
have present, but the specification includes other device ids too. Should I
add them too? I don't have a way to test that, though.
---
 xen/drivers/char/ns16550.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c
index 2d7c8c11bc69..edf981db22f4 100644
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -91,6 +91,7 @@ struct ns16550_config {
 param_exar_xr17v352,
 param_exar_xr17v354,
 param_exar_xr17v358,
+param_intel_lpss,
 } param;
 };
 
@@ -822,6 +823,16 @@ static const struct ns16550_config_param __initconst 
uart_param[] = {
 .mmio = 1,
 .max_ports = 8,
 },
+[param_intel_lpss] = {
+.uart_offset = 0x000,
+.reg_shift = 2,
+.reg_width = 1,
+.fifo_size = 64,
+.lsr_mask = UART_LSR_THRE,
+.bar0 = 1,
+.mmio = 1,
+.max_ports = 1,
+},
 };
 
 static const struct ns16550_config __initconst uart_config[] =
@@ -1066,6 +1077,12 @@ static const struct ns16550_config __initconst 
uart_config[] =
 .dev_id = 0x0358,
 .param = param_exar_xr17v358
 },
+/* Intel Corp. TGL-LP LPSS PCI */
+{
+.vendor_id = PCI_VENDOR_ID_INTEL,
+.dev_id = 0xa0c7,
+.param = param_intel_lpss
+},
 };
 
 static int __init
-- 
2.31.1