Re: [PATCH 8/9] x86emul: support AVX-NE-CONVERT insns

2023-04-17 Thread Jan Beulich
On 06.04.2023 23:22, Andrew Cooper wrote:
> On 04/04/2023 3:54 pm, Jan Beulich wrote:
>> Matching what was done earlier, explicit tests are added only for
>> irregular insn / memory access patterns.
>>
>> Signed-off-by: Jan Beulich 
> 
> Reviewed-by: Andrew Cooper ,

Thanks.

> with two minor requests.
> 
>> --- a/tools/misc/xen-cpuid.c
>> +++ b/tools/misc/xen-cpuid.c
>> @@ -214,7 +214,7 @@ static const char *const str_7c1[32] =
>>  
>>  static const char *const str_7d1[32] =
>>  {
>> -[ 4] = "avx-vnni-int8",
>> +[ 4] = "avx-vnni-int8", [ 5] = "avx-ne-convert",
> 
> I'd leave a bit more horizontal space.  These names are getting rather
> long, and we're only 10% into this word.

Sure. I had taken neighboring arrays as reference; I've now switched
to "aligning" with rtm-always-abort.

>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -6208,6 +6208,19 @@ x86_emulate(
>>  host_and_vcpu_must_have(avx512_vbmi2);
>>  goto avx512f_no_sae;
>>  
>> +case X86EMUL_OPC_VEX   (0x0f38, 0xb0): /* vcvtneoph2ps mem,[xy]mm */
>> +case X86EMUL_OPC_VEX_66(0x0f38, 0xb0): /* vcvtneeph2ps mem,[xy]mm */
>> +case X86EMUL_OPC_VEX_F3(0x0f38, 0xb0): /* vcvtneebf162ps mem,[xy]mm */
>> +case X86EMUL_OPC_VEX_F2(0x0f38, 0xb0): /* vcvtneobf162ps mem,[xy]mm */
>> +generate_exception_if(ea.type != OP_MEM, EXC_UD);
>> +/* fall through */
> 
> Only just occurred to me, but we should probably be using fallthrough;
> in new code, now there's a real attribute to use.

I did actually consider doing so (and iirc also already on an earlier
occasion), but that'll be yet another item we also need to cater for
in the harness'es x86-emulate.h. For the moment I prefer to stick to
comments, switching over - if necessary for e.g. Misra - all in one
go at some point.

Jan



Re: [PATCH 8/9] x86emul: support AVX-NE-CONVERT insns

2023-04-06 Thread Andrew Cooper
On 04/04/2023 3:54 pm, Jan Beulich wrote:
> Matching what was done earlier, explicit tests are added only for
> irregular insn / memory access patterns.
>
> Signed-off-by: Jan Beulich 

Reviewed-by: Andrew Cooper , with two minor
requests.

> --- a/tools/misc/xen-cpuid.c
> +++ b/tools/misc/xen-cpuid.c
> @@ -214,7 +214,7 @@ static const char *const str_7c1[32] =
>  
>  static const char *const str_7d1[32] =
>  {
> -[ 4] = "avx-vnni-int8",
> +[ 4] = "avx-vnni-int8", [ 5] = "avx-ne-convert",

I'd leave a bit more horizontal space.  These names are getting rather
long, and we're only 10% into this word.

> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -6208,6 +6208,19 @@ x86_emulate(
>  host_and_vcpu_must_have(avx512_vbmi2);
>  goto avx512f_no_sae;
>  
> +case X86EMUL_OPC_VEX   (0x0f38, 0xb0): /* vcvtneoph2ps mem,[xy]mm */
> +case X86EMUL_OPC_VEX_66(0x0f38, 0xb0): /* vcvtneeph2ps mem,[xy]mm */
> +case X86EMUL_OPC_VEX_F3(0x0f38, 0xb0): /* vcvtneebf162ps mem,[xy]mm */
> +case X86EMUL_OPC_VEX_F2(0x0f38, 0xb0): /* vcvtneobf162ps mem,[xy]mm */
> +generate_exception_if(ea.type != OP_MEM, EXC_UD);
> +/* fall through */

Only just occurred to me, but we should probably be using fallthrough;
in new code, now there's a real attribute to use.

~Andrew



[PATCH 8/9] x86emul: support AVX-NE-CONVERT insns

2023-04-04 Thread Jan Beulich
Matching what was done earlier, explicit tests are added only for
irregular insn / memory access patterns.

Signed-off-by: Jan Beulich 
---
SDE: -grr or -srf

--- a/tools/libs/light/libxl_cpuid.c
+++ b/tools/libs/light/libxl_cpuid.c
@@ -242,6 +242,7 @@ int libxl_cpuid_parse_config(libxl_cpuid
 {"avx-ifma", 0x0007,  1, CPUID_REG_EAX, 23,  1},
 
 {"avx-vnni-int8",0x0007,  1, CPUID_REG_EDX,  4,  1},
+{"avx-ne-convert",0x0007, 1, CPUID_REG_EDX,  5,  1},
 {"cet-sss",  0x0007,  1, CPUID_REG_EDX, 18,  1},
 
 {"intel-psfd",   0x0007,  2, CPUID_REG_EDX,  0,  1},
--- a/tools/misc/xen-cpuid.c
+++ b/tools/misc/xen-cpuid.c
@@ -214,7 +214,7 @@ static const char *const str_7c1[32] =
 
 static const char *const str_7d1[32] =
 {
-[ 4] = "avx-vnni-int8",
+[ 4] = "avx-vnni-int8", [ 5] = "avx-ne-convert",
 
 [18] = "cet-sss",
 };
--- a/tools/tests/x86_emulator/predicates.c
+++ b/tools/tests/x86_emulator/predicates.c
@@ -1350,6 +1350,7 @@ static const struct vex {
 { { 0x58 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastd */
 { { 0x59 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastq */
 { { 0x5a }, 2, F, R, pfx_66, W0, L1 }, /* vbroadcasti128 */
+{ { 0x72 }, 2, T, R, pfx_f3, W0, Ln }, /* vcvtneps2bf16 */
 { { 0x78 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastb */
 { { 0x79 }, 2, T, R, pfx_66, W0, Ln }, /* vpbroadcastw */
 { { 0x8c }, 2, F, R, pfx_66, Wn, Ln }, /* vpmaskmov{d,q} */
@@ -1378,6 +1379,12 @@ static const struct vex {
 { { 0xad }, 2, T, R, pfx_66, Wn, LIG }, /* vnmadd213s{s,d} */
 { { 0xae }, 2, T, R, pfx_66, Wn, Ln }, /* vnmsub213p{s,d} */
 { { 0xaf }, 2, T, R, pfx_66, Wn, LIG }, /* vnmsub213s{s,d} */
+{ { 0xb0 }, 2, F, R, pfx_no, W0, Ln }, /* vcvtneoph2ps */
+{ { 0xb0 }, 2, F, R, pfx_66, W0, Ln }, /* vcvtneeph2ps */
+{ { 0xb0 }, 2, F, R, pfx_f3, W0, Ln }, /* vcvtneebf162ps */
+{ { 0xb0 }, 2, F, R, pfx_f2, W0, Ln }, /* vcvtneobf162ps */
+{ { 0xb1 }, 2, F, R, pfx_66, W0, Ln }, /* vbcstnesh2ps */
+{ { 0xb1 }, 2, F, R, pfx_f3, W0, Ln }, /* vbcstnebf162ps */
 { { 0xb4 }, 2, T, R, pfx_66, W1, Ln }, /* vpmadd52luq */
 { { 0xb5 }, 2, T, R, pfx_66, W1, Ln }, /* vpmadd52huq */
 { { 0xb6 }, 2, T, R, pfx_66, Wn, Ln }, /* vmaddsub231p{s,d} */
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -4572,6 +4572,39 @@ int main(int argc, char **argv)
 else
 printf("skipped\n");
 
+printf("%-40s", "Testing vbcstnebf162ps 2(%ecx),%ymm3...");
+if ( stack_exec && cpu_has_avx_ne_convert )
+{
+decl_insn(vbcstnebf162ps);
+
+asm volatile ( /* vbcstnebf162ps 2(%0), %%ymm3 */
+   put_insn(vbcstnebf162ps,
+".byte 0xc4, 0xe2, 0x7e, 0xb1, 0x59, 0x02 ")
+   :: "c" (NULL) );
+
+res[0] = 0x4321;
+regs.ecx = (unsigned long)res;
+set_insn(vbcstnebf162ps);
+bytes_read  = 0;
+rc = x86_emulate(&ctxt, &emulops);
+if ( rc != X86EMUL_OKAY || !check_eip(vbcstnebf162ps) ||
+ bytes_read != 2 )
+goto fail;
+
+asm volatile ( "vbroadcastss %1, %%ymm2;"
+   "vsubps %%ymm3, %%ymm2, %%ymm1;"
+   "vptest %%ymm1, %%ymm1;"
+   "setc %b0; setz %h0"
+   : "=&Q" (rc)
+   : "m" (res[0]) );
+if ( (rc & 0x) != 0x0101 )
+goto fail;
+
+printf("okay\n");
+}
+else
+printf("skipped\n");
+
 printf("%-40s", "Testing stmxcsr (%edx)...");
 if ( cpu_has_sse )
 {
--- a/tools/tests/x86_emulator/x86-emulate.h
+++ b/tools/tests/x86_emulator/x86-emulate.h
@@ -188,6 +188,7 @@ void wrpkru(unsigned int val);
 #define cpu_has_cmpccxadd  cp.feat.cmpccxadd
 #define cpu_has_avx_ifma   (cp.feat.avx_ifma && xcr0_mask(6))
 #define cpu_has_avx_vnni_int8 (cp.feat.avx_vnni_int8 && xcr0_mask(6))
+#define cpu_has_avx_ne_convert (cp.feat.avx_ne_convert && xcr0_mask(6))
 
 #define cpu_has_xgetbv1   (cpu_has_xsave && cp.xstate.xgetbv1)
 
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -175,6 +175,7 @@ extern struct cpuinfo_x86 boot_cpu_data;
 
 /* CPUID level 0x0007:1.edx */
 #define cpu_has_avx_vnni_int8   boot_cpu_has(X86_FEATURE_AVX_VNNI_INT8)
+#define cpu_has_avx_ne_convert  boot_cpu_has(X86_FEATURE_AVX_NE_CONVERT)
 
 /* Synthesized. */
 #define cpu_has_arch_perfmonboot_cpu_has(X86_FEATURE_ARCH_PERFMON)
--- a/xen/arch/x86/x86_emulate/decode.c
+++ b/xen/arch/x86/x86_emulate/decode.c
@@ -423,6 +423,8 @@ static const struct ext0f38_table {
 [0xad] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq },
 [0xae] = { .simd_size = simd_packed_fp, .d8s = d8s_vl },
 [0xaf] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq },
+[0xb0] = { .simd_size = simd_other, .two_op = 1 },
+[0xb1] = { .simd_size