Re: [Xen-devel] [PATCH v4 4/4] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features

2018-01-03 Thread Yang Zhong 
On Wed, Jan 03, 2018 at 01:46:09AM -0700, Jan Beulich wrote:

> > --- a/xen/include/public/arch-x86/cpufeatureset.h
> > +++ b/xen/include/public/arch-x86/cpufeatureset.h
> > @@ -228,6 +228,12 @@ XEN_CPUFEATURE(AVX512VBMI,6*32+ 1) /*A  AVX-512 
> > Vector Byte Manipulation Ins
> >  XEN_CPUFEATURE(UMIP,  6*32+ 2) /*S  User Mode Instruction 
> > Prevention */
> >  XEN_CPUFEATURE(PKU,   6*32+ 3) /*H  Protection Keys for Userspace 
> > */
> >  XEN_CPUFEATURE(OSPKE, 6*32+ 4) /*!  OS Protection Keys Enable */
> > +XEN_CPUFEATURE(AVX512_VBMI2,  6*32+ 6) /*A  addition AVX-512 VBMI 
> > Instructions */
> 
> "additional"?
  Jan, i will change "addition" to "additional", thanks! Yang.
 
> > --- a/xen/tools/gen-cpuid.py
> > +++ b/xen/tools/gen-cpuid.py
> > @@ -255,7 +255,8 @@ def crunch_numbers(state):
> >  # top of AVX512F
> >  AVX512F: [AVX512DQ, AVX512IFMA, AVX512PF, AVX512ER, AVX512CD,
> >AVX512BW, AVX512VL, AVX512VBMI, AVX512_4VNNIW,
> > -  AVX512_4FMAPS, AVX512_VPOPCNTDQ],
> > +  AVX512_4FMAPS, AVX512_VPOPCNTDQ, AVX512_VBMI2,
> > +  AVX512_VNNI, AVX512_BITALG],
> >  }
> 
> This is insufficient afaict: VAES and VPCLMULQDQ ought to be
> made dependent upon AVX.

  Thanks Jan, i will do below changes for this.  Yang.

-AVX: [FMA, FMA4, F16C, AVX2, XOP],
+AVX: [FMA, FMA4, F16C, AVX2, XOP, VAES, VPCLMULQDQ],

> 
> Jan

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Re: [Xen-devel] [PATCH v4 4/4] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features

2018-01-03 Thread Jan Beulich 
>>> On 03.01.18 at 09:26,  wrote:
> Intel IceLake cpu has added new cpu features: AVX512VBMI2/GFNI/
> VAES/AVX512VNNI/AVX512BITALG/VPCLMULQDQ. Those new cpu features
> need expose to guest.
> 
> The bit definition:
> CPUID.(EAX=7,ECX=0):ECX[bit 06] AVX512VBMI2
> CPUID.(EAX=7,ECX=0):ECX[bit 08] GFNI
> CPUID.(EAX=7,ECX=0):ECX[bit 09] VAES
> CPUID.(EAX=7,ECX=0):ECX[bit 10] VPCLMULQDQ
> CPUID.(EAX=7,ECX=0):ECX[bit 11] AVX512VNNI
> CPUID.(EAX=7,ECX=0):ECX[bit 12] AVX512_BITALG
> 
> The release document ref below link:
> https://software.intel.com/sites/default/files/managed/c5/15/\ 
> architecture-instruction-set-extensions-programming-reference.pdf
> 
> Signed-off-by: Yang Zhong 
> Acked-by: Jan Beulich 

I have to withdraw my ack here.

> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -228,6 +228,12 @@ XEN_CPUFEATURE(AVX512VBMI,6*32+ 1) /*A  AVX-512 
> Vector Byte Manipulation Ins
>  XEN_CPUFEATURE(UMIP,  6*32+ 2) /*S  User Mode Instruction Prevention 
> */
>  XEN_CPUFEATURE(PKU,   6*32+ 3) /*H  Protection Keys for Userspace */
>  XEN_CPUFEATURE(OSPKE, 6*32+ 4) /*!  OS Protection Keys Enable */
> +XEN_CPUFEATURE(AVX512_VBMI2,  6*32+ 6) /*A  addition AVX-512 VBMI 
> Instructions */

"additional"?

> --- a/xen/tools/gen-cpuid.py
> +++ b/xen/tools/gen-cpuid.py
> @@ -255,7 +255,8 @@ def crunch_numbers(state):
>  # top of AVX512F
>  AVX512F: [AVX512DQ, AVX512IFMA, AVX512PF, AVX512ER, AVX512CD,
>AVX512BW, AVX512VL, AVX512VBMI, AVX512_4VNNIW,
> -  AVX512_4FMAPS, AVX512_VPOPCNTDQ],
> +  AVX512_4FMAPS, AVX512_VPOPCNTDQ, AVX512_VBMI2,
> +  AVX512_VNNI, AVX512_BITALG],
>  }

This is insufficient afaict: VAES and VPCLMULQDQ ought to be
made dependent upon AVX.

Jan


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