[Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-10-22 Thread André Przywara
On 8/7/18 6:07 PM, Amit Singh Tomar wrote:

Hi,

> This patch adds driver for UART controller present on Amlogic S905
> SoC.
> https://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf
> 
> Signed-off-by: Amit Singh Tomar 
> ---
>  xen/drivers/char/Kconfig  |   8 ++
>  xen/drivers/char/Makefile |   1 +
>  xen/drivers/char/meson-uart.c | 290
> ++ 3 files changed, 299
> insertions(+) create mode 100644 xen/drivers/char/meson-uart.c
> 
> diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig
> index cc78ec3..b9fee4e 100644
> --- a/xen/drivers/char/Kconfig
> +++ b/xen/drivers/char/Kconfig
> @@ -20,6 +20,14 @@ config HAS_MVEBU
> This selects the Marvell MVEBU UART. If you have a ARMADA
> 3700 based board, say Y.
>  
> +config HAS_MESON
> +bool
> +default y
> +depends on ARM_64
> +help
> +  This selects the Marvell MESON UART. If you have a Amlogic S905
> +  based board, say Y.

It seems this UART driver supports all Amlogic SoCs (905X, 805X, 912,
...), not just the S905. So please either remove the number or make it
clear that it's just an example.
And it's not a Marvell UART ;-)

> +
>  config HAS_PL011
>   bool
>   default y
> diff --git a/xen/drivers/char/Makefile b/xen/drivers/char/Makefile
> index b68c330..7c646d7 100644
> --- a/xen/drivers/char/Makefile
> +++ b/xen/drivers/char/Makefile
> @@ -3,6 +3,7 @@ obj-$(CONFIG_HAS_NS16550) += ns16550.o
>  obj-$(CONFIG_HAS_CADENCE_UART) += cadence-uart.o
>  obj-$(CONFIG_HAS_PL011) += pl011.o
>  obj-$(CONFIG_HAS_EXYNOS4210) += exynos4210-uart.o
> +obj-$(CONFIG_HAS_MESON) += meson-uart.o
>  obj-$(CONFIG_HAS_MVEBU) += mvebu-uart.o
>  obj-$(CONFIG_HAS_OMAP) += omap-uart.o
>  obj-$(CONFIG_HAS_SCIF) += scif-uart.o
> diff --git a/xen/drivers/char/meson-uart.c
> b/xen/drivers/char/meson-uart.c new file mode 100644
> index 000..8fe7e62
> --- /dev/null
> +++ b/xen/drivers/char/meson-uart.c
> @@ -0,0 +1,290 @@
> +/*
> + * xen/drivers/char/meson-uart.c
> + *
> + * Driver for Amlogic MESON UART
> + *
> + * Copyright (c) 2018, Amit Singh Tomar .
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms and conditions of the GNU General Public
> + * License, version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public
> + * License along with this program; If not, see
> .
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* Register offsets */
> +#define UART_WFIFO  0x00
> +#define UART_RFIFO  0x04
> +#define UART_CONTROL0x08
> +#define UART_STATUS 0x0c
> +#define UART_MISC   0x10
> +#define UART_REG5   0x14
> +
> +/* UART_CONTROL bits */
> +#define UART_TX_EN  BIT(12)
> +#define UART_RX_EN  BIT(13)

You don't seem to use them in the code? This seems somewhat wrong, you
shouldn't rely on those bits being set by previous boot stages.

> +#define UART_TX_RST BIT(22)
> +#define UART_RX_RST BIT(23)
> +#define UART_CLEAR_ERR  BIT(24)
> +#define UART_RX_INT_EN  BIT(27)
> +#define UART_TX_INT_EN  BIT(28)
> +
> +/* UART_STATUS bits */
> +#define UART_PARITY_ERR BIT(16)
> +#define UART_FRAME_ERR  BIT(17)
> +#define UART_TX_FIFO_WERR   BIT(18)

You don't use those, so I don't see a need to define them.

> +#define UART_RX_EMPTY   BIT(20)
> +#define UART_TX_FULLBIT(21)
> +#define UART_TX_EMPTY   BIT(22)

Might be worth to add FIFO_ in those names.

> +#define UART_TX_CNT_MASKGENMASK(14, 8)
> +
> +
> +#define UART_XMIT_IRQ_CNT_MASK  GENMASK(15, 8)
> +#define UART_RECV_IRQ_CNT_MASK  GENMASK(7, 0)
> +
> +#define TX_FIFO_SIZE64
> +
> +static struct meson_s905_uart {
> +unsigned int irq;
> +void __iomem *regs;
> +struct irqaction irqaction;
> +struct vuart_info vuart;
> +} meson_s905_com = {0};
> +
> +#define meson_s905_read(uart, off)  readl((uart)->regs + off)
> +#define meson_s905_write(uart, off, val) writel(val, (uart->regs) + off)

I was wondering whether a clrsetbit helper would be more useful than
these very thin wrappers.

> +static void meson_s905_uart_interrupt(int irq, void *data,
> +struct cpu_user_regs *regs)
> +{
> +struct serial_port *port = data;
> +struct meson_s905_uart *uart = port->uart;
> +uint32_t st = meson_s905_read(uart, UART_STATUS);
> +
> +if ( !(st & UART_RX_EMPTY) )
> +{
> +

Re: [Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-10-09 Thread Julien Grall

Hi,

On 04/10/2018 08:11, Amit Tomer wrote:

+reg = meson_s905_read(uart, UART_CONTROL);
+reg &= ~(UART_RX_RST | UART_TX_RST | UART_CLEAR_ERR);



I am not sure why you are clearing those bits. AFAIU, init_preirq will reset
the serials, so you want to set thoses bits. This seems to be confirmed by
Linux in meson_uart_reset.


Idea here is to set these bits to their default values(which is 0 ) and if you
look at other drivers in XEN, it seems to be done same thing(clear
those bits) with them.


Are you sure about this? RX_RST and TX_RST are bit to reset the
transmission and receive path. Looking at a couple of different drivers
(cache-uart.c and mvebu-uart.c), those 2 bits are set and I suspect be
cleared by the hardware once reset.


It's bit confusing to me, eventually Linux driver seems to clear those bits


But it sets them right before hand. What does the spec says about those 
bits?


Overall, I feels to me it is better to mimic the Linux driver as I am 
quite confident that the driver is doing the right thing.


Cheers,

--
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Re: [Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-10-04 Thread Amit Tomer
Hello,

> >>> +reg = meson_s905_read(uart, UART_CONTROL);
> >>> +reg &= ~(UART_RX_RST | UART_TX_RST | UART_CLEAR_ERR);
> >>
> >>
> >> I am not sure why you are clearing those bits. AFAIU, init_preirq will 
> >> reset
> >> the serials, so you want to set thoses bits. This seems to be confirmed by
> >> Linux in meson_uart_reset.
> >
> > Idea here is to set these bits to their default values(which is 0 ) and if 
> > you
> > look at other drivers in XEN, it seems to be done same thing(clear
> > those bits) with them.
>
> Are you sure about this? RX_RST and TX_RST are bit to reset the
> transmission and receive path. Looking at a couple of different drivers
> (cache-uart.c and mvebu-uart.c), those 2 bits are set and I suspect be
> cleared by the hardware once reset.

It's bit confusing to me, eventually Linux driver seems to clear those bits

https://github.com/torvalds/linux/blob/master/drivers/tty/serial/meson_uart.c#L266

Thanks
-Amit

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Re: [Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-08-22 Thread Julien Grall



On 20/08/18 09:12, Amit Tomer wrote:

Hello,


Hi,


Thanks for having a look at it.


The spec does not seems to provide the offset register. Where did you find
them?


Actually, looked at couple of references from u-boot and Linux. These
headers are picked from there.


Please mention it in the commit message then.

[...]


+}
+
+static void __init meson_s905_uart_init_preirq(struct serial_port *port)
+{
+struct meson_s905_uart *uart = port->uart;
+uint32_t reg;
+
+reg = meson_s905_read(uart, UART_CONTROL);
+reg &= ~(UART_RX_RST | UART_TX_RST | UART_CLEAR_ERR);



I am not sure why you are clearing those bits. AFAIU, init_preirq will reset
the serials, so you want to set thoses bits. This seems to be confirmed by
Linux in meson_uart_reset.


Idea here is to set these bits to their default values(which is 0 ) and if you
look at other drivers in XEN, it seems to be done same thing(clear
those bits) with them.


Are you sure about this? RX_RST and TX_RST are bit to reset the 
transmission and receive path. Looking at a couple of different drivers 
(cache-uart.c and mvebu-uart.c), those 2 bits are set and I suspect be 
cleared by the hardware once reset.


Regarding UART_CLEAR_ERR, you indeed needs to clear the potential errors 
by zeroing it.







+reg = meson_s905_read(uart, UART_CONTROL);
+reg &= ~(UART_RX_INT_EN | UART_TX_INT_EN);
+meson_s905_write(uart, UART_CONTROL, reg);
+}
+
+static void __init meson_s905_uart_init_postirq(struct serial_port *port)
+{
+struct meson_s905_uart *uart = port->uart;
+uint32_t reg;
+
+uart->irqaction.handler = meson_s905_uart_interrupt;
+uart->irqaction.name= "meson_s905_uart";
+uart->irqaction.dev_id  = port;
+
+if ( setup_irq(uart->irq, 0, >irqaction) != 0 )
+{
+printk("Failed to allocated meson_s905_uart IRQ %d\n",
uart->irq);
+return;
+}
+
+/* Configure Rx/Tx interrupts based on bytes in FIFO */
+reg = meson_s905_read(uart, UART_MISC);



You read UART_MISC here but ...


+reg = (UART_RECV_IRQ_CNT_MASK & 1) |



... override the value here. You either want to drop reading UART_MISC or
add | here.


Sorry, missed "|" somehow.



+   (UART_XMIT_IRQ_CNT_MASK & ((TX_FIFO_SIZE / 2) << 8));



This is a bit difficult to read. It feels like you want to use a macro with
a parameter that will do the correct masking.


Ok, shall I take it from Linux ?


Yes please.




+
+static const struct dt_device_match meson_dt_match[] __initconst =
+{
+DT_MATCH_COMPATIBLE("amlogic,meson-uart"),



Looking at Linux, this is considered as a legacy bindings. Would not it be
better to use stable bindings in Xen?



Yeah, I took it from u-boot source and didn't realize that there are
stable binding exists.


Cheers,

--
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Re: [Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-08-20 Thread Amit Tomer
Hello,

Thanks for having a look at it.

> The spec does not seems to provide the offset register. Where did you find
> them?

Actually, looked at couple of references from u-boot and Linux. These
headers are picked from there.

> AFAIK, {0} is not necessary.

Ok.

>> +
>> +#define meson_s905_read(uart, off)   readl((uart)->regs + off)
>> +#define meson_s905_write(uart, off, val) writel(val, (uart->regs) +
>> off)
>
>
> s/(uart->regs)/(uart)->regs/
>
>> +
>> +static void meson_s905_uart_interrupt(int irq, void *data,
>> +struct cpu_user_regs *regs)
>
>
> The indentation looks wrong here.
>
>> +{
>> +struct serial_port *port = data;
>> +struct meson_s905_uart *uart = port->uart;
>> +uint32_t st = meson_s905_read(uart, UART_STATUS);
>> +
>> +if ( !(st & UART_RX_EMPTY) )
>> +{
>> +serial_rx_interrupt(port, regs);
>> +}
>> +
>> +if ( !(st & UART_TX_FULL) )
>> +{
>> +if ( st & UART_TX_INT_EN )
>> +serial_tx_interrupt(port, regs);
>> +}
>> +
>
>
> NIT: No need for this newline.
>
>> +}
>> +
>> +static void __init meson_s905_uart_init_preirq(struct serial_port *port)
>> +{
>> +struct meson_s905_uart *uart = port->uart;
>> +uint32_t reg;
>> +
>> +reg = meson_s905_read(uart, UART_CONTROL);
>> +reg &= ~(UART_RX_RST | UART_TX_RST | UART_CLEAR_ERR);
>
>
> I am not sure why you are clearing those bits. AFAIU, init_preirq will reset
> the serials, so you want to set thoses bits. This seems to be confirmed by
> Linux in meson_uart_reset.

Idea here is to set these bits to their default values(which is 0 ) and if you
look at other drivers in XEN, it seems to be done same thing(clear
those bits) with them.

>
>> +reg = meson_s905_read(uart, UART_CONTROL);
>> +reg &= ~(UART_RX_INT_EN | UART_TX_INT_EN);
>> +meson_s905_write(uart, UART_CONTROL, reg);
>> +}
>> +
>> +static void __init meson_s905_uart_init_postirq(struct serial_port *port)
>> +{
>> +struct meson_s905_uart *uart = port->uart;
>> +uint32_t reg;
>> +
>> +uart->irqaction.handler = meson_s905_uart_interrupt;
>> +uart->irqaction.name= "meson_s905_uart";
>> +uart->irqaction.dev_id  = port;
>> +
>> +if ( setup_irq(uart->irq, 0, >irqaction) != 0 )
>> +{
>> +printk("Failed to allocated meson_s905_uart IRQ %d\n",
>> uart->irq);
>> +return;
>> +}
>> +
>> +/* Configure Rx/Tx interrupts based on bytes in FIFO */
>> +reg = meson_s905_read(uart, UART_MISC);
>
>
> You read UART_MISC here but ...
>
>> +reg = (UART_RECV_IRQ_CNT_MASK & 1) |
>
>
> ... override the value here. You either want to drop reading UART_MISC or
> add | here.

Sorry, missed "|" somehow.
>
>> +   (UART_XMIT_IRQ_CNT_MASK & ((TX_FIFO_SIZE / 2) << 8));
>
>
> This is a bit difficult to read. It feels like you want to use a macro with
> a parameter that will do the correct masking.

Ok, shall I take it from Linux ?

>> +
>> +static const struct dt_device_match meson_dt_match[] __initconst =
>> +{
>> +DT_MATCH_COMPATIBLE("amlogic,meson-uart"),
>
>
> Looking at Linux, this is considered as a legacy bindings. Would not it be
> better to use stable bindings in Xen?
>

Yeah, I took it from u-boot source and didn't realize that there are
stable binding exists.

Thanks
-Amit

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Re: [Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-08-14 Thread Julien Grall

Hi Amit,

On 07/08/18 18:07, Amit Singh Tomar wrote:

This patch adds driver for UART controller present on Amlogic S905 SoC.
https://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf


The spec does not seems to provide the offset register. Where did you 
find them?




Signed-off-by: Amit Singh Tomar 
---
  xen/drivers/char/Kconfig  |   8 ++
  xen/drivers/char/Makefile |   1 +
  xen/drivers/char/meson-uart.c | 290 ++
  3 files changed, 299 insertions(+)
  create mode 100644 xen/drivers/char/meson-uart.c

diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig
index cc78ec3..b9fee4e 100644
--- a/xen/drivers/char/Kconfig
+++ b/xen/drivers/char/Kconfig
@@ -20,6 +20,14 @@ config HAS_MVEBU
  This selects the Marvell MVEBU UART. If you have a ARMADA 3700
  based board, say Y.
  
+config HAS_MESON

+bool
+default y
+depends on ARM_64
+help
+  This selects the Marvell MESON UART. If you have a Amlogic S905
+  based board, say Y.
+
  config HAS_PL011
bool
default y
diff --git a/xen/drivers/char/Makefile b/xen/drivers/char/Makefile
index b68c330..7c646d7 100644
--- a/xen/drivers/char/Makefile
+++ b/xen/drivers/char/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_HAS_NS16550) += ns16550.o
  obj-$(CONFIG_HAS_CADENCE_UART) += cadence-uart.o
  obj-$(CONFIG_HAS_PL011) += pl011.o
  obj-$(CONFIG_HAS_EXYNOS4210) += exynos4210-uart.o
+obj-$(CONFIG_HAS_MESON) += meson-uart.o
  obj-$(CONFIG_HAS_MVEBU) += mvebu-uart.o
  obj-$(CONFIG_HAS_OMAP) += omap-uart.o
  obj-$(CONFIG_HAS_SCIF) += scif-uart.o
diff --git a/xen/drivers/char/meson-uart.c b/xen/drivers/char/meson-uart.c
new file mode 100644
index 000..8fe7e62
--- /dev/null
+++ b/xen/drivers/char/meson-uart.c
@@ -0,0 +1,290 @@
+/*
+ * xen/drivers/char/meson-uart.c
+ *
+ * Driver for Amlogic MESON UART
+ *
+ * Copyright (c) 2018, Amit Singh Tomar .
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms and conditions of the GNU General Public
+ * License, version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program; If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/* Register offsets */
+#define UART_WFIFO  0x00
+#define UART_RFIFO  0x04
+#define UART_CONTROL0x08
+#define UART_STATUS 0x0c
+#define UART_MISC   0x10
+#define UART_REG5   0x14
+
+/* UART_CONTROL bits */
+#define UART_TX_EN  BIT(12)
+#define UART_RX_EN  BIT(13)
+#define UART_TX_RST BIT(22)
+#define UART_RX_RST BIT(23)
+#define UART_CLEAR_ERR  BIT(24)
+#define UART_RX_INT_EN  BIT(27)
+#define UART_TX_INT_EN  BIT(28)
+
+/* UART_STATUS bits */
+#define UART_PARITY_ERR BIT(16)
+#define UART_FRAME_ERR  BIT(17)
+#define UART_TX_FIFO_WERR   BIT(18)
+#define UART_RX_EMPTY   BIT(20)
+#define UART_TX_FULLBIT(21)
+#define UART_TX_EMPTY   BIT(22)
+#define UART_TX_CNT_MASKGENMASK(14, 8)
+
+
+#define UART_XMIT_IRQ_CNT_MASK  GENMASK(15, 8)
+#define UART_RECV_IRQ_CNT_MASK  GENMASK(7, 0)
+
+#define TX_FIFO_SIZE64
+
+static struct meson_s905_uart {
+unsigned int irq;
+void __iomem *regs;
+struct irqaction irqaction;
+struct vuart_info vuart;
+} meson_s905_com = {0};


AFAIK, {0} is not necessary.


+
+#define meson_s905_read(uart, off)   readl((uart)->regs + off)
+#define meson_s905_write(uart, off, val) writel(val, (uart->regs) + off)


s/(uart->regs)/(uart)->regs/


+
+static void meson_s905_uart_interrupt(int irq, void *data,
+struct cpu_user_regs *regs)


The indentation looks wrong here.


+{
+struct serial_port *port = data;
+struct meson_s905_uart *uart = port->uart;
+uint32_t st = meson_s905_read(uart, UART_STATUS);
+
+if ( !(st & UART_RX_EMPTY) )
+{
+serial_rx_interrupt(port, regs);
+}
+
+if ( !(st & UART_TX_FULL) )
+{
+if ( st & UART_TX_INT_EN )
+serial_tx_interrupt(port, regs);
+}
+


NIT: No need for this newline.


+}
+
+static void __init meson_s905_uart_init_preirq(struct serial_port *port)
+{
+struct meson_s905_uart *uart = port->uart;
+uint32_t reg;
+
+reg = meson_s905_read(uart, UART_CONTROL);
+reg &= ~(UART_RX_RST | UART_TX_RST | UART_CLEAR_ERR);


I am not sure why you are clearing those bits. AFAIU, init_preirq will 
reset the serials, so you 

Re: [Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-08-08 Thread Jan Beulich
>>> On 07.08.18 at 19:07,  wrote:
> This patch adds driver for UART controller present on Amlogic S905 SoC.
> https://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf 
> 
> Signed-off-by: Amit Singh Tomar 
> ---
>  xen/drivers/char/Kconfig  |   8 ++
>  xen/drivers/char/Makefile |   1 +
>  xen/drivers/char/meson-uart.c | 290 
> ++
>  3 files changed, 299 insertions(+)
>  create mode 100644 xen/drivers/char/meson-uart.c

The driver being ARM-specific, you will want to update
./MAINTAINERS to also list this new file as ARM-specific.

> --- a/xen/drivers/char/Kconfig
> +++ b/xen/drivers/char/Kconfig
> @@ -20,6 +20,14 @@ config HAS_MVEBU
> This selects the Marvell MVEBU UART. If you have a ARMADA 3700
> based board, say Y.
>  
> +config HAS_MESON
> +bool
> +default y
> +depends on ARM_64
> +help
> +  This selects the Marvell MESON UART. If you have a Amlogic S905
> +  based board, say Y.
> +
>  config HAS_PL011
>   bool
>   default y

Please fix indentation to match that of surrounding code. Also
please use "def_bool y" rather than its longer two line equivalent.

Jan



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[Xen-devel] [RFC PATCH 2/2] xen/arm: Add MESON UART driver for Amlogic S905 SoC

2018-08-07 Thread Amit Singh Tomar
This patch adds driver for UART controller present on Amlogic S905 SoC.
https://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf

Signed-off-by: Amit Singh Tomar 
---
 xen/drivers/char/Kconfig  |   8 ++
 xen/drivers/char/Makefile |   1 +
 xen/drivers/char/meson-uart.c | 290 ++
 3 files changed, 299 insertions(+)
 create mode 100644 xen/drivers/char/meson-uart.c

diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig
index cc78ec3..b9fee4e 100644
--- a/xen/drivers/char/Kconfig
+++ b/xen/drivers/char/Kconfig
@@ -20,6 +20,14 @@ config HAS_MVEBU
  This selects the Marvell MVEBU UART. If you have a ARMADA 3700
  based board, say Y.
 
+config HAS_MESON
+bool
+default y
+depends on ARM_64
+help
+  This selects the Marvell MESON UART. If you have a Amlogic S905
+  based board, say Y.
+
 config HAS_PL011
bool
default y
diff --git a/xen/drivers/char/Makefile b/xen/drivers/char/Makefile
index b68c330..7c646d7 100644
--- a/xen/drivers/char/Makefile
+++ b/xen/drivers/char/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_HAS_NS16550) += ns16550.o
 obj-$(CONFIG_HAS_CADENCE_UART) += cadence-uart.o
 obj-$(CONFIG_HAS_PL011) += pl011.o
 obj-$(CONFIG_HAS_EXYNOS4210) += exynos4210-uart.o
+obj-$(CONFIG_HAS_MESON) += meson-uart.o
 obj-$(CONFIG_HAS_MVEBU) += mvebu-uart.o
 obj-$(CONFIG_HAS_OMAP) += omap-uart.o
 obj-$(CONFIG_HAS_SCIF) += scif-uart.o
diff --git a/xen/drivers/char/meson-uart.c b/xen/drivers/char/meson-uart.c
new file mode 100644
index 000..8fe7e62
--- /dev/null
+++ b/xen/drivers/char/meson-uart.c
@@ -0,0 +1,290 @@
+/*
+ * xen/drivers/char/meson-uart.c
+ *
+ * Driver for Amlogic MESON UART
+ *
+ * Copyright (c) 2018, Amit Singh Tomar .
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms and conditions of the GNU General Public
+ * License, version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program; If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/* Register offsets */
+#define UART_WFIFO  0x00
+#define UART_RFIFO  0x04
+#define UART_CONTROL0x08
+#define UART_STATUS 0x0c
+#define UART_MISC   0x10
+#define UART_REG5   0x14
+
+/* UART_CONTROL bits */
+#define UART_TX_EN  BIT(12)
+#define UART_RX_EN  BIT(13)
+#define UART_TX_RST BIT(22)
+#define UART_RX_RST BIT(23)
+#define UART_CLEAR_ERR  BIT(24)
+#define UART_RX_INT_EN  BIT(27)
+#define UART_TX_INT_EN  BIT(28)
+
+/* UART_STATUS bits */
+#define UART_PARITY_ERR BIT(16)
+#define UART_FRAME_ERR  BIT(17)
+#define UART_TX_FIFO_WERR   BIT(18)
+#define UART_RX_EMPTY   BIT(20)
+#define UART_TX_FULLBIT(21)
+#define UART_TX_EMPTY   BIT(22)
+#define UART_TX_CNT_MASKGENMASK(14, 8)
+
+
+#define UART_XMIT_IRQ_CNT_MASK  GENMASK(15, 8)
+#define UART_RECV_IRQ_CNT_MASK  GENMASK(7, 0)
+
+#define TX_FIFO_SIZE64
+
+static struct meson_s905_uart {
+unsigned int irq;
+void __iomem *regs;
+struct irqaction irqaction;
+struct vuart_info vuart;
+} meson_s905_com = {0};
+
+#define meson_s905_read(uart, off)   readl((uart)->regs + off)
+#define meson_s905_write(uart, off, val) writel(val, (uart->regs) + off)
+
+static void meson_s905_uart_interrupt(int irq, void *data,
+struct cpu_user_regs *regs)
+{
+struct serial_port *port = data;
+struct meson_s905_uart *uart = port->uart;
+uint32_t st = meson_s905_read(uart, UART_STATUS);
+
+if ( !(st & UART_RX_EMPTY) )
+{
+serial_rx_interrupt(port, regs);
+}
+
+if ( !(st & UART_TX_FULL) )
+{
+if ( st & UART_TX_INT_EN )
+serial_tx_interrupt(port, regs);
+}
+
+}
+
+static void __init meson_s905_uart_init_preirq(struct serial_port *port)
+{
+struct meson_s905_uart *uart = port->uart;
+uint32_t reg;
+
+reg = meson_s905_read(uart, UART_CONTROL);
+reg &= ~(UART_RX_RST | UART_TX_RST | UART_CLEAR_ERR);
+meson_s905_write(uart, UART_CONTROL, reg);
+
+/* Disbale Rx/Tx interrupts */
+reg = meson_s905_read(uart, UART_CONTROL);
+reg &= ~(UART_RX_INT_EN | UART_TX_INT_EN);
+meson_s905_write(uart, UART_CONTROL, reg);
+}
+
+static void __init meson_s905_uart_init_postirq(struct serial_port *port)
+{
+struct meson_s905_uart *uart = port->uart;
+uint32_t reg;
+
+