[ubuntu/xenial-updates] keepalived 1:1.2.24-1ubuntu0.16.04.1 (Accepted)
keepalived (1:1.2.24-1ubuntu0.16.04.1) xenial; urgency=medium * New upstream version for Ubuntu 16.04 (LP: #1783583). * d/p/fix_message_truncation_with_large_pagesizes.patch: Rebased. * d/p/fix-removing-left-over-addresses-if-keepalived-abort.patch: Cherry-picked from upstream to ensure left-over VIPs and eVIPs are properly removed on restart if keepalived terminates abonormally. This fix is from the upstream 1.4.0 release (LP: #1744062). keepalived (1:1.2.24-1) unstable; urgency=medium * [d378a6f] New upstream version 1.2.24 keepalived (1:1.2.23-1) unstable; urgency=medium * [94beb84] Imported Upstream version 1.2.23 (Closes: #821941) - fix some segfaults (Closes: #830955) keepalived (1:1.2.20-1) unstable; urgency=medium * [2a22d69] Imported Upstream version 1.2.20 enable support for: - nfnetlink - ipset - iptc - snmp rfcv2 and rfcv3 Date: 2018-07-25 17:12:09.445471+00:00 Changed-By: Corey Bryant Signed-By: Chris Halse Rogers https://launchpad.net/ubuntu/+source/keepalived/1:1.2.24-1ubuntu0.16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux_4.4.0-133.159_amd64.tar.gz - (Accepted)
linux (4.4.0-133.159) xenial; urgency=medium
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM: VMX: Tell the nested hypervisor
[ubuntu/xenial-updates] linux-azure_4.15.0-1021.21~16.04.1_amd64.tar.gz - (Accepted)
linux-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf:
[ubuntu/xenial-updates] linux-hwe_4.15.0-32.35~16.04.1_ppc64el.tar.gz - (Accepted)
linux-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium [ Stefan Bader ] * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix typos - cpu/hotplug: detect SMT disabled by BIOS - x86/KVM/VMX: Don't set
[ubuntu/xenial-updates] linux-hwe_4.15.0-32.35~16.04.1_amd64.tar.gz - (Accepted)
linux-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium [ Stefan Bader ] * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix typos - cpu/hotplug: detect SMT disabled by BIOS - x86/KVM/VMX: Don't set
[ubuntu/xenial-updates] linux-raspi2 4.4.0-1094.102 (Accepted)
linux-raspi2 (4.4.0-1094.102) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
-
[ubuntu/xenial-updates] linux-meta-aws 4.4.0.1065.67 (Accepted)
linux-meta-aws (4.4.0.1065.67) xenial; urgency=medium * Bump ABI 4.4.0-1065 linux-meta-aws (4.4.0.1064.66) xenial; urgency=medium * Bump ABI 4.4.0-1064 Date: 2018-08-13 10:30:13.162269+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-aws/4.4.0.1065.67 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-meta 4.4.0.133.139 (Accepted)
linux-meta (4.4.0.133.139) xenial; urgency=medium * Bump ABI 4.4.0-133 linux-meta (4.4.0.132.138) xenial; urgency=medium * Bump ABI 4.4.0-132 Date: 2018-08-13 07:33:13.371402+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta/4.4.0.133.139 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-meta-snapdragon 4.4.0.1098.90 (Accepted)
linux-meta-snapdragon (4.4.0.1098.90) xenial; urgency=medium * Bump ABI 4.4.0-1098 linux-meta-snapdragon (4.4.0.1097.89) xenial; urgency=medium * Bump ABI 4.4.0-1097 Date: 2018-08-13 10:26:14.576258+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-snapdragon/4.4.0.1098.90 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-snapdragon 4.4.0-1098.103 (Accepted)
linux-snapdragon (4.4.0-1098.103) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
-
[ubuntu/xenial-security] linux-snapdragon 4.4.0-1098.103 (Accepted)
linux-snapdragon (4.4.0-1098.103) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
-
[ubuntu/xenial-security] linux-meta-snapdragon 4.4.0.1098.90 (Accepted)
linux-meta-snapdragon (4.4.0.1098.90) xenial; urgency=medium * Bump ABI 4.4.0-1098 linux-meta-snapdragon (4.4.0.1097.89) xenial; urgency=medium * Bump ABI 4.4.0-1097 linux-meta-snapdragon (4.4.0.1096.88) xenial; urgency=medium * Bump ABI 4.4.0-1096 Date: 2018-08-13 10:26:14.576258+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-snapdragon/4.4.0.1098.90 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-meta-raspi2 4.4.0.1094.94 (Accepted)
linux-meta-raspi2 (4.4.0.1094.94) xenial; urgency=medium * Bump ABI 4.4.0-1094 linux-meta-raspi2 (4.4.0.1093.93) xenial; urgency=medium * Bump ABI 4.4.0-1093 Date: 2018-08-13 10:22:12.802788+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-raspi2/4.4.0.1094.94 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-raspi2 4.4.0-1094.102 (Accepted)
linux-raspi2 (4.4.0-1094.102) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
-
[ubuntu/xenial-updates] linux-meta-raspi2 4.4.0.1094.94 (Accepted)
linux-meta-raspi2 (4.4.0.1094.94) xenial; urgency=medium * Bump ABI 4.4.0-1094 linux-meta-raspi2 (4.4.0.1093.93) xenial; urgency=medium * Bump ABI 4.4.0-1093 Date: 2018-08-13 10:22:12.802788+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-raspi2/4.4.0.1094.94 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-meta-kvm 4.4.0.1031.30 (Accepted)
linux-meta-kvm (4.4.0.1031.30) xenial; urgency=medium * Bump ABI 4.4.0-1031 linux-meta-kvm (4.4.0.1030.29) xenial; urgency=medium * Bump ABI 4.4.0-1030 Date: 2018-08-13 10:40:14.071677+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-kvm/4.4.0.1031.30 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-kvm 4.4.0-1031.37 (Accepted)
linux-kvm (4.4.0-1031.37) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM:
[ubuntu/xenial-security] linux-meta-hwe 4.15.0.32.54 (Accepted)
linux-meta-hwe (4.15.0.32.54) xenial; urgency=medium * Bump ABI 4.15.0-32 linux-meta-hwe (4.15.0.31.53) xenial; urgency=medium * Bump ABI 4.15.0-31 Date: 2018-08-10 21:48:12.349454+00:00 Changed-By: Thadeu Lima de Souza Cascardo Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-hwe/4.15.0.32.54 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-meta-hwe 4.15.0.32.54 (Accepted)
linux-meta-hwe (4.15.0.32.54) xenial; urgency=medium * Bump ABI 4.15.0-32 linux-meta-hwe (4.15.0.31.53) xenial; urgency=medium * Bump ABI 4.15.0-31 Date: 2018-08-10 21:48:12.349454+00:00 Changed-By: Thadeu Lima de Souza Cascardo Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-hwe/4.15.0.32.54 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-signed-hwe 4.15.0-32.35~16.04.1 (Accepted)
linux-signed-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium * Master version: 4.15.0-32.35~16.04.1 linux-signed-hwe (4.15.0-31.33~16.04.1) xenial; urgency=medium * Master version: 4.15.0-31.33~16.04.1 Date: 2018-08-10 21:49:12.504329+00:00 Changed-By: Thadeu Lima de Souza Cascardo Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed-hwe/4.15.0-32.35~16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-kvm 4.4.0-1031.37 (Accepted)
linux-kvm (4.4.0-1031.37) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM:
[ubuntu/xenial-updates] linux-meta-kvm 4.4.0.1031.30 (Accepted)
linux-meta-kvm (4.4.0.1031.30) xenial; urgency=medium * Bump ABI 4.4.0-1031 linux-meta-kvm (4.4.0.1030.29) xenial; urgency=medium * Bump ABI 4.4.0-1030 Date: 2018-08-13 10:40:14.071677+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-kvm/4.4.0.1031.30 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-signed-hwe 4.15.0-32.35~16.04.1 (Accepted)
linux-signed-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium * Master version: 4.15.0-32.35~16.04.1 linux-signed-hwe (4.15.0-31.33~16.04.1) xenial; urgency=medium * Master version: 4.15.0-31.33~16.04.1 Date: 2018-08-10 21:49:12.504329+00:00 Changed-By: Thadeu Lima de Souza Cascardo Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed-hwe/4.15.0-32.35~16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-hwe 4.15.0-32.35~16.04.1 (Accepted)
linux-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium [ Stefan Bader ] * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix typos - cpu/hotplug: detect SMT disabled by BIOS - x86/KVM/VMX: Don't set
[ubuntu/xenial-security] linux-meta-hwe-edge 4.15.0.32.53 (Accepted)
linux-meta-hwe-edge (4.15.0.32.53) xenial; urgency=medium * Bump ABI 4.15.0-32 linux-meta-hwe-edge (4.15.0.31.52) xenial; urgency=medium * Bump ABI 4.15.0-31 Date: 2018-08-13 11:05:17.191074+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-hwe-edge/4.15.0.32.53 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-meta-hwe-edge 4.15.0.32.53 (Accepted)
linux-meta-hwe-edge (4.15.0.32.53) xenial; urgency=medium * Bump ABI 4.15.0-32 linux-meta-hwe-edge (4.15.0.31.52) xenial; urgency=medium * Bump ABI 4.15.0-31 Date: 2018-08-13 11:05:17.191074+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-hwe-edge/4.15.0.32.53 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-meta-azure 4.15.0.1021.27 (Accepted)
linux-meta-azure (4.15.0.1021.27) xenial; urgency=medium * Bump ABI 4.15.0-1021 linux-meta-azure (4.15.0.1020.26) xenial; urgency=medium * Bump ABI 4.15.0-1020 Date: 2018-08-13 10:36:13.769990+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-azure/4.15.0.1021.27 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-meta-gcp 4.15.0.1017.29 (Accepted)
linux-meta-gcp (4.15.0.1017.29) xenial; urgency=medium * Bump ABI 4.15.0-1017 Date: 2018-08-13 10:57:19.133201+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-gcp/4.15.0.1017.29 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-meta-gcp 4.15.0.1017.29 (Accepted)
linux-meta-gcp (4.15.0.1017.29) xenial; urgency=medium * Bump ABI 4.15.0-1017 Date: 2018-08-13 10:57:19.133201+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-gcp/4.15.0.1017.29 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-gcp 4.15.0-1017.18~16.04.1 (Accepted)
linux-gcp (4.15.0-1017.18~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix
[ubuntu/xenial-security] linux-meta-azure 4.15.0.1021.27 (Accepted)
linux-meta-azure (4.15.0.1021.27) xenial; urgency=medium * Bump ABI 4.15.0-1021 linux-meta-azure (4.15.0.1020.26) xenial; urgency=medium * Bump ABI 4.15.0-1020 Date: 2018-08-13 10:36:13.769990+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-azure/4.15.0.1021.27 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-gcp 4.15.0-1017.18~16.04.1 (Accepted)
linux-gcp (4.15.0-1017.18~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix
[ubuntu/xenial-security] linux-signed-azure 4.15.0-1021.21~16.04.1 (Accepted)
linux-signed-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium * Master version: 4.15.0-1021.21~16.04.1 linux-signed-azure (4.15.0-1020.20~16.04.1) xenial; urgency=medium * Master version: 4.15.0-1020.20~16.04.1 Date: 2018-08-13 10:36:16.160043+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed-azure/4.15.0-1021.21~16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-signed-azure 4.15.0-1021.21~16.04.1 (Accepted)
linux-signed-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium * Master version: 4.15.0-1021.21~16.04.1 linux-signed-azure (4.15.0-1020.20~16.04.1) xenial; urgency=medium * Master version: 4.15.0-1020.20~16.04.1 Date: 2018-08-13 10:36:16.160043+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed-azure/4.15.0-1021.21~16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-azure 4.15.0-1021.21~16.04.1 (Accepted)
linux-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf:
[ubuntu/xenial-updates] linux-azure 4.15.0-1021.21~16.04.1 (Accepted)
linux-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf:
[ubuntu/xenial-updates] linux-meta-azure-edge 4.15.0.1021.18 (Accepted)
linux-meta-azure-edge (4.15.0.1021.18) xenial; urgency=medium * Bump ABI 4.15.0-1021 linux-meta-azure-edge (4.15.0.1020.17) xenial; urgency=medium * Bump ABI 4.15.0-1020 Date: 2018-08-13 11:01:22.773896+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-azure-edge/4.15.0.1021.18 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-aws 4.4.0-1065.75 (Accepted)
linux-aws (4.4.0-1065.75) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM:
[ubuntu/xenial-security] linux-meta-azure-edge 4.15.0.1021.18 (Accepted)
linux-meta-azure-edge (4.15.0.1021.18) xenial; urgency=medium * Bump ABI 4.15.0-1021 linux-meta-azure-edge (4.15.0.1020.17) xenial; urgency=medium * Bump ABI 4.15.0-1020 Date: 2018-08-13 11:01:22.773896+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-azure-edge/4.15.0.1021.18 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux-signed 4.4.0-133.159 (Accepted)
linux-signed (4.4.0-133.159) xenial; urgency=medium * Version 4.4.0-133.159 linux-signed (4.4.0-132.158) xenial; urgency=medium * Version 4.4.0-132.158 linux-signed (4.4.0-131.157) xenial; urgency=medium * Version 4.4.0-131.157 Date: 2018-08-13 07:33:20.621054+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed/4.4.0-133.159 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-signed 4.4.0-133.159 (Accepted)
linux-signed (4.4.0-133.159) xenial; urgency=medium * Version 4.4.0-133.159 linux-signed (4.4.0-132.158) xenial; urgency=medium * Version 4.4.0-132.158 Date: 2018-08-13 07:33:20.621054+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed/4.4.0-133.159 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] linux-aws 4.4.0-1065.75 (Accepted)
linux-aws (4.4.0-1065.75) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM:
[ubuntu/xenial-security] linux-meta 4.4.0.133.139 (Accepted)
linux-meta (4.4.0.133.139) xenial; urgency=medium * Bump ABI 4.4.0-133 linux-meta (4.4.0.132.138) xenial; urgency=medium * Bump ABI 4.4.0-132 linux-meta (4.4.0.131.137) xenial; urgency=medium * Bump ABI 4.4.0-131 Date: 2018-08-13 07:33:13.371402+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta/4.4.0.133.139 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] linux 4.4.0-133.159 (Accepted)
linux (4.4.0-133.159) xenial; urgency=medium
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM: VMX: Tell the nested hypervisor
[ubuntu/xenial-updates] linux 4.4.0-133.159 (Accepted)
linux (4.4.0-133.159) xenial; urgency=medium
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM: VMX: Tell the nested hypervisor
[ubuntu/xenial-updates] libxml2 2.9.3+dfsg1-1ubuntu0.6 (Accepted)
libxml2 (2.9.3+dfsg1-1ubuntu0.6) xenial-security; urgency=medium * SECURITY UPDATE: XXE attacks - debian/patches/CVE-2016-9318.patch: fix in parser.c. - CVE-2016-9318 * SECURITY UPDATE: Denial of service - debian/patches/CVE-2017-18258.patch: fix in xzlib.c. - CVE-2017-18258 * SECURITY UPDATE: Denial of service - debian/patches/CVE-2018-14404.patch: fix in xpath.c. - CVE-2018-14404 * SECURITY UPDATE: Infinite loop in LZMA decompression - debian/patches/CVE-2018-14567.patch: fix in xzlib.c. - CVE-2018-14567 Date: 2018-08-13 20:21:12.840017+00:00 Changed-By: leo.barb...@canonical.com (Leonidas S. Barbosa) Signed-By: Ubuntu Archive Robot https://launchpad.net/ubuntu/+source/libxml2/2.9.3+dfsg1-1ubuntu0.6 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-security] libxml2 2.9.3+dfsg1-1ubuntu0.6 (Accepted)
libxml2 (2.9.3+dfsg1-1ubuntu0.6) xenial-security; urgency=medium * SECURITY UPDATE: XXE attacks - debian/patches/CVE-2016-9318.patch: fix in parser.c. - CVE-2016-9318 * SECURITY UPDATE: Denial of service - debian/patches/CVE-2017-18258.patch: fix in xzlib.c. - CVE-2017-18258 * SECURITY UPDATE: Denial of service - debian/patches/CVE-2018-14404.patch: fix in xpath.c. - CVE-2018-14404 * SECURITY UPDATE: Infinite loop in LZMA decompression - debian/patches/CVE-2018-14567.patch: fix in xzlib.c. - CVE-2018-14567 Date: 2018-08-13 20:21:12.840017+00:00 Changed-By: leo.barb...@canonical.com (Leonidas S. Barbosa) https://launchpad.net/ubuntu/+source/libxml2/2.9.3+dfsg1-1ubuntu0.6 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-updates] samba 2:4.3.11+dfsg-0ubuntu0.16.04.15 (Accepted)
samba (2:4.3.11+dfsg-0ubuntu0.16.04.15) xenial-security; urgency=medium * SECURITY UPDATE: Insufficient input validation on client directory listing in libsmbclient - debian/patches/CVE-2018-10858-*.patch: don't overwrite passed in buffer in source3/libsmb/libsmb_path.c, add checks to source3/libsmb/libsmb_dir.c, source3/libsmb/libsmb_path.c. - CVE-2018-10858 * SECURITY UPDATE: Confidential attribute disclosure AD LDAP server - debian/patches/CVE-2018-10919-*.patch: fix access checks. - CVE-2018-10919 Date: 2018-08-06 12:59:43.234067+00:00 Changed-By: Marc Deslauriers Signed-By: Ubuntu Archive Robot https://launchpad.net/ubuntu/+source/samba/2:4.3.11+dfsg-0ubuntu0.16.04.15 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-hwe_4.15.0-32.35~16.04.1_ppc64el.tar.gz - (Accepted)
linux-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium [ Stefan Bader ] * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix typos - cpu/hotplug: detect SMT disabled by BIOS - x86/KVM/VMX: Don't set
[ubuntu/xenial-proposed] linux-hwe_4.15.0-32.35~16.04.1_amd64.tar.gz - (Accepted)
linux-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium [ Stefan Bader ] * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix typos - cpu/hotplug: detect SMT disabled by BIOS - x86/KVM/VMX: Don't set
[ubuntu/xenial-proposed] linux-meta-snapdragon 4.4.0.1098.90 (Accepted)
linux-meta-snapdragon (4.4.0.1098.90) xenial; urgency=medium * Bump ABI 4.4.0-1098 Date: 2018-08-13 10:26:14.576258+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-snapdragon/4.4.0.1098.90 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-snapdragon 4.4.0-1098.103 (Accepted)
linux-snapdragon (4.4.0-1098.103) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
-
[ubuntu/xenial-proposed] linux-meta-hwe 4.15.0.32.54 (Accepted)
linux-meta-hwe (4.15.0.32.54) xenial; urgency=medium * Bump ABI 4.15.0-32 Date: 2018-08-10 21:48:12.349454+00:00 Changed-By: Thadeu Lima de Souza Cascardo Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-hwe/4.15.0.32.54 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-signed-hwe 4.15.0-32.35~16.04.1 (Accepted)
linux-signed-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium * Master version: 4.15.0-32.35~16.04.1 Date: 2018-08-10 21:49:12.504329+00:00 Changed-By: Thadeu Lima de Souza Cascardo Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed-hwe/4.15.0-32.35~16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-meta-kvm 4.4.0.1031.30 (Accepted)
linux-meta-kvm (4.4.0.1031.30) xenial; urgency=medium * Bump ABI 4.4.0-1031 Date: 2018-08-13 10:40:14.071677+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-kvm/4.4.0.1031.30 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-meta-raspi2 4.4.0.1094.94 (Accepted)
linux-meta-raspi2 (4.4.0.1094.94) xenial; urgency=medium * Bump ABI 4.4.0-1094 Date: 2018-08-13 10:22:12.802788+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-raspi2/4.4.0.1094.94 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-kvm 4.4.0-1031.37 (Accepted)
linux-kvm (4.4.0-1031.37) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM:
[ubuntu/xenial-proposed] linux-hwe 4.15.0-32.35~16.04.1 (Accepted)
linux-hwe (4.15.0-32.35~16.04.1) xenial; urgency=medium [ Stefan Bader ] * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix typos - cpu/hotplug: detect SMT disabled by BIOS - x86/KVM/VMX: Don't set
[ubuntu/xenial-proposed] linux_4.4.0-133.159_amd64.tar.gz - (Accepted)
linux (4.4.0-133.159) xenial; urgency=medium
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM: VMX: Tell the nested hypervisor
[ubuntu/xenial-proposed] linux-azure_4.15.0-1021.21~16.04.1_amd64.tar.gz - (Accepted)
linux-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf:
[ubuntu/xenial-proposed] linux-gcp 4.15.0-1017.18~16.04.1 (Accepted)
linux-gcp (4.15.0-1017.18~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf: Fix
[ubuntu/xenial-proposed] linux-meta-gcp 4.15.0.1017.29 (Accepted)
linux-meta-gcp (4.15.0.1017.29) xenial; urgency=medium * Bump ABI 4.15.0-1017 Date: 2018-08-13 10:57:19.133201+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-gcp/4.15.0.1017.29 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-signed-azure 4.15.0-1021.21~16.04.1 (Accepted)
linux-signed-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium * Master version: 4.15.0-1021.21~16.04.1 Date: 2018-08-13 10:36:16.160043+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed-azure/4.15.0-1021.21~16.04.1 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-azure 4.15.0-1021.21~16.04.1 (Accepted)
linux-azure (4.15.0-1021.21~16.04.1) xenial; urgency=medium [ Ubuntu: 4.15.0-32.34 ] * CVE-2018-5391 - Revert "net: increase fragment memory usage limits" * CVE-2018-3620 // CVE-2018-3646 - x86/Centaur: Initialize supported CPU features properly - x86/Centaur: Report correct CPU/cache topology - x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present - perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id - x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c - x86/CPU/AMD: Calculate last level cache ID from number of sharing threads - x86/CPU: Modify detect_extended_topology() to return result - x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available - x86/CPU: Move cpu local function declarations to local header - x86/CPU: Make intel_num_cpu_cores() generic - x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo() - x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores() - x86/CPU/AMD: Fix LLC ID bit-shift calculation - x86/mm: Factor out pageattr _PAGE_GLOBAL setting - x86/mm: Undo double _PAGE_PSE clearing - x86/mm: Introduce "default" kernel PTE mask - x86/espfix: Document use of _PAGE_GLOBAL - x86/mm: Do not auto-massage page protections - x86/mm: Remove extra filtering in pageattr code - x86/mm: Comment _PAGE_GLOBAL mystery - x86/mm: Do not forbid _PAGE_RW before init for __ro_after_init - x86/ldt: Fix support_pte_mask filtering in map_ldt_struct() - x86/power/64: Fix page-table setup for temporary text mapping - x86/pti: Filter at vma->vm_page_prot population - x86/boot/64/clang: Use fixup_pointer() to access '__supported_pte_mask' - x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT - x86/speculation/l1tf: Change order of offset/type in swap entry - x86/speculation/l1tf: Protect swap entries against L1TF - x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation - x86/speculation/l1tf: Make sure the first page is always reserved - x86/speculation/l1tf: Add sysfs reporting for l1tf - x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings - x86/speculation/l1tf: Limit swap file size to MAX_PA/2 - x86/bugs: Move the l1tf function and define pr_fmt properly - sched/smt: Update sched_smt_present at runtime - x86/smp: Provide topology_is_primary_thread() - x86/topology: Provide topology_smt_supported() - cpu/hotplug: Make bringup/teardown of smp threads symmetric - cpu/hotplug: Split do_cpu_down() - cpu/hotplug: Provide knobs to control SMT - x86/cpu: Remove the pointless CPU printout - x86/cpu/AMD: Remove the pointless detect_ht() call - x86/cpu/common: Provide detect_ht_early() - x86/cpu/topology: Provide detect_extended_topology_early() - x86/cpu/intel: Evaluate smp_num_siblings early - x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info - x86/cpu/AMD: Evaluate smp_num_siblings early - x86/apic: Ignore secondary threads if nosmt=force - x86/speculation/l1tf: Extend 64bit swap file size limit - x86/cpufeatures: Add detection of L1D cache flush support. - x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings - x86/speculation/l1tf: Protect PAE swap entries against L1TF - x86/speculation/l1tf: Fix up pte->pfn conversion for PAE - Revert "x86/apic: Ignore secondary threads if nosmt=force" - cpu/hotplug: Boot HT siblings at least once - x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present - x86/KVM/VMX: Add module argument for L1TF mitigation - x86/KVM/VMX: Add L1D flush algorithm - x86/KVM/VMX: Add L1D MSR based flush - x86/KVM/VMX: Add L1D flush logic - x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers - x86/KVM/VMX: Add find_msr() helper function - x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting - x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs - x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required - cpu/hotplug: Online siblings when SMT control is turned on - x86/litf: Introduce vmx status variable - x86/kvm: Drop L1TF MSR list approach - x86/l1tf: Handle EPT disabled state proper - x86/kvm: Move l1tf setup function - x86/kvm: Add static key for flush always - x86/kvm: Serialize L1D flush parameter setter - x86/kvm: Allow runtime control of L1D flush - cpu/hotplug: Expose SMT control init function - cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early - x86/bugs, kvm: Introduce boot-time control of L1TF mitigations - Documentation: Add section about CPU vulnerabilities - x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures - x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content - Documentation/l1tf:
[ubuntu/xenial-proposed] linux-meta-azure 4.15.0.1021.27 (Accepted)
linux-meta-azure (4.15.0.1021.27) xenial; urgency=medium * Bump ABI 4.15.0-1021 Date: 2018-08-13 10:36:13.769990+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-azure/4.15.0.1021.27 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-meta-azure-edge 4.15.0.1021.18 (Accepted)
linux-meta-azure-edge (4.15.0.1021.18) xenial; urgency=medium * Bump ABI 4.15.0-1021 Date: 2018-08-13 11:01:22.773896+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-azure-edge/4.15.0.1021.18 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-signed 4.4.0-133.159 (Accepted)
linux-signed (4.4.0-133.159) xenial; urgency=medium * Version 4.4.0-133.159 Date: 2018-08-13 07:33:20.621054+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-signed/4.4.0-133.159 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-aws 4.4.0-1065.75 (Accepted)
linux-aws (4.4.0-1065.75) xenial; urgency=medium
[ Ubuntu: 4.4.0-133.159 ]
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM:
[ubuntu/xenial-proposed] linux-meta 4.4.0.133.139 (Accepted)
linux-meta (4.4.0.133.139) xenial; urgency=medium * Bump ABI 4.4.0-133 Date: 2018-08-13 07:33:13.371402+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta/4.4.0.133.139 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux-meta-aws 4.4.0.1065.67 (Accepted)
linux-meta-aws (4.4.0.1065.67) xenial; urgency=medium * Bump ABI 4.4.0-1065 Date: 2018-08-13 10:30:13.162269+00:00 Changed-By: Stefan Bader Signed-By: Andy Whitcroft https://launchpad.net/ubuntu/+source/linux-meta-aws/4.4.0.1065.67 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
[ubuntu/xenial-proposed] linux 4.4.0-133.159 (Accepted)
linux (4.4.0-133.159) xenial; urgency=medium
* CVE-2018-5390
- tcp: avoid collapses in tcp_prune_queue() if possible
- tcp: detect malicious patterns in tcp_collapse_ofo_queue()
* CVE-2018-5391
- Revert "net: increase fragment memory usage limits"
* CVE-2018-3620 // CVE-2018-3646
- KVM: x86: introduce linear_{read,write}_system
- KVM: x86: pass kvm_vcpu to kvm_read_guest_virt and
kvm_write_guest_virt_system
- kvm: x86: use correct privilege level for sgdt/sidt/fxsave/fxrstor access
- x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT
- x86/speculation/l1tf: Change order of offset/type in swap entry
- x86/speculation/l1tf: Protect swap entries against L1TF
- x86/mm: Simplify p[g4um]d_page() macros
- x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation
- x86/speculation/l1tf: Make sure the first page is always reserved
- SAUCE: x86/cpu: Add Knights Mill/Gemini Lake
- x86/speculation/l1tf: Add sysfs reporting for l1tf
- x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings
- x86/speculation/l1tf: Limit swap file size to MAX_PA/2
- x86/smp: Provide topology_is_primary_thread()
- x86/topology: Provide topology_smt_supported()
- cpu/hotplug: Split do_cpu_down()
- x86/topology: Add topology_max_smt_threads()
- cpu/hotplug: Provide knobs to control SMT
- x86/CPU: Modify detect_extended_topology() to return result
- x86/cpu: Remove the pointless CPU printout
- x86/cpu/AMD: Remove the pointless detect_ht() call
- x86/cpu/common: Provide detect_ht_early()
- x86/cpu/topology: Provide detect_extended_topology_early()
- x86/cpu/intel: Evaluate smp_num_siblings early
- x86/cpu/AMD: Evaluate smp_num_siblings early
- x86/apic: Ignore secondary threads if nosmt=force
- x86/speculation/l1tf: Extend 64bit swap file size limit
- x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings
- x86/cpufeatures: Add detection of L1D cache flush support.
- x86/speculation/l1tf: Protect PAE swap entries against L1TF
- x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
- Revert "x86/apic: Ignore secondary threads if nosmt=force"
- SAUCE: x86/mce: register mce notifier earlier
- cpu/hotplug: Boot HT siblings at least once
- KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks
- x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present.
- x86/KVM/VMX: Add module argument for L1TF mitigation
- x86/KVM/VMX: Add L1D flush algorithm
- x86/KVM/VMX: Add L1D MSR based flush
- x86/KVM/VMX: Add L1D flush logic
- x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest
numbers
- x86/KVM/VMX: Add find_msr() helper function
- x86/KVM/VMX: Seperate the VMX AUTOLOAD guest/host number accounting.
- x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs
- x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required
- cpu/hotplug: Online siblings when SMT control is turned on
- x86/litf: Introduce vmx status variable
- x86/kvm: Drop L1TF MSR list approach
- x86/l1tf: Handle EPT disabled state proper
- x86/kvm: Move l1tf setup function
- x86/kvm: Add static key for flush always
- x86/kvm: Serialize L1D flush parameter setter
- x86/kvm: Allow runtime control of L1D flush
- cpu/hotplug: Expose SMT control init function
- cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early
- x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
- Documentation: Add section about CPU vulnerabilities
- x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED
architectures
- x86/KVM/VMX: Initialize the vmx_l1d_flush_pages' content
- Documentation/l1tf: Fix typos
- cpu/hotplug: detect SMT disabled by BIOS
- x86/KVM/VMX: Don't set l1tf_flush_l1d to true from vmx_l1d_flush()
- x86/KVM/VMX: Replace 'vmx_l1d_flush_always' with 'vmx_l1d_flush_cond'
- x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush()
- x86/irq: Demote irq_cpustat_t::__softirq_pending to u16
- x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d
- x86: Don't include linux/irq.h from asm/hardirq.h
- x86/apic: Order irq_enter/exit() calls correctly vs. ack_APIC_irq()
- x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d
- x86/KVM/VMX: Don't set l1tf_flush_l1d from vmx_handle_external_intr()
- Documentation/l1tf: Remove Yonah processors from not vulnerable list
- x86/speculation: Simplify sysfs report of VMX L1TF vulnerability
- x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry
- KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES
- KVM: x86: Add a framework for supporting MSR-based features
- KVM: X86: Introduce kvm_get_msr_feature()
- KVM: VMX: support MSR_IA32_ARCH_CAPABILITIES as a feature MSR
- KVM: VMX: Tell the nested hypervisor
[ubuntu/xenial-security] samba 2:4.3.11+dfsg-0ubuntu0.16.04.15 (Accepted)
samba (2:4.3.11+dfsg-0ubuntu0.16.04.15) xenial-security; urgency=medium * SECURITY UPDATE: Insufficient input validation on client directory listing in libsmbclient - debian/patches/CVE-2018-10858-*.patch: don't overwrite passed in buffer in source3/libsmb/libsmb_path.c, add checks to source3/libsmb/libsmb_dir.c, source3/libsmb/libsmb_path.c. - CVE-2018-10858 * SECURITY UPDATE: Confidential attribute disclosure AD LDAP server - debian/patches/CVE-2018-10919-*.patch: fix access checks. - CVE-2018-10919 Date: 2018-08-06 12:59:43.234067+00:00 Changed-By: Marc Deslauriers https://launchpad.net/ubuntu/+source/samba/2:4.3.11+dfsg-0ubuntu0.16.04.15 Sorry, changesfile not available.-- Xenial-changes mailing list Xenial-changes@lists.ubuntu.com Modify settings or unsubscribe at: https://lists.ubuntu.com/mailman/listinfo/xenial-changes
