Re: problem with i830M interlaced VGA output (915G works fine)
On Tue, Oct 07, 2008 at 03:55:19PM +0200, walter harms wrote: > can you produce a testcase ? simply apply the patch above to xf86-video-intel and run the given modeline. It will give you a progressive modeline. > i have a notebook with i830m maybe we can use that program to test other > chipsets also > and establish what chips a capable. Sometimes these features are simply > undocumented. But as we now know with Keith's help it's not an undocumented but an not-implemented feature of i830m. As I noted in an other post i810e, 915G, 945G, 965GM chipsets are running well. So I think all that could be done has already been done? - Thomas ___ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg
Re: problem with i830M interlaced VGA output (915G works fine)
Thomas Hilber schrieb: > On Mon, Oct 06, 2008 at 09:58:57AM -0700, Keith Packard wrote: >> On Sun, 2008-10-05 at 09:21 +0200, Thomas Hilber wrote: >>> Hi list, >>> >>> with the attached patch and xorg.conf I successfully use interlaced modes >>> like 720x576i on a 915G chipset. For an i830M this unfortunately does not >>> yet work completely. First of all thanks to Keith Packard and >>> Krzysztof Halasa for their basic PIPEACONF investigations posted here: >> I845 and earlier chips (I didn't look at the i855 or i865) do not >> support interlaced display at all. > > but it's quite strange. Even my i810 is running in > interlaced mode (i.e. 720x576i) with exactly the patch above with no > problems at all. > > OK, but if there is an 'interlace gap' between and including i830 - i865 then > I will stop to find a solution for this issue. > > anyway, thank you for your answer! > > can you produce a testcase ? i have a notebook with i830m maybe we can use that program to test other chipsets also and establish what chips a capable. Sometimes these features are simply undocumented. re, wh ___ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg
Re: problem with i830M interlaced VGA output (915G works fine)
On Mon, Oct 06, 2008 at 01:09:55PM -0700, Keith Packard wrote: > Yup, I read through the hardware docs for i845 and compared them with > i945 -- all of the places where the i945 says 'for interlaced modes, do > ' just don't exist in the i845 docs. thank you very much for reading through the hardware docs! This saved me a lot of further experimenting. > Btw, let us know when you're happy with the interlaced mode support and > we'll stick it into the upstream driver sources. Not that we like to > encourage people to use interlaced modes, but there are times when it's > the only option. I would really appreciate upstream interlaced mode support on VGA/DVI for several reasons: - the patch above (originating from Krzysztof Halasa) works fine for at least i810e, 915G, 945G, 965GM chipsets - adding interlaced mode support won't break existing applications - for boards like Intel D945GCLF this is the only way to connect a SCART TV-device without the need for additional hardware - signal quality on VGA/RGB is superior to S-VIDEO - support for variable frame rates allowing to deinterlace by display hardware: As mentioned here: http://lists.freedesktop.org/archives/xorg/2008-September/038296.html I wrote a patch for older ATI-radeon type cards, which synchronizes VGA/DVI output timing with external signals. This is an essential feature for jerkyless playback of live TV. I'm currently porting this to intel 9xx-class hardware hoping it will work there as flawless as on radeons. Cheers Thomas ___ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg
Re: problem with i830M interlaced VGA output (915G works fine)
On Mon, 2008-10-06 at 19:27 +0200, Thomas Hilber wrote: > but it's quite strange. Even my i810 is running in > interlaced mode (i.e. 720x576i) with exactly the patch above with no > problems at all. Yeah, i810 is completely different than i830 and later. And, for some reason, i830 has no interlaced display support. > OK, but if there is an 'interlace gap' between and including i830 - i865 then > I will stop to find a solution for this issue. Yup, I read through the hardware docs for i845 and compared them with i945 -- all of the places where the i945 says 'for interlaced modes, do ' just don't exist in the i845 docs. Btw, let us know when you're happy with the interlaced mode support and we'll stick it into the upstream driver sources. Not that we like to encourage people to use interlaced modes, but there are times when it's the only option. -- [EMAIL PROTECTED] signature.asc Description: This is a digitally signed message part ___ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg
Re: problem with i830M interlaced VGA output (915G works fine)
On Mon, Oct 06, 2008 at 09:58:57AM -0700, Keith Packard wrote: > On Sun, 2008-10-05 at 09:21 +0200, Thomas Hilber wrote: > > Hi list, > > > > with the attached patch and xorg.conf I successfully use interlaced modes > > like 720x576i on a 915G chipset. For an i830M this unfortunately does not > > yet work completely. First of all thanks to Keith Packard and > > Krzysztof Halasa for their basic PIPEACONF investigations posted here: > > I845 and earlier chips (I didn't look at the i855 or i865) do not > support interlaced display at all. but it's quite strange. Even my i810 is running in interlaced mode (i.e. 720x576i) with exactly the patch above with no problems at all. OK, but if there is an 'interlace gap' between and including i830 - i865 then I will stop to find a solution for this issue. anyway, thank you for your answer! - Thomas ___ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg
Re: problem with i830M interlaced VGA output (915G works fine)
On Sun, 2008-10-05 at 09:21 +0200, Thomas Hilber wrote: > Hi list, > > with the attached patch and xorg.conf I successfully use interlaced modes > like 720x576i on a 915G chipset. For an i830M this unfortunately does not > yet work completely. First of all thanks to Keith Packard and > Krzysztof Halasa for their basic PIPEACONF investigations posted here: I845 and earlier chips (I didn't look at the i855 or i865) do not support interlaced display at all. -- [EMAIL PROTECTED] signature.asc Description: This is a digitally signed message part ___ xorg mailing list xorg@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/xorg
problem with i830M interlaced VGA output (915G works fine)
Hi list,
with the attached patch and xorg.conf I successfully use interlaced modes
like 720x576i on a 915G chipset. For an i830M this unfortunately does not
yet work completely. First of all thanks to Keith Packard and
Krzysztof Halasa for their basic PIPEACONF investigations posted here:
http://lists.freedesktop.org/archives/xorg/2007-January/021271.html
I dug deeper into this:
Video mode setup is done by the same function i830_crtc_mode_set() for
both i830M and 915G. To PIPEACONF register of both chipsets the same
value is written to by:
OUTREG(PIPEACONF, PIPEACONF_ENABLE | PIPECONF_INTERLACE_W_FIELD_INDICATION);
It reads back the same value on a 915G where the interlaced mode works fine.
But it reads back only as
PIPEACONF_ENABLE
on an i830M chipset. The other bits of this register probably are reserved
there and thus are cleared. This makes me believe that
PIPECONF_INTERLACE_W_FIELD_INDICATION is not implemented on i830M hardware.
All the other register initialization needed for i830M interlaced mode
setup appears to work already. I exactly get the correct timings there but
they are progressive.
So I think there is just a tiny little thing missing which keeps my i830M
from operating in interlaced mode.
My question:
Does anybody have information what register to program to put an i830M
into interlaced mode?
It must to be something equivalent to
/* for i810 chipset */
#define INTERLACE_ENABLE 0x80
i810Reg->InterlaceControl = INTERLACE_ENABLE;
or
/* for 9xx-class chipsets */
#define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21)
OUTREG(PIPEACONF, PIPEACONF_ENABLE | PIPECONF_INTERLACE_W_FIELD_INDICATION);
Thanks in advance
Thomas
diff -ur xserver-xorg-video-intel-2.4.2.org/src/i810_driver.c
xserver-xorg-video-intel-2.4.2/src/i810_driver.c
--- xserver-xorg-video-intel-2.4.2.org/src/i810_driver.c2008-10-02
18:56:10.0 +0200
+++ xserver-xorg-video-intel-2.4.2/src/i810_driver.c2008-10-02
20:31:37.0 +0200
@@ -2857,7 +2857,9 @@
xf86DrvMsg(scrnIndex, X_PROBED,
"Removing interlaced mode \"%s\"\n", mode->name);
}
+#if 0 /* allow interlaced mode */
return MODE_BAD;
+#endif
}
return MODE_OK;
}
diff -ur xserver-xorg-video-intel-2.4.2.org/src/i830_crt.c
xserver-xorg-video-intel-2.4.2/src/i830_crt.c
--- xserver-xorg-video-intel-2.4.2.org/src/i830_crt.c 2008-03-26
03:15:53.0 +0100
+++ xserver-xorg-video-intel-2.4.2/src/i830_crt.c 2008-10-02
20:31:37.0 +0200
@@ -87,7 +87,7 @@
if (pMode->Flags & V_DBLSCAN)
return MODE_NO_DBLESCAN;
-if (pMode->Clock > 40 || pMode->Clock < 25000)
+if (pMode->Clock > 40 || pMode->Clock < 12000)
return MODE_CLOCK_RANGE;
return MODE_OK;
@@ -446,7 +446,7 @@
(1 << I830_OUTPUT_DVO_TMDS));
output->driver_private = i830_output;
-output->interlaceAllowed = FALSE;
+output->interlaceAllowed = TRUE;
output->doubleScanAllowed = FALSE;
/* Set up the DDC bus. */
diff -ur xserver-xorg-video-intel-2.4.2.org/src/i830_display.c
xserver-xorg-video-intel-2.4.2/src/i830_display.c
--- xserver-xorg-video-intel-2.4.2.org/src/i830_display.c 2008-10-02
18:56:10.0 +0200
+++ xserver-xorg-video-intel-2.4.2/src/i830_display.c 2008-10-02
20:31:37.0 +0200
@@ -71,7 +71,7 @@
intel_p2_t p2;
} intel_limit_t;
-#define I8XX_DOT_MIN 25000
+#define I8XX_DOT_MIN 12000
#define I8XX_DOT_MAX35
#define I8XX_VCO_MIN93
#define I8XX_VCO_MAX 140
@@ -95,9 +95,9 @@
#define I8XX_P2_LVDS_FAST7
#define I8XX_P2_SLOW_LIMIT 165000
-#define I9XX_DOT_MIN 2
+#define I9XX_DOT_MIN 12000
#define I9XX_DOT_MAX40
-#define I9XX_VCO_MIN 140
+#define I9XX_VCO_MIN 100
#define I9XX_VCO_MAX 280
/* Haven't found any reason to go this fast, but newer chips support it */
@@ -495,7 +495,7 @@
return FALSE;
if (crtc->enabled)
return FALSE;
-xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
+xf86SetModeCrtc (&mode, 0);
crtc->funcs->mode_set (crtc, &mode, &mode, 0, 0);
crtc->funcs->dpms (crtc, DPMSModeOn);
return TRUE;
@@ -962,8 +962,16 @@
static Bool
i830_crtc_mode_fixup(xf86CrtcPtr crtc, DisplayModePtr mode,
-DisplayModePtr adjusted_mode)
+DisplayModePtr ajd_mode)
{
+if (mode->Flags & V_INTERLACE) {
+ mode->CrtcVDisplay = ajd_mode->CrtcVDisplay = mode->VDisplay;
+ mode->CrtcVSyncStart = ajd_mode->CrtcVSyncStart = mode->VSyncStart;
+ mode->CrtcVSyncEnd = ajd_mode->CrtcVSyncEnd = mode->VSyncEnd;
+ mode->CrtcVBlankStart = ajd_mode->CrtcVBlankStart = mode->CrtcVDisplay;
+ mode->CrtcVBlankEnd = ajd_mode->CrtcVBlankEnd = mode->VTotal;
+ mode->CrtcVTotal = ajd_mode->CrtcVTotal = mode->VTotal;
+
