Ahh gotcha.
> On Feb 8, 2015, at 4:37 PM, erik quanstrom wrote:
>
>> On Sun Feb 8 15:31:26 PST 2015, don.bai...@gmail.com wrote:
>> Technically, there are a few instructions that the 9 compilers miss.
>> This is generally handled by the BYTE directive (see the asm manual).
>>
>> Alternative
> No. I just realized you want conditional move from DX to (DI).
>
> It's an illegal combination. The intel document only lists three forms for
> CMOVNE:
> CMOVNE r16, r/m16 // CMOVWNE
> CMOVNE r32, r/m32 // CMOVLNE
> CMOVNE r64, r/m64 // CMOVQNE
>
> All of them are conditionally moving from reg/
On Sun, Feb 8, 2015 at 6:42 PM, erik quanstrom
wrote:
> > On Sun, Feb 8, 2015 at 6:27 PM, erik quanstrom
> > wrote:
> > > am i reading the intel docs wrong, or is 6l missing a valid
> instruction?
> > > memmove5: doasm: notfound from=12 to=92 (47)CMOVQNE DX,(DI)> >
> > Go's liblink (which is
> On Sun, Feb 8, 2015 at 6:27 PM, erik quanstrom
> wrote:
>
> > am i reading the intel docs wrong, or is 6l missing a valid instruction?
> >
> > memmove5: doasm: notfound from=12 to=92 (47)CMOVQNE DX,(DI)
> >
> Go's liblink (which is derived from [5869]l) and cmd/6a support this
> instruction
On Sun, Feb 8, 2015 at 6:27 PM, erik quanstrom
wrote:
> am i reading the intel docs wrong, or is 6l missing a valid instruction?
>
> memmove5: doasm: notfound from=12 to=92 (47)CMOVQNE DX,(DI)
>
Go's liblink (which is derived from [5869]l) and cmd/6a support this
instruction.
On Sun Feb 8 15:31:26 PST 2015, don.bai...@gmail.com wrote:
> Technically, there are a few instructions that the 9 compilers miss.
> This is generally handled by the BYTE directive (see the asm manual).
>
> Alternatively, adding a new instruction to the lexer/etc is fairly
> trivial. See diffs b
Technically, there are a few instructions that the 9 compilers miss. This is
generally handled by the BYTE directive (see the asm manual).
Alternatively, adding a new instruction to the lexer/etc is fairly trivial. See
diffs between vc and kc, for example.
D
> On Feb 8, 2015, at 4:27 PM, e
am i reading the intel docs wrong, or is 6l missing a valid instruction?
memmove5: doasm: notfound from=12 to=92 (47)CMOVQNE DX,(DI)
- erik