[Intel-gfx] [PATCH 02/31] drm/i915: Move context revocation to scheduler

2021-02-08 Thread Chris Wilson
Centralise the means by which to remove a context from execution to the scheduler, allowing the backends to specialise as necessary. Note that without backend support, we can simplify the procedure to forcibly reset the HW to remove the context. Signed-off-by: Chris Wilson --- drivers/gpu/drm

[Intel-gfx] [PATCH 13/31] drm/i915/gt: Support virtual engine queues

2021-02-08 Thread Chris Wilson
of the siblings. Signed-off-by: Chris Wilson --- .../drm/i915/gt/intel_execlists_submission.c | 430 -- drivers/gpu/drm/i915/gt/selftest_execlists.c | 146 -- drivers/gpu/drm/i915/i915_request.c | 12 +- drivers/gpu/drm/i915/i915_scheduler.c | 79 +++- drivers/gpu

[Intel-gfx] [PATCH 25/31] drm/i915/gt: Support creation of 'internal' rings

2021-02-08 Thread Chris Wilson
. As they are not bound, we need to nerf a few assumptions that a rq->ring is in the GGTT. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_context.c | 2 +- .../drm/i915/gt/intel_execlists_submission.c | 2 +- drivers/gpu/drm/i915/gt/intel_ring.c |

[Intel-gfx] [PATCH 23/31] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines

2021-02-08 Thread Chris Wilson
independent timelines. Signed-off-by: Chris Wilson Cc: Joonas Lahtinen Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/intel_lrc.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index

[Intel-gfx] [PATCH 12/31] drm/i915: Extend the priority boosting for the display with a deadline

2021-02-08 Thread Chris Wilson
For a modeset/pageflip, there is a very precise deadline by which the frame must be completed in order to hit the vblank and be shown. While we don't pass along that exact information, we can at least inform the scheduler that this request-chain needs to be completed asap. Signed-off-by: Chris

[Intel-gfx] [PATCH 09/31] drm/i915: Replace priolist rbtree with a skiplist

2021-02-08 Thread Chris Wilson
5784106.01 0.32 # rbtree without deadlines 23.35 4152999.80 0.24 # skiplist without deadlines Based on the skiplist implementation by Dr Con Kolivas for MuQSS. References: https://en.wikipedia.org/wiki/Skip_list Signed-off-by: Chris Wilson --- .../drm/i915/gt

[Intel-gfx] [PATCH 06/31] drm/i915: Move busywaiting control to the scheduler

2021-02-08 Thread Chris Wilson
Busy-waiting is used for preempt-to-busy by schedulers, if they so choose. Since it is not a property of the engine, but that of the submission backend, move the flag from out of the engine to i915_sched_engine. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [PATCH 05/31] drm/i915/gt: Declare when we enabled timeslicing

2021-02-08 Thread Chris Wilson
Let userspace know if they can trust timeslicing by including it as part of the I915_PARAM_HAS_SCHEDULER::I915_SCHEDULER_CAP_TIMESLICING v2: Only declare timeslicing if we can safely preempt userspace. Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing") Signed-off

[Intel-gfx] [PATCH 21/31] drm/i915/gt: Use indices for writing into relative timelines

2021-02-08 Thread Chris Wilson
Relative timelines are relative to either the global or per-process HWSP, and so we can replace the absolute addressing with store-index variants for position invariance. Signed-off-by: Chris Wilson Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 98

[Intel-gfx] [PATCH 31/31] drm/i915/gt: Limit C-states while waiting for requests

2021-02-08 Thread Chris Wilson
to the interrupt latency per se, but secondary effects of avoiding additional memory latencies while active. Signed-off-by: Chris Wilson Cc: Tvrtko Ursulin Cc: Joonas Lahtinen Cc: Eero Tamminen Cc: Francisco Jerez Cc: Mika Kuoppala Cc: Dmitry Rogozhkin --- drivers/gpu/drm/i915/Kconfig.profile

[Intel-gfx] [PATCH 08/31] drm/i915: Fix the iterative dfs for defering requests

2021-02-08 Thread Chris Wilson
The current implementation of walking the children of a deferred requests lacks the backtracking required to reduce the dfs to linear. Having pulled it from execlists into the common layer, we can reuse the dfs code for priority inheritance. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko

[Intel-gfx] [PATCH 01/31] drm/i915/gt: Ratelimit heartbeat completion probing

2021-02-08 Thread Chris Wilson
/intel/-/issues/2853 Suggested-by: CQ Tang Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_engine_heartbeat.c | 95 --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + .../drm/i915/gt/selftest_engine_heartbeat.c | 65 ++--- drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 04/31] drm/i915: Move timeslicing flag to scheduler

2021-02-08 Thread Chris Wilson
Whether a scheduler chooses to implement timeslicing is up to it, and not an underlying property of the HW engine. The scheduler does depend on the HW supporting preemption. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_engine.h | 6 ++ drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 22/31] drm/i915/selftests: Exercise relative timeline modes

2021-02-08 Thread Chris Wilson
A quick test to verify that the backend accepts each type of timeline and can use them to track and control request emission. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/selftest_timeline.c | 105 1 file changed, 105 insertions(+) diff --git a/drivers/gpu/drm

[Intel-gfx] [PATCH 16/31] drm/i915/gt: Delay taking irqoff for execlists submission

2021-02-08 Thread Chris Wilson
the spinlock, and so reduce contention. Signed-off-by: Chris Wilson --- .../drm/i915/gt/intel_execlists_submission.c | 88 --- 1 file changed, 39 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH 24/31] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"

2021-02-08 Thread Chris Wilson
This was removed in commit 478ffad6d690 ("drm/i915: drop engine_pin/unpin_breadcrumbs_irq") as the last user had been removed, but now there is a promise of a new user in the next patch. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_breadcru

[Intel-gfx] [PATCH 27/31] drm/i915/gt: Infrastructure for ring scheduling

2021-02-08 Thread Chris Wilson
interrupts do not appear to be affecting throughput (+-10%, some tasks even improve to the reduced request overheads) and improve latency. [Which is a massive improvement since the introduction of Sandybridge!] Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/Makefile | 1 + drivers

[Intel-gfx] [PATCH 28/31] drm/i915/gt: Implement ring scheduler for gen4-7

2021-02-08 Thread Chris Wilson
. Having built the ring scheduler infrastructure over top of the global ringbuffer submission, we now need to provide the HW knowledge required to build command packets and implement context switching. Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_ring_scheduler.c| 460

[Intel-gfx] [PATCH 29/31] drm/i915/gt: Enable ring scheduling for gen5-7

2021-02-08 Thread Chris Wilson
Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 5 - drivers/gpu/drm/i915/gt/intel_gt_types.h | 1 + drivers/gpu/drm/i915/gt/intel_rps.c | 6 ++ 4 files

[Intel-gfx] [PATCH 17/31] drm/i915/gt: Convert the legacy ring submission to use the scheduling interface

2021-02-08 Thread Chris Wilson
Adapt the old legacy ring submission to use a passthrough tasklet so that we can plug it into the scheduler. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + .../gpu/drm/i915/gt/intel_ring_submission.c | 167 +++--- 2 files changed, 107

[Intel-gfx] [PATCH 26/31] drm/i915/gt: Use client timeline address for seqno writes

2021-02-08 Thread Chris Wilson
If we allow for per-client timelines, even with legacy ring submission, we open the door to a world full of possiblities [scheduling and semaphores]. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/gt/gen2_engine_cs.c | 72 ++- drivers/gpu/drm/i915/gt/gen2_engine_cs.h

[Intel-gfx] [PATCH 30/31] drm/i915: Support secure dispatch on gen6/gen7

2021-02-08 Thread Chris Wilson
Re-enable secure dispatch for gen6/gen7, primarily to workaround the command parser and overly zealous command validation on Haswell. For example this prevents making accurate measurements using a journal for store results from the GPU without CPU intervention. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 07/31] drm/i915: Move preempt-reset flag to the scheduler

2021-02-08 Thread Chris Wilson
While the HW may support preemption, whether or not the scheduler enforces preemption by forcibly resetting the current context is ultimately up to the scheduler. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine.h | 7

[Intel-gfx] [PATCH 20/31] drm/i915/gt: Add timeline "mode"

2021-02-08 Thread Chris Wilson
Explicitly differentiate between the absolute and relative timelines, and the global HWSP and ppHWSP relative offsets. When using a timeline that is relative to a known status page, we can replace the absolute addressing in the commands with indexed variants. Signed-off-by: Chris Wilson Reviewed

[Intel-gfx] [PATCH 18/31] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb

2021-02-08 Thread Chris Wilson
In preparation for removing the has_initial_breadcrumb field, add a helper function for the existing callers. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/gen8_engine_cs.c| 2 +- drivers/gpu/drm/i915/gt/intel_ring_submission.c | 4 ++-- drivers/gpu

[Intel-gfx] [PATCH 19/31] drm/i915/gt: Track timeline GGTT offset separately from subpage offset

2021-02-08 Thread Chris Wilson
and so need more than 12b. Signed-off-by: Chris Wilson Reviewed-by: Matthew Brost --- drivers/gpu/drm/i915/gt/gen6_engine_cs.c| 4 ++-- drivers/gpu/drm/i915/gt/gen8_engine_cs.c| 2 +- .../drm/i915/gt/intel_execlists_submission.c| 2 +- drivers/gpu/drm/i915/gt

[Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler

2021-02-07 Thread Chris Wilson
Since finding the currently active request starts by walking the scheduler lists under the scheduler lock, move the routine to the scheduler. v2: Wrap se->active() with i915_sched_get_active_request() Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()

2021-02-07 Thread Chris Wilson
Wrap the query on whether the backend engine supports us emitting semaphores to coordinate multiple requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_request.h | 5 + 2 files changed, 6 insertions

[Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state

2021-02-07 Thread Chris Wilson
Move the scheduler pretty printer from out of the execlists register state to and push it to the schduler. v2: It's not common to all, so shove it out of intel_engine_cs and split it between scheduler front/back ends Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine

2021-02-07 Thread Chris Wilson
Claim the submit_request vfunc as the entry point into the scheduler backend for ready requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11

[Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler

2021-02-07 Thread Chris Wilson
Since finding the currently active request starts by walking the scheduler lists under the scheduler lock, move the routine to the scheduler. v2: Wrap se->active() with i915_sched_get_active_request() Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state

2021-02-07 Thread Chris Wilson
Move the scheduler pretty printer from out of the execlists register state to and push it to the schduler. v2: It's not common to all, so shove it out of intel_engine_cs and split it between scheduler front/back ends Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm

[Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()

2021-02-07 Thread Chris Wilson
Wrap the query on whether the backend engine supports us emitting semaphores to coordinate multiple requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_request.h | 5 + 2 files changed, 6 insertions

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine

2021-02-07 Thread Chris Wilson
Claim the submit_request vfunc as the entry point into the scheduler backend for ready requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11

[Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler

2021-02-06 Thread Chris Wilson
Since finding the currently active request starts by walking the scheduler lists under the scheduler lock, move the routine to the scheduler. v2: Wrap se->active() with i915_sched_get_active_request() Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()

2021-02-06 Thread Chris Wilson
Wrap the query on whether the backend engine supports us emitting semaphores to coordinate multiple requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_request.h | 5 + 2 files changed, 6 insertions

[Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state

2021-02-06 Thread Chris Wilson
Move the scheduler pretty printer from out of the execlists register state to and push it to the schduler. v2: It's not common to all, so shove it out of intel_engine_cs and split it between scheduler front/back ends Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine

2021-02-06 Thread Chris Wilson
Claim the submit_request vfunc as the entry point into the scheduler backend for ready requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11

[Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler

2021-02-06 Thread Chris Wilson
Since finding the currently active request starts by walking the scheduler lists under the scheduler lock, move the routine to the scheduler. v2: Wrap se->active() with i915_sched_get_active_request() Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state

2021-02-06 Thread Chris Wilson
Move the scheduler pretty printer from out of the execlists register state to and push it to the schduler. v2: It's not common to all, so shove it out of intel_engine_cs and split it between scheduler front/back ends Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm

[Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()

2021-02-06 Thread Chris Wilson
Wrap the query on whether the backend engine supports us emitting semaphores to coordinate multiple requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_request.h | 5 + 2 files changed, 6 insertions

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine

2021-02-06 Thread Chris Wilson
Claim the submit_request vfunc as the entry point into the scheduler backend for ready requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11

[Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler

2021-02-06 Thread Chris Wilson
Since finding the currently active request starts by walking the scheduler lists under the scheduler lock, move the routine to the scheduler. v2: Wrap se->active() with i915_sched_get_active_request() Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine

2021-02-06 Thread Chris Wilson
Claim the submit_request vfunc as the entry point into the scheduler backend for ready requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11

[Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state

2021-02-06 Thread Chris Wilson
Move the scheduler pretty printer from out of the execlists register state to and push it to the schduler. v2: It's not common to all, so shove it out of intel_engine_cs and split it between scheduler front/back ends Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm

[Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()

2021-02-06 Thread Chris Wilson
Wrap the query on whether the backend engine supports us emitting semaphores to coordinate multiple requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_request.h | 5 + 2 files changed, 6 insertions

[Intel-gfx] [CI 3/4] drm/i915: Show execlists queues when dumping state

2021-02-06 Thread Chris Wilson
Move the scheduler pretty printer from out of the execlists register state to and push it to the schduler. v2: It's not common to all, so shove it out of intel_engine_cs and split it between scheduler front/back ends Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm

[Intel-gfx] [CI 2/4] drm/i915: Move finding the current active request to the scheduler

2021-02-06 Thread Chris Wilson
Since finding the currently active request starts by walking the scheduler lists under the scheduler lock, move the routine to the scheduler. v2: Wrap se->active() with i915_sched_get_active_request() Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915

[Intel-gfx] [CI 4/4] drm/i915: Wrap i915_request_use_semaphores()

2021-02-06 Thread Chris Wilson
Wrap the query on whether the backend engine supports us emitting semaphores to coordinate multiple requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_request.h | 5 + 2 files changed, 6 insertions

[Intel-gfx] [CI 1/4] drm/i915: Move submit_request to i915_sched_engine

2021-02-06 Thread Chris Wilson
Claim the submit_request vfunc as the entry point into the scheduler backend for ready requests. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_types.h | 8 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 11

Re: [Intel-gfx] [RFC 10/14] drm/i915/pxp: Enable PXP power management

2021-02-06 Thread Chris Wilson
Quoting Chris Wilson (2021-02-06 13:06:05) > Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:21) > > + if (!ret) { > > + ret = wait_for(!pxp->termination_in_progress, 10); > > This only works by chance. The compiler doesn't even have to reload th

Re: [Intel-gfx] [RFC 10/14] drm/i915/pxp: Enable PXP power management

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:21) > + if (!ret) { > + ret = wait_for(!pxp->termination_in_progress, 10); This only works by chance. The compiler doesn't even have to reload the variable. See struct completion. -Chris

Re: [Intel-gfx] [RFC 04/14] drm/i915/pxp: allocate a vcs context for pxp usage

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:15) > The context is required to send the session termination commands to the > VCS, which will be implemented in a follow-up patch. We can also use the > presence of the context as a check of pxp initialization completion. > > Signed-off-by:

Re: [Intel-gfx] [RFC 08/14] drm/i915/pxp: Implement arb session teardown

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:19) > From: "Huang, Sean Z" > > Teardown is triggered when the display topology changes and no > long meets the secure playback requirement, and hardware trashes > all the encryption keys for display. Additionally, we want to emit a > teardown

Re: [Intel-gfx] [RFC 07/14] drm/i915/pxp: Create the arbitrary session after boot

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:18) > From: "Huang, Sean Z" > > Create the arbitrary session, with the fixed session id 0xf, after > system boot, for the case that application allocates the protected > buffer without establishing any protection session. Because the > hardware

Re: [Intel-gfx] [RFC 06/14] drm/i915/pxp: Implement funcs to create the TEE channel

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:17) > From: "Huang, Sean Z" > > Implement the funcs to create the TEE channel, so kernel can > send the TEE commands directly to TEE for creating the arbitrary > (default) session. > > Signed-off-by: Huang, Sean Z > Signed-off-by: Daniele

Re: [Intel-gfx] [RFC 04/14] drm/i915/pxp: allocate a vcs context for pxp usage

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:15) > The context is required to send the session termination commands to the > VCS, which will be implemented in a follow-up patch. We can also use the > presence of the context as a check of pxp initialization completion. > > Signed-off-by:

Re: [Intel-gfx] [RFC 12/14] drm/i915/pxp: User interface for Protected buffer

2021-02-06 Thread Chris Wilson
Quoting Daniele Ceraolo Spurio (2021-02-06 02:09:23) > From: Bommu Krishnaiah > > This api allow user mode to create Protected buffer and context creation. > Only contexts created with the flag set are allowed to operate on > protected buffers. > > We only allow setting the flags at creation

[PATCH v3] kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE

2021-02-05 Thread Chris Wilson
CHECKPOINT_RESTORE in their configs and so, by extension, SYS_kcmp. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3046 Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach Cc: Rasmus Villemoes Cc

[Intel-gfx] [CI 3/5] drm/i915: Move scheduler queue

2021-02-05 Thread Chris Wilson
Extract the scheduling queue from "execlists" into the per-engine scheduling structs, for reuse by other backends. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- .../gpu/drm/i915/gem/i915_gem_context_types.h | 2 +- drivers/gpu/drm/i915/gem/i915_gem_wait.c | 1

[Intel-gfx] [CI 2/5] drm/i915: Move common active lists from engine to i915_scheduler

2021-02-05 Thread Chris Wilson
Extract the scheduler lists into a related structure, stop sprawling over struct intel_engine_cs. Also transfer the responsibility of tracing the scheduler events from ENGINE_TRACE() to SCHED_TRACE(). Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gem

[Intel-gfx] [CI 4/5] drm/i915: Move tasklet from execlists to sched

2021-02-05 Thread Chris Wilson
Move the scheduling tasklists out of the execlists backend into the per-engine scheduling bookkeeping. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine.h| 33 +++- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 33 ++-- .../gpu

[Intel-gfx] [CI 1/5] drm/i915: Wrap access to intel_engine.active

2021-02-05 Thread Chris Wilson
As we are about to shuffle the lists around to consolidate new control objects, reduce the code movement by wrapping access to the scheduler lists ahead of time. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 17 +++--- drivers/gpu

[Intel-gfx] [CI 5/5] drm/i915/gt: Only kick the scheduler on timeslice/preemption change

2021-02-05 Thread Chris Wilson
Kick the scheduler to allow it to see the timeslice duration change, don't peek into execlists. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/sysfs_engines.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915

[Intel-gfx] [PATCH v3] kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE

2021-02-05 Thread Chris Wilson
CHECKPOINT_RESTORE in their configs and so, by extension, SYS_kcmp. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3046 Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach Cc: Rasmus Villemoes Cc

[PATCH v3] kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE

2021-02-05 Thread Chris Wilson
CHECKPOINT_RESTORE in their configs and so, by extension, SYS_kcmp. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3046 Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach Cc: Rasmus Villemoes Cc

Re: [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
Quoting Kees Cook (2021-02-05 21:20:33) > On Fri, Feb 05, 2021 at 09:16:01PM +0000, Chris Wilson wrote: > > The subject should of course be changed, as it is no longer being > > enabled by default. > > "default n" is redundant. I thought being explicit would be p

Re: [Intel-gfx] [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
Quoting Kees Cook (2021-02-05 21:20:33) > On Fri, Feb 05, 2021 at 09:16:01PM +0000, Chris Wilson wrote: > > The subject should of course be changed, as it is no longer being > > enabled by default. > > "default n" is redundant. I thought being explicit would be p

Re: [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
Quoting Kees Cook (2021-02-05 21:20:33) > On Fri, Feb 05, 2021 at 09:16:01PM +0000, Chris Wilson wrote: > > The subject should of course be changed, as it is no longer being > > enabled by default. > > "default n" is redundant. I thought being explicit would be p

[PATCH] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
, lift SYS_kcmp out of the non-default CONFIG_CHECKPOINT_RESTORE into the selectable syscall category. Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach --- init/Kconfig

Re: [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
The subject should of course be changed, as it is no longer being enabled by default. Something like kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE Quoting Chris Wilson (2021-02-05 21:06:10) > Userspace has discovered the functionality offered by SYS_kcmp and has > s

Re: [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
The subject should of course be changed, as it is no longer being enabled by default. Something like kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE Quoting Chris Wilson (2021-02-05 21:06:10) > Userspace has discovered the functionality offered by SYS_kcmp and has > s

Re: [Intel-gfx] [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
The subject should of course be changed, as it is no longer being enabled by default. Something like kcmp: Support selection of SYS_kcmp without CHECKPOINT_RESTORE Quoting Chris Wilson (2021-02-05 21:06:10) > Userspace has discovered the functionality offered by SYS_kcmp and has > s

[PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
/3046 Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach Acked-by: Daniel Vetter # DRM depends on SYS_kcmp --- v2: - Default n. - Borrrow help message from man kcmp. - Export

[Intel-gfx] [PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
/3046 Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach Acked-by: Daniel Vetter # DRM depends on SYS_kcmp --- v2: - Default n. - Borrrow help message from man kcmp. - Export

[PATCH v2] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
/3046 Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach Acked-by: Daniel Vetter # DRM depends on SYS_kcmp --- v2: - Default n. - Borrrow help message from man kcmp. - Export

[Intel-gfx] [CI 2/2] drm/i915/gt: Pull all execlists scheduler initialisation together

2021-02-05 Thread Chris Wilson
Put all the scheduler initialisation code for execlists into a common routine. This is to reduce code movement later. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- .../drm/i915/gt/intel_execlists_submission.c | 26 --- 1 file changed, 16 insertions(+), 10

[Intel-gfx] [CI 1/2] drm/i915/gt: Always flush the submission queue on checking for idle

2021-02-05 Thread Chris Wilson
We check for idle during debug prints and other debugging actions. Simplify the flow by not touching execlists state. Signed-off-by: Chris Wilson Reviewed-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff

[Intel-gfx] [PATCH] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
, lift SYS_kcmp out of the non-default CONFIG_CHECKPOINT_RESTORE into the selectable syscall category. Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach --- init/Kconfig

[PATCH] kernel: Expose SYS_kcmp by default

2021-02-05 Thread Chris Wilson
, lift SYS_kcmp out of the non-default CONFIG_CHECKPOINT_RESTORE into the selectable syscall category. Signed-off-by: Chris Wilson Cc: Kees Cook Cc: Andy Lutomirski Cc: Will Drewry Cc: Andrew Morton Cc: Dave Airlie Cc: Daniel Vetter Cc: Lucas Stach --- init/Kconfig

[Intel-gfx] [PATCH] drm/i915/gt: Ratelimit heartbeat completion probing

2021-02-05 Thread Chris Wilson
/intel/-/issues/2853 Suggested-by: CQ Tang Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_engine_heartbeat.c | 93 +-- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + .../drm/i915/gt/selftest_engine_heartbeat.c | 65 ++--- drivers/gpu/drm/i915/gt

[Intel-gfx] [PATCH] drm/i915/gt: Ratelimit heartbeat completion probing

2021-02-05 Thread Chris Wilson
/intel/-/issues/2853 Suggested-by: CQ Tang Signed-off-by: Chris Wilson --- .../gpu/drm/i915/gt/intel_engine_heartbeat.c | 93 +-- drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + .../drm/i915/gt/selftest_engine_heartbeat.c | 62 ++--- drivers/gpu/drm/i915/gt

Re: [Intel-gfx] [PATCH] drm/i915/icl, tgl: whitelist COMMON_SLICE_CHICKEN3 register

2021-02-05 Thread Chris Wilson
gt; which will lead to dropping unnecessary render target flushes and stall > on scoreboard. The rest of the register looks safe to expose, and it passes our sanity checks that the register is local to the context and should not affect others. > Bspec: 11333 > Bspec: 45829 > > Signe

Re: [Intel-gfx] [PATCH v4] drm/i915/debugfs : PM_REQ and PM_RES registers

2021-02-05 Thread Chris Wilson
Quoting S, Saichandana (2021-02-05 13:05:20) > > > > -Original Message- > > From: Chris Wilson > > Sent: Friday, January 15, 2021 6:51 PM > > To: S, Saichandana ; intel- > > g...@lists.freedesktop.org > > Cc: Nikula, Jani ; S, Saichandana > &

[Intel-gfx] [PATCH] drm/i915: Autoselect CONFIG_CHECKPOINT_RESTORE for SYS_kcmp

2021-02-05 Thread Chris Wilson
/intel/-/issues/3046 Signed-off-by: Chris Wilson Cc: Jani Nikula Cc: Daniel Vetter --- drivers/gpu/drm/i915/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index 1e1cb245fca7..470a5214bd33 100644 --- a/drivers/gpu/drm/i915

[PATCH] drm/i915: Autoselect CONFIG_CHECKPOINT_RESTORE for SYS_kcmp

2021-02-05 Thread Chris Wilson
/intel/-/issues/3046 Signed-off-by: Chris Wilson Cc: Jani Nikula Cc: Daniel Vetter --- drivers/gpu/drm/i915/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index 1e1cb245fca7..470a5214bd33 100644 --- a/drivers/gpu/drm/i915

[Intel-gfx] [CI] drm/i915/selftest: Synchronise with the GPU timestamp

2021-02-05 Thread Chris Wilson
Wait for the GPU to wake up from the semaphore before measuring the time, so that we coordinate the sampling on both the CPU and GPU for more accurate comparisons. v2: Switch to local_irq_disable() as once suggested by Mika. Reported-by: Bruce Chang Signed-off-by: Chris Wilson Cc: CQ Tang

[Intel-gfx] [PATCH v4] drm/i915/gt: Ratelimit heartbeat completion probing

2021-02-05 Thread Chris Wilson
completion check to accommodate that and avoid checking too early (before we've had a chance to handle any engine resets required). v2: Attach a callback to flush the work immediately upon the heartbeat completion and insert the delay before the next. Suggested-by: CQ Tang Signed-off-by: Chris

[Intel-gfx] [PATCH] drm/i915/gt: Ratelimit heartbeat completion probing

2021-02-05 Thread Chris Wilson
completion check to accommodate that and avoid checking too early (before we've had a chance to handle any engine resets required). v2: Attach a callback to flush the work immediately upon the heartbeat completion and insert the delay before the next. Suggested-by: CQ Tang Signed-off-by: Chris

[Intel-gfx] [PATCH i-g-t] i915/module_load: Tidy up gem_exec_store workalike

2021-02-05 Thread Chris Wilson
We emit a store on each GPU after loading the module to confirm the basic liveness of command submission. Trim away some of the chaff. Signed-off-by: Chris Wilson Cc: Ramalingam C --- tests/i915/i915_module_load.c | 146 ++ 1 file changed, 58 insertions(+), 88

[Intel-gfx] [PATCH] drm/i915/gt: Ratelimit heartbeat completion probing

2021-02-04 Thread Chris Wilson
completion check to accommodate that and avoid checking too early (before we've had a chance to handle any engine resets required). v2: Attach a callback to flush the work immediately upon the heartbeat completion and insert the delay before the next. Suggested-by: CQ Tang Signed-off-by: Chris

[Intel-gfx] [PATCH] drm/i915/selftest: Synchronise with the GPU timestamp

2021-02-04 Thread Chris Wilson
Wait for the GPU to wake up from the semaphore before measuring the time, so that we coordinate the sampling on both the CPU and GPU for more accurate comparisons. Reported-by: Bruce Chang Signed-off-by: Chris Wilson Cc: CQ Tang --- drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 4 +++- 1

[Intel-gfx] [CI 2/2] drm/i915/gt: Double check heartbeat timeout before resetting

2021-02-04 Thread Chris Wilson
Check that we have actually passed the heartbeat interval since last checking the request before resetting the device. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2780 Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 11

[Intel-gfx] [CI 1/2] drm/i915/selftests: Restore previous heartbeat interval

2021-02-04 Thread Chris Wilson
Use the defaults we store on the engine when resetting the heartbeat as we may have had to adjust it from the config value during initialisation. Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala --- .../gpu/drm/i915/gt/selftest_engine_heartbeat.c| 14 ++ 1 file changed

[valgrind] [Bug 421262] Lack of Proper (80 bit) Long Double Support Causes Serious Problems (on x86 32bit)

2021-02-04 Thread Chris Wilson
https://bugs.kde.org/show_bug.cgi?id=421262 --- Comment #2 from Chris Wilson --- Someone changed the title of this bug report I submitted to say "x86 32bit" in the title. Actually, I'm using 64-bit, not 32-bit, x86, and that is where I encountered the problem. -- You are receiving

Re: [Intel-gfx] [PATCH 32/57] drm/i915: Move needs-breadcrumb flags to scheduler

2021-02-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2021-02-04 15:28:30) > > On 01/02/2021 08:56, Chris Wilson wrote: > > Whether the scheduler depends on interrupt delivery for forward progress > > is a property of the scheduler backend not of the underlying engine, so > > move the fla

Re: [Intel-gfx] [PATCH 30/57] drm/i915: Move timeslicing flag to scheduler

2021-02-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2021-02-04 15:18:31) > > On 01/02/2021 08:56, Chris Wilson wrote: > > Whether a scheduler chooses to implement timeslicing is up to it, and > > not an underlying property of the HW engine. The scheduler does depend > > on the HW supporting pr

Re: [Intel-gfx] [PATCH 29/57] drm/i915: Move scheduler flags

2021-02-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2021-02-04 15:14:20) > > On 01/02/2021 08:56, Chris Wilson wrote: > > Start extracting the scheduling flags from the engine. We begin with its > > own existence. > > > > Signed-off-by: Chris Wilson > > --- > > drivers/

Re: [Intel-gfx] [PATCH 26/57] drm/i915: Move finding the current active request to the scheduler

2021-02-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2021-02-04 14:30:18) > > On 01/02/2021 08:56, Chris Wilson wrote: > > Since finding the currently active request starts by walking the > > scheduler lists under the scheduler lock, move the routine to the > > scheduler. > > &

Re: [Intel-gfx] [PATCH 25/57] drm/i915: Move submit_request to i915_sched_engine

2021-02-04 Thread Chris Wilson
Quoting Tvrtko Ursulin (2021-02-04 14:13:17) > > On 01/02/2021 08:56, Chris Wilson wrote: > > @@ -28,6 +28,15 @@ struct i915_sched { > > > > unsigned long mask; /* available scheduling channels */ > > > > + /* > > + * Pass the re

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