[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

https://github.com/momchil-velikov edited https://github.com/llvm/llvm-project/pull/69598 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

@@ -64,26 +65,29 @@ class ImmCheck { }; class SVEType { - TypeSpec TS; bool Float, Signed, Immediate, Void, Constant, Pointer, BFloat; bool DefaultType, IsScalable, Predicate, PredicatePattern, PrefetchOp, Svcount; unsigned Bitwidth, ElementBitwidth,

[clang] [AArch64] Stack probing for function prologues (PR #66524)

momchil-velikov wrote: > Apologies for still not being able to create a reproducible example I can > share but what I am seeing is the stack probe write overwriting the value at > the tip of the stack when I step debug execution: Can you spot a place where the probe instruction is *not*

[clang] [AArch64] Stack probing for function prologues (PR #66524)

momchil-velikov wrote: > I haven't been able to produce a minimal, sharable example as of yet, but I'm > encountering a runtime error associated with an inlined function where stack > probing is active. The error manifests as a null pointer dereference, > originating from a stack value that

[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

@@ -263,17 +267,11 @@ class SVEEmitter { // which is inconvenient to specify in the arm_sve.td file or // generate in CGBuiltin.cpp. struct ReinterpretTypeInfo { +SVEType BaseType; const char *Suffix; -const char *Type; -const char *BuiltinType; }; -

[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

momchil-velikov wrote: > I think it is fine to point also the PR in the acle in the commit message: > https://github.com/ARM-software/acle/pull/275/files Done. https://github.com/llvm/llvm-project/pull/69598 ___ cfe-commits mailing list

[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

https://github.com/momchil-velikov edited https://github.com/llvm/llvm-project/pull/69598 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)

@@ -1,25 +1,33 @@ // Check the correct function attributes are generated -// RUN: %clang_cc1 -triple x86_64-linux -O0 -S -emit-llvm -o- %s -fstack-clash-protection | FileCheck %s -// RUN: %clang_cc1 -triple s390x-linux-gnu -O0 -S -emit-llvm -o- %s -fstack-clash-protection |

[clang] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)

@@ -85,17 +90,32 @@ static bool isPrologueCFIInstruction(const MachineInstr ) { MI.getFlag(MachineInstr::FrameSetup); } -static bool containsPrologue(const MachineBasicBlock ) { - return llvm::any_of(MBB.instrs(), isPrologueCFIInstruction); -} - static bool

[clang] [AArch64] Stack probing for function prologues (PR #66524)

momchil-velikov wrote: Ping? https://github.com/llvm/llvm-project/pull/66524 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)

momchil-velikov wrote: Ping? https://github.com/llvm/llvm-project/pull/68993 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

@@ -1,336 +1,813 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall

[clang] [AArch64] Implement reinterpret builtins for SVE vector tuples (PR #69598)

@@ -1,336 +1,813 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall

[clang] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)

@@ -2287,7 +2297,7 @@ void CodeGenModule::SetLLVMFunctionAttributesForDefinition(const Decl *D, if ((!D || !D->hasAttr()) && CodeGenOpts.UnwindTables) B.addUWTableAttr(llvm::UWTableKind(CodeGenOpts.UnwindTables)); - if (CodeGenOpts.StackClashProtector) + if

[clang] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)

@@ -1076,6 +1076,16 @@ void CodeGenModule::Release() { "sign-return-address-with-bkey", 1); } + if (Arch == llvm::Triple::aarch64 || Arch == llvm::Triple::aarch64_be) { momchil-velikov wrote: Stack probing needs to be

[clang] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)

https://github.com/momchil-velikov created https://github.com/llvm/llvm-project/pull/68993 None >From 870650ae6e2c5b7f34c4d0b1572c5f6a88b6e9b6 Mon Sep 17 00:00:00 2001 From: Momchil Velikov Date: Mon, 2 Oct 2023 14:46:27 +0100 Subject: [PATCH 1/2] [CFIFixup] Allow function prologues to span

[clang] a31d00d - Fix test failure for targets with varying uwtable defaults

Author: Momchil Velikov Date: 2022-02-14T15:59:26Z New Revision: a31d00ddceb057291ef3a094c57ae36975e804fe URL: https://github.com/llvm/llvm-project/commit/a31d00ddceb057291ef3a094c57ae36975e804fe DIFF: https://github.com/llvm/llvm-project/commit/a31d00ddceb057291ef3a094c57ae36975e804fe.diff

[clang] 21aa107 - Reland "Do not create LLVM IR `constant`s for objects with dynamic initialisation"

Author: Momchil Velikov Date: 2021-05-25T15:54:40+01:00 New Revision: 21aa107eb79f8ddc5e7ca4e8f3476338dfa90049 URL: https://github.com/llvm/llvm-project/commit/21aa107eb79f8ddc5e7ca4e8f3476338dfa90049 DIFF:

[clang] 13dd65b - Do not create LLVM IR `constant`s for objects with dynamic initialisation

Author: Momchil Velikov Date: 2021-05-24T22:04:15+01:00 New Revision: 13dd65b3a1a3ac049b5f3a9712059f7c61649bea URL: https://github.com/llvm/llvm-project/commit/13dd65b3a1a3ac049b5f3a9712059f7c61649bea DIFF:

[clang] 5c7b43a - [clang][AArch32] Correctly align HA arguments when passed on the stack

Author: Momchil Velikov Date: 2021-05-10T16:28:46+01:00 New Revision: 5c7b43aa8298a389b906d72c792941a0ce57782e URL: https://github.com/llvm/llvm-project/commit/5c7b43aa8298a389b906d72c792941a0ce57782e DIFF:

[clang] f9d932e - [clang][AArch64] Correctly align HFA arguments when passed on the stack

Author: Momchil Velikov Date: 2021-04-15T22:58:14+01:00 New Revision: f9d932e6735afe73117e142a12443449f2197e69 URL: https://github.com/llvm/llvm-project/commit/f9d932e6735afe73117e142a12443449f2197e69 DIFF:

[clang] a88c722 - [AArch64] PAC/BTI code generation for LLVM generated functions

Author: Momchil Velikov Date: 2020-09-25T11:47:14+01:00 New Revision: a88c722e687e6780dcd6a58718350dc76fcc4cc9 URL: https://github.com/llvm/llvm-project/commit/a88c722e687e6780dcd6a58718350dc76fcc4cc9 DIFF:

[clang] 102b410 - [CMSE] Clear padding bits of struct/unions/fp16 passed by value

Author: Momchil Velikov Date: 2020-04-28T17:05:58+01:00 New Revision: 102b4105e3fd568ed2c758ed7e6fd266a819d6db URL: https://github.com/llvm/llvm-project/commit/102b4105e3fd568ed2c758ed7e6fd266a819d6db DIFF:

[clang] 334ac81 - Fix the check for regparm in FunctionType::ExtInfo

Author: Momchil Velikov Date: 2020-04-27T16:01:07+01:00 New Revision: 334ac81054018c3ae6058a0bf12e9c9363bd50ad URL: https://github.com/llvm/llvm-project/commit/334ac81054018c3ae6058a0bf12e9c9363bd50ad DIFF:

Re: [PATCH] D71129: [ARM][CMSE] Implement CMSE attributes

From: Russell Gallop > The new case that you've added to save-temps.c doesn't work if you only build > with > DLLVM_TARGETS_TO_BUILD=X86 (i.e. not building ARM). Please could you take a > look? Yes, I've been looking into it. I may revert that test alone, until I figure out how to fix it.

[clang] 080d046 - [ARM][CMSE] Implement CMSE attributes

Author: Momchil Velikov Date: 2020-03-24T10:21:26Z New Revision: 080d046c91d26bd3b0afba817cf5c2f99d1288ff URL: https://github.com/llvm/llvm-project/commit/080d046c91d26bd3b0afba817cf5c2f99d1288ff DIFF: https://github.com/llvm/llvm-project/commit/080d046c91d26bd3b0afba817cf5c2f99d1288ff.diff

[clang] 6081ccf - Apply function attributes through array declarators

Author: Momchil Velikov Date: 2020-03-23T11:03:13Z New Revision: 6081ccf4a3b6289717c8ae558ac210c36ddcbfbe URL: https://github.com/llvm/llvm-project/commit/6081ccf4a3b6289717c8ae558ac210c36ddcbfbe DIFF: https://github.com/llvm/llvm-project/commit/6081ccf4a3b6289717c8ae558ac210c36ddcbfbe.diff

[clang] da3f2b4 - [ARM][MVE] Fix a corner case of checking for MVE-I with -mfpu=none

Author: Momchil Velikov Date: 2020-02-11T12:03:41Z New Revision: da3f2b414ace1f24054ae9255f811b653d9cff99 URL: https://github.com/llvm/llvm-project/commit/da3f2b414ace1f24054ae9255f811b653d9cff99 DIFF: https://github.com/llvm/llvm-project/commit/da3f2b414ace1f24054ae9255f811b653d9cff99.diff

[clang] 3627c91 - [ARM][TargetParser] Improve handling of dependencies between target features

Author: Momchil Velikov Date: 2020-02-05T16:07:51Z New Revision: 3627c91ead934486fdb3986b911482a78f101309 URL: https://github.com/llvm/llvm-project/commit/3627c91ead934486fdb3986b911482a78f101309 DIFF: https://github.com/llvm/llvm-project/commit/3627c91ead934486fdb3986b911482a78f101309.diff

[clang] ac21535 - [ARM] Add documentation for -march= and -mfpu= command line options

Author: Momchil Velikov Date: 2020-01-29T10:39:01Z New Revision: ac215354607450191b9d63be72c00efe36b53a1c URL: https://github.com/llvm/llvm-project/commit/ac215354607450191b9d63be72c00efe36b53a1c DIFF: https://github.com/llvm/llvm-project/commit/ac215354607450191b9d63be72c00efe36b53a1c.diff

[clang] 173b711 - [ARM][MVE] MVE-I should not be disabled by -mfpu=none

Author: Momchil Velikov Date: 2020-01-09T14:03:25Z New Revision: 173b711e83d7b61a46f55eb44f03ea98f69a1dd6 URL: https://github.com/llvm/llvm-project/commit/173b711e83d7b61a46f55eb44f03ea98f69a1dd6 DIFF: https://github.com/llvm/llvm-project/commit/173b711e83d7b61a46f55eb44f03ea98f69a1dd6.diff

[clang] 600d123 - [ARM][CMSE] Add CMSE header and builtins

Author: Momchil Velikov Date: 2019-12-12T15:01:14Z New Revision: 600d123c6ff16180a20ebb9b55476257bf69513a URL: https://github.com/llvm/llvm-project/commit/600d123c6ff16180a20ebb9b55476257bf69513a DIFF: https://github.com/llvm/llvm-project/commit/600d123c6ff16180a20ebb9b55476257bf69513a.diff

[clang] aa6d48f - Implement target(branch-protection) attribute for AArch64

Author: Momchil Velikov Date: 2019-11-15T15:40:46Z New Revision: aa6d48fa70eb5d1769ea09ac0a2c4d956deeb06d URL: https://github.com/llvm/llvm-project/commit/aa6d48fa70eb5d1769ea09ac0a2c4d956deeb06d DIFF: https://github.com/llvm/llvm-project/commit/aa6d48fa70eb5d1769ea09ac0a2c4d956deeb06d.diff

r368697 - Enable memtag sanitizer in all AArch64 toolchains

Author: chill Date: Tue Aug 13 07:20:23 2019 New Revision: 368697 URL: http://llvm.org/viewvc/llvm-project?rev=368697=rev Log: Enable memtag sanitizer in all AArch64 toolchains That sanitizer does not have runtime library or other dependencies. Differential Revision:

r368696 - [AArch64] Make the memtag sanitizer require the memtag extension

Author: chill Date: Tue Aug 13 07:20:06 2019 New Revision: 368696 URL: http://llvm.org/viewvc/llvm-project?rev=368696=rev Log: [AArch64] Make the memtag sanitizer require the memtag extension ... or otherwise we get an ICE. Differential Revision: https://reviews.llvm.org/D65508 Modified:

r367428 - [AArch64] Add support for Transactional Memory Extension (TME)

Author: chill Date: Wed Jul 31 05:52:17 2019 New Revision: 367428 URL: http://llvm.org/viewvc/llvm-project?rev=367428=rev Log: [AArch64] Add support for Transactional Memory Extension (TME) Re-commit r366322 after some fixes TME is a future architecture technology, documented in

r366355 - Revert [AArch64] Add support for Transactional Memory Extension (TME)

Author: chill Date: Wed Jul 17 10:43:32 2019 New Revision: 366355 URL: http://llvm.org/viewvc/llvm-project?rev=366355=rev Log: Revert [AArch64] Add support for Transactional Memory Extension (TME) This reverts r366322 (git commit 4b8da3a503e434ddbc08ecf66582475765f449bc) Removed:

Re: [PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

Thanks, I've reverted it for now. From: Simon Pilgrim via Phabricator Sent: 17 July 2019 18:23:29 To: Momchil Velikov; oliver.stann...@linaro.org; t.p.northo...@gmail.com; jdoerf...@anl.gov Cc: llvm-...@redking.me.uk; notst...@gmail.com;

r366322 - [AArch64] Add support for Transactional Memory Extension (TME)

Author: chill Date: Wed Jul 17 06:23:27 2019 New Revision: 366322 URL: http://llvm.org/viewvc/llvm-project?rev=366322=rev Log: [AArch64] Add support for Transactional Memory Extension (TME) TME is a future architecture technology, documented in

r366315 - [AArch64] Consistent types and naming for AArch64 target features (NFC)

Author: chill Date: Wed Jul 17 04:24:37 2019 New Revision: 366315 URL: http://llvm.org/viewvc/llvm-project?rev=366315=rev Log: [AArch64] Consistent types and naming for AArch64 target features (NFC) Differential Revision: https://reviews.llvm.org/D64415 Committed as obvious. Modified:

r339766 - Use .cpp extension for certain tests instead of .cc

Author: chill Date: Wed Aug 15 05:22:08 2018 New Revision: 339766 URL: http://llvm.org/viewvc/llvm-project?rev=339766=rev Log: Use .cpp extension for certain tests instead of .cc The tests `CodeGen/aapcs[64]-align.cc` are not run since files with a `.cc` suffix aren't recognisze as tests. This

r338279 - [ARM, AArch64]: Use unadjusted alignment when passing composites as arguments

Author: chill Date: Mon Jul 30 10:48:23 2018 New Revision: 338279 URL: http://llvm.org/viewvc/llvm-project?rev=338279=rev Log: [ARM, AArch64]: Use unadjusted alignment when passing composites as arguments The "Procedure Call Procedure Call Standard for the ARM® Architecture"

r332843 - [Sema] Fix incorrect packed aligned structure layout

Author: chill Date: Mon May 21 07:28:43 2018 New Revision: 332843 URL: http://llvm.org/viewvc/llvm-project?rev=332843=rev Log: [Sema] Fix incorrect packed aligned structure layout Handle attributes before checking the record layout (e.g. underalignment check during `alignas` processing), as

r324900 - Re-commit r324490: [DebugInfo] Improvements to representation of enumeration types (PR36168)

Author: chill Date: Mon Feb 12 08:12:52 2018 New Revision: 324900 URL: http://llvm.org/viewvc/llvm-project?rev=324900=rev Log: Re-commit r324490: [DebugInfo] Improvements to representation of enumeration types (PR36168) Differential revision: https://reviews.llvm.org/D42736 Added:

r324508 - Revert [DebugInfo] Improvements to representation of enumeration types (PR36168)"

Author: chill Date: Wed Feb 7 11:57:04 2018 New Revision: 324508 URL: http://llvm.org/viewvc/llvm-project?rev=324508=rev Log: Revert [DebugInfo] Improvements to representation of enumeration types (PR36168)" Revert due to breaking buildbots (LLDB tests) Removed:

r324490 - [DebugInfo] Improvements to representation of enumeration types (PR36168)

Author: chill Date: Wed Feb 7 08:52:02 2018 New Revision: 324490 URL: http://llvm.org/viewvc/llvm-project?rev=324490=rev Log: [DebugInfo] Improvements to representation of enumeration types (PR36168) This patch: * fixes an incorrect sign-extension of unsigned values, when emitting debug info

r310616 - Place implictly declared functions at block scope

Author: chill Date: Thu Aug 10 08:43:06 2017 New Revision: 310616 URL: http://llvm.org/viewvc/llvm-project?rev=310616=rev Log: Place implictly declared functions at block scope Such implicitly declared functions behave as if the enclosing block contained the declaration extern int name() (C90,

[libunwind] r308871 - [libunwind] Handle .ARM.exidx tables without sentinel last entry

Author: chill Date: Mon Jul 24 02:19:32 2017 New Revision: 308871 URL: http://llvm.org/viewvc/llvm-project?rev=308871=rev Log: [libunwind] Handle .ARM.exidx tables without sentinel last entry UnwindCursor::getInfoFromEHABISection assumes the last entry in the index table never corresponds

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