dtcxzyw wrote:
Compile-time impact:
http://llvm-compile-time-tracker.com/compare.php?from=f0fad9f3e00dbe8e58024d1c98e36b7b9b1b17a9=f01369d38b67364b5c35bf87984f813a53ce18d1=instructions%3Au
https://github.com/llvm/llvm-project/pull/98746
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dtcxzyw wrote:
Please update this line :)
https://github.com/llvm/llvm-project/blob/90569e02e63ff5d0915446919f564e9b3638fe2a/llvm/lib/TargetParser/Host.cpp#L2070
https://github.com/llvm/llvm-project/pull/99898
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@@ -2799,9 +2799,37 @@ CodeGenFunction::EmitLoadOfReference(LValue RefLVal,
llvm::LoadInst *Load =
Builder.CreateLoad(RefLVal.getAddress(), RefLVal.isVolatile());
CGM.DecorateInstructionWithTBAA(Load, RefLVal.getTBAAInfo());
- return
@@ -1,8 +1,8 @@
// RUN: %clang_cc1 -emit-llvm -triple %itanium_abi_triple -o - %s -O2 |
FileCheck %s
-// Make sure the call to b() doesn't get optimized out.
+// Make sure the call to b() is eliminated.
extern struct x {char& x,y;}y;
int b();
int a() { if (!) b(); }
https://github.com/dtcxzyw ready_for_review
https://github.com/llvm/llvm-project/pull/98746
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dtcxzyw wrote:
I don't see any performance benefits based on IR diff or instruction count.
Changes on code size are mainly affected by JumpThreading/Inlining.
But I don't object to propagating more attributes if the compile-time impact is
negligible :)
https://github.com/dtcxzyw closed
https://github.com/llvm/llvm-project/pull/94352
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https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/20] [RISCV] Add support for getHostCPUFeatures using
hwprobe
@@ -290,8 +290,24 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList
,
// 2. Get march (isa string) based on `-mcpu=`
if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+if (CPU ==
dtcxzyw wrote:
Ping @wangpc-pp @topperc @preames
https://github.com/llvm/llvm-project/pull/94352
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https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/19] [RISCV] Add support for getHostCPUFeatures using
hwprobe
dtcxzyw wrote:
```
dtcxzyw@bananapif3:/data/llvm-build$ bin/clang -mcpu=native
--print-enabled-extensions
clang version 19.0.0git
Target: riscv64-unknown-linux-gnu
Thread model: posix
InstalledDir: /data/llvm-build/bin
Build config: +assertions
Extensions enabled for the given RISC-V target
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/18] [RISCV] Add support for getHostCPUFeatures using
hwprobe
dtcxzyw wrote:
I will rebase on the top of https://github.com/llvm/llvm-project/pull/97824.
https://github.com/llvm/llvm-project/pull/94352
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https://github.com/dtcxzyw approved this pull request.
LGTM. Thank you!
https://github.com/llvm/llvm-project/pull/98207
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https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/17] [RISCV] Add support for getHostCPUFeatures using
hwprobe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/16] [RISCV] Add support for getHostCPUFeatures using
hwprobe
@@ -116,6 +115,44 @@ void llvm::riscvExtensionsHelp(StringMap
DescMap) {
"For example, clang -march=rv32i_v1p0\n";
}
+void RISCVISAInfo::printEnabledExtensions(
+bool IsRV64, std::set ,
+StringMap ) {
+ outs() << "Extensions enabled for the given RISC-V
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/97965
See the discussion in
https://github.com/llvm/llvm-project/pull/94352#discussion_r1657074801
>From 21a8c00e8276f0ea4fa5c52296b257b8d113b947 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Mon, 8 Jul 2024
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/14] [RISCV] Add support for getHostCPUFeatures using
hwprobe
dtcxzyw wrote:
> This patch is motivated by an internal benchmark where there were some cases
> where this helped, though even that case is in some sense artificial.
It is ok to optimize some pattern in proxy apps/benchmarks :)
> Is this a necessary criteria for landing this change?
As
dtcxzyw wrote:
Can you add some tests to demonstrate that this patch will enable more
optimizations in some real-world applications?
https://github.com/llvm/llvm-project/pull/97762
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@@ -1549,30 +1549,10 @@ define amdgpu_kernel void
@multiple_uses_fneg_select_f64(double %x, double %y, i
define amdgpu_kernel void @fnge_select_f32_multi_use_regression(float %.i2369)
{
; GCN-LABEL: fnge_select_f32_multi_use_regression:
; GCN: ; %bb.0: ; %.entry
-;
@@ -290,8 +290,24 @@ StringRef riscv::getRISCVArch(const llvm::opt::ArgList
,
// 2. Get march (isa string) based on `-mcpu=`
if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+if (CPU == "native")
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/13] [RISCV] Add support for getHostCPUFeatures using
hwprobe
@@ -290,8 +290,24 @@ StringRef riscv::getRISCVArch(const llvm::opt::ArgList
,
// 2. Get march (isa string) based on `-mcpu=`
if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+if (CPU == "native")
@@ -83,8 +83,14 @@ void riscv::getRISCVTargetFeatures(const Driver , const
llvm::Triple ,
// and other features (ex. mirco architecture feature) from mcpu
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+
@@ -83,8 +83,14 @@ void riscv::getRISCVTargetFeatures(const Driver , const
llvm::Triple ,
// and other features (ex. mirco architecture feature) from mcpu
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/12] [RISCV] Add support for getHostCPUFeatures using
hwprobe
dtcxzyw wrote:
> Does that mean it has a negative net effect, or its neutral
It is neutral.
> (in which case the original motivating case should be enough).
But this patch may have an impact on compile time.
https://github.com/llvm/llvm-project/pull/96620
dtcxzyw wrote:
> This patch causes some significant performance regressions on llvm-test-suite
> (rv64gc-O3-thinlto):
>
> Name Before After Ratio
> SingleSource/Benchmarks/Shootout/Shootout-random 2.150161677
> 3.300161641 + 53.5%
>
@@ -83,8 +83,14 @@ void riscv::getRISCVTargetFeatures(const Driver , const
llvm::Triple ,
// and other features (ex. mirco architecture feature) from mcpu
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+
@@ -2002,6 +2003,76 @@ bool sys::getHostCPUFeatures(StringMap ) {
return true;
}
+#elif defined(__linux__) && defined(__riscv)
+// struct riscv_hwprobe
+struct RISCVHwProbe {
+ int64_t Key;
+ uint64_t Value;
+};
+bool sys::getHostCPUFeatures(StringMap ) {
+ RISCVHwProbe
dtcxzyw wrote:
Any thoughts? Hopefully I can catch up with the 19 release :)
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@@ -2002,6 +2003,76 @@ bool sys::getHostCPUFeatures(StringMap ) {
return true;
}
+#elif defined(__linux__) && defined(__riscv)
+// struct riscv_hwprobe
+struct RISCVHwProbe {
+ int64_t Key;
+ uint64_t Value;
+};
+bool sys::getHostCPUFeatures(StringMap ) {
+ RISCVHwProbe
@@ -2002,6 +2003,76 @@ bool sys::getHostCPUFeatures(StringMap ) {
return true;
}
+#elif defined(__linux__) && defined(__riscv)
+// struct riscv_hwprobe
+struct RISCVHwProbe {
+ int64_t Key;
+ uint64_t Value;
+};
+bool sys::getHostCPUFeatures(StringMap ) {
+ RISCVHwProbe
https://github.com/dtcxzyw edited
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@@ -2002,6 +2003,76 @@ bool sys::getHostCPUFeatures(StringMap ) {
return true;
}
+#elif defined(__linux__) && defined(__riscv)
+// struct riscv_hwprobe
+struct RISCVHwProbe {
+ int64_t Key;
+ uint64_t Value;
+};
+bool sys::getHostCPUFeatures(StringMap ) {
+ RISCVHwProbe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/11] [RISCV] Add support for getHostCPUFeatures using
hwprobe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 01/10] [RISCV] Add support for getHostCPUFeatures using
hwprobe
https://github.com/dtcxzyw closed
https://github.com/llvm/llvm-project/pull/96465
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@@ -365,24 +365,30 @@
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ZFHMIN %s
// RV32-ZFHMIN: "-target-feature" "+zfhmin"
-// RUN: not %clang --target=riscv32-unknown-elf -march=rv32iztso -### %s \
+// RUN: not %clang --target=riscv32-unknown-elf
dtcxzyw wrote:
See https://github.com/llvm/llvm-project/pull/96465
https://github.com/llvm/llvm-project/pull/94352
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https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/96465
Ztso 1.0 was ratified in January 2023.
Documentation:
https://github.com/riscv/riscv-isa-manual/blob/main/src/ztso-st-ext.adoc
>From 34670ab55ccecb1a2c7d92f809c9cae0df4150c6 Mon Sep 17 00:00:00 2001
From:
dtcxzyw wrote:
> > I have no idea about why it corrupts StringMap. Sad :(
> >
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 1/9] [RISCV] Add support for getHostCPUFeatures using hwprobe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 1/8] [RISCV] Add support for getHostCPUFeatures using hwprobe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 1/7] [RISCV] Add support for getHostCPUFeatures using hwprobe
@@ -1571,7 +1571,9 @@ StringRef sys::getHostCPUName() {
#if defined(__linux__)
std::unique_ptr P = getProcCpuinfoContent();
StringRef Content = P ? P->getBuffer() : "";
- return detail::getHostCPUNameForRISCV(Content);
+ StringRef Name =
dtcxzyw wrote:
I have no idea about why it corrupts StringMap. Sad :(
![image](https://github.com/llvm/llvm-project/assets/15650457/fd427068-6ca0-4ecb-a340-48c51e5629a6)
https://github.com/llvm/llvm-project/pull/94352
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https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 1/6] [RISCV] Add support for getHostCPUFeatures using hwprobe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 1/5] [RISCV] Add support for getHostCPUFeatures using hwprobe
dtcxzyw wrote:
> Any progress? It would be helpful for me to avoid reviewing tons of diff in
> https://github.com/dtcxzyw/llvm-opt-benchmark/pulls :)
>
> Can you resolve merge conflicts first?
Emm, as this pass is very time-consuming (even longer than -O3), I plan to
create a simpler one for
dtcxzyw wrote:
> > > I would also try to add this pass at the end of the clang pipeline and
> > > run llvm-test-suite to verify that the normalization this does is indeed
> > > semantics-preserving.
> >
> >
> > I'm running into some linking errors when trying to build
> >
dtcxzyw wrote:
> Hi @dtcxzyw, thanks for reaching out!
>
> This MR is blocked because I cannot reproduce the failures @nikic found
> [here](https://github.com/llvm/llvm-project/pull/68176#issuecomment-1836365664).
> (See [this
>
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dtcxzyw wrote:
Any progress? It would be helpful for me to avoid reviewing tons of diff in
https://github.com/dtcxzyw/llvm-opt-benchmark/pulls :)
Can you resolve merge conflicts first?
https://github.com/llvm/llvm-project/pull/68176
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dtcxzyw wrote:
> > You also need to remove the use of this pass (for testing purposes) from
> > clang-tools-extra.
>
> Done, thanks!
>
> I don't understand why CI still fails:
>
> ```shell
> Total Discovered Tests: 60135
> --
> | Skipped :15 (0.02%)
> | Unsupported :
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https://github.com/llvm/llvm-project/pull/95163
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dtcxzyw wrote:
Conflicting files
> llvm/docs/ReleaseNotes.rst
https://github.com/llvm/llvm-project/pull/93952
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https://github.com/dtcxzyw approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/95126
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dtcxzyw wrote:
See
https://github.com/llvm/llvm-project/commit/51e459a561519c8d51e2b4cadddc0d1f99c8b7ef:
> This causes some non-trivial text size increases in unoptimized builds for
> Bullet. Revert while I investigate.
Can you double check this?
@@ -86,8 +86,14 @@ void riscv::getRISCVTargetFeatures(const Driver , const
llvm::Triple ,
// and other features (ex. mirco architecture feature) from mcpu
if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) {
StringRef CPU = A->getValue();
-if (CPU == "native")
+
@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
https://github.com/dtcxzyw edited
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@@ -1998,6 +1998,66 @@ bool sys::getHostCPUFeatures(StringMap ) {
return true;
}
+#elif defined(__linux__) && defined(__riscv)
+// struct riscv_hwprobe
+struct RISCVHwProbe {
+ int64_t Key;
+ uint64_t Value;
+};
+bool sys::getHostCPUFeatures(StringMap ) {
+ RISCVHwProbe
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/94352
>From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 4 Jun 2024 21:08:27 +0800
Subject: [PATCH 1/4] [RISCV] Add support for getHostCPUFeatures using hwprobe
https://github.com/dtcxzyw approved this pull request.
LGTM. But I think it needs a double check by spacemit staffs.
https://github.com/llvm/llvm-project/pull/94564
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@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
+
dtcxzyw wrote:
cc @zengdage
https://github.com/llvm/llvm-project/pull/94564
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https://github.com/dtcxzyw commented:
Can you also update `llvm/docs/ReleaseNotes.rst` ?
https://github.com/llvm/llvm-project/pull/93952
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https://github.com/dtcxzyw approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/93823
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https://github.com/dtcxzyw commented:
> because the DL-aware constant folding will take care of this anyway.
Can you point out where we do this fold?
> I've only kept the straightforward zero-index case, where we just concatenate
> two GEPs.
Is there a test for this case?
@@ -1352,20 +1352,43 @@ static void AddParamAndFnBasicAttributes(const CallBase
,
auto = CalledFunction->getContext();
// Collect valid attributes for all params.
- SmallVector ValidParamAttrs;
+ SmallVector ValidObjParamAttrs, ValidExactParamAttrs;
bool
@@ -1352,20 +1352,43 @@ static void AddParamAndFnBasicAttributes(const CallBase
,
auto = CalledFunction->getContext();
// Collect valid attributes for all params.
- SmallVector ValidParamAttrs;
+ SmallVector ValidObjParamAttrs, ValidExactParamAttrs;
bool
@@ -1383,15 +1406,54 @@ static void AddParamAndFnBasicAttributes(const CallBase
,
AttributeList AL = NewInnerCB->getAttributes();
for (unsigned I = 0, E = InnerCB->arg_size(); I < E; ++I) {
// Check if the underlying value for the parameter is an argument.
@@ -1352,20 +1352,43 @@ static void AddParamAndFnBasicAttributes(const CallBase
,
auto = CalledFunction->getContext();
// Collect valid attributes for all params.
- SmallVector ValidParamAttrs;
+ SmallVector ValidObjParamAttrs, ValidExactParamAttrs;
bool
https://github.com/dtcxzyw commented:
Oops I forgot to submit my review comment :(
https://github.com/llvm/llvm-project/pull/91101
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https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/91101
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=?utf-8?b?6YOd5bq36L6+?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,1489 @@
+//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*-
tablegen -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See
=?utf-8?b?6YOd5bq36L6+?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,1489 @@
+//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*-
tablegen -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See
=?utf-8?b?6YOd5bq36L6+?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,1489 @@
+//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*-
tablegen -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See
=?utf-8?b?6YOd5bq36L6+?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,1489 @@
+//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*-
tablegen -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See
=?utf-8?b?6YOd5bq36L6+?=
Message-ID:
In-Reply-To:
@@ -378,3 +378,31 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
https://github.com/dtcxzyw closed
https://github.com/llvm/llvm-project/pull/88776
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@@ -378,3 +378,30 @@ def XIANGSHAN_NANHU :
RISCVProcessorModel<"xiangshan-nanhu",
TuneZExtHFusion,
TuneZExtWFusion,
TuneShiftedZExtWFusion]>;
dtcxzyw wrote:
> Isn't the warning about a mismatch between declaration and definition, not
> call args? The InstCombine change does make the definition and declaration
> match.
> […](#)
> On Fri, Apr 19, 2024, at 17:07, Mehdi Amini wrote: ***@***. commented on
> this pull request. In
@@ -433,7 +433,7 @@ class LLVM_LIBRARY_VISIBILITY InstCombinerImpl final
Value *foldAndOrOfICmpsOfAndWithPow2(ICmpInst *LHS, ICmpInst *RHS,
Instruction *CxtI, bool IsAnd,
bool IsLogical = false);
-
https://github.com/dtcxzyw requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/89294
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https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/89294
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@@ -1964,11 +1964,25 @@ Instruction *InstCombinerImpl::visitFPToSI(FPToSIInst
) {
}
Instruction *InstCombinerImpl::visitUIToFP(CastInst ) {
- return commonCastTransforms(CI);
+ if (Instruction *R = commonCastTransforms(CI))
+return R;
+ if (!CI.hasNonNeg() &&
https://github.com/dtcxzyw closed
https://github.com/llvm/llvm-project/pull/85863
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dtcxzyw wrote:
> Looks like the clang build is failing again?
Done.
https://github.com/llvm/llvm-project/pull/85863
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