agozillon wrote:
Small ping for some reviewer attention please, if at all possible on this PR
stack! :-) thank you very much in advance!
https://github.com/llvm/llvm-project/pull/96266
___
llvm-branch-commits mailing list
https://github.com/shawbyoung edited
https://github.com/llvm/llvm-project/pull/96596
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/9] Added call to matchWithCallsAsAnchors
Created using spr
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/8] Added call to matchWithCallsAsAnchors
Created using spr
aaupov wrote:
It's not. I landed to main manually.
https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dcci wrote:
is this the correct destination branch?
https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/aaupov closed https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dcci wrote:
Maybe you can add a comment to the title explaining *why* we're removing it.
https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://github.com/dcci approved this pull request.
Thanks for measuring the impact and removing this code, Amir.
https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
vikramRH wrote:
> > > > [AMDGPU] Enable atomic optimizer for divergent i64 and double values
> > >
> > >
> > > Needs some i64 tests
> >
> >
> > added new i64 tests, however I see there currently exists an issue with DPP
> > path where dpp combine partially fuses the mov_dpp pieces causing
arsenm wrote:
> > > [AMDGPU] Enable atomic optimizer for divergent i64 and double values
> >
> >
> > Needs some i64 tests
>
> added new i64 tests, however I see there currently exists an issue with DPP
> path where dpp combine partially fuses the mov_dpp pieces causing machine CSE
> crash.
vikramRH wrote:
> > [AMDGPU] Enable atomic optimizer for divergent i64 and double values
>
> Needs some i64 tests
added new i64 tests, however I see there currently exists an issue with DPP
path where dpp combine partially fuses the mov_dpp pieces causing machine CSE
crash. I have proposed
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
vikramRH wrote:
updated, thanks
https://github.com/llvm/llvm-project/pull/96934
@@ -230,8 +245,7 @@ void
AMDGPUAtomicOptimizerImpl::visitAtomicRMWInst(AtomicRMWInst ) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigned
https://github.com/smithp35 commented:
I agree with jh7370 that it would be good to extract the decoding logic, it
seems like each tool needs some way of passing in a way to step through the
data, return the decoded data, and a way of storing errors. It is possible that
this will end up being
@@ -2687,6 +2687,15 @@ void Dumper::printRelocations() {
<< "VALUE\n";
for (SectionRef Section : P.second) {
+ // CREL requires decoding and has its specific errors.
smithp35 wrote:
I recommend
```
// CREL sections require decoding, each
https://github.com/smithp35 edited
https://github.com/llvm/llvm-project/pull/97382
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1453,6 +1525,15 @@ template bool
ELFObjectFile::isRelocatableObject() const {
return EF.getHeader().e_type == ELF::ET_REL;
}
+template
+StringRef ELFObjectFile::getCrelError(DataRefImpl Sec) const {
+ uintptr_t SHT =
@@ -292,6 +295,11 @@ template class ELFObjectFile : public
ELFObjectFileBase {
const Elf_Shdr *DotSymtabSec = nullptr; // Symbol table section.
const Elf_Shdr *DotSymtabShndxSec = nullptr; // SHT_SYMTAB_SHNDX section.
+ // Hold CREL relocations for
@@ -2687,6 +2687,15 @@ void Dumper::printRelocations() {
<< "VALUE\n";
for (SectionRef Section : P.second) {
+ // CREL requires decoding and has its specific errors.
+ if (O.isELF() && ELFSectionRef(Section).getType() == ELF::SHT_CREL) {
+
5chmidti wrote:
Thanks.
> ... how this impacts build times for Clang itself? I'm assuming that if
> ASTMatchers.h isn't modified, CMake won't re-run
> generate_ast_matcher_doc_tests.py and so the compile time performance hit is
> only on full rebuilds or when changing the header?
The
@@ -1022,6 +1033,47 @@ ELFObjectFile::section_rel_begin(DataRefImpl Sec)
const {
uintptr_t SHT = reinterpret_cast((*SectionsOrErr).begin());
RelData.d.a = (Sec.p - SHT) / EF.getHeader().e_shentsize;
RelData.d.b = 0;
+ if (reinterpret_cast(Sec.p)->sh_type ==
https://github.com/MaskRay approved this pull request.
https://github.com/llvm/llvm-project/pull/97383
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-clang
@llvm/pr-subscribers-clang-driver
Author: Pengcheng Wang (wangpc-pp)
Changes
The format of dynamic linker is `ld-linux-{arch}-{abi}.so.1`, so
we can just get the arch name from arch type.
---
Full diff:
https://github.com/wangpc-pp created
https://github.com/llvm/llvm-project/pull/97383
The format of dynamic linker is `ld-linux-{arch}-{abi}.so.1`, so
we can just get the arch name from arch type.
___
llvm-branch-commits mailing list
llvmbot wrote:
@llvm/pr-subscribers-llvm-binary-utilities
Author: Fangrui Song (MaskRay)
Changes
The decoder code is similar to that for llvm-readelf -r (#91280).
Because the section representation of LLVMObject (`SectionRef`) is
64-bit, insufficient to hold all decoder states,
https://github.com/MaskRay created
https://github.com/llvm/llvm-project/pull/97382
The decoder code is similar to that for llvm-readelf -r (#91280).
Because the section representation of LLVMObject (`SectionRef`) is
64-bit, insufficient to hold all decoder states, `section_rel_begin` is
llvmbot wrote:
@llvm/pr-subscribers-bolt
Author: Amir Ayupov (aaupov)
Changes
9d0754ada5dbbc0c009bcc2f7824488419cc5530 dropped MC support required for
macro-fusion alignment in BOLT. Remove the support in BOLT.
Test Plan:
macro-fusion alignment was never upstreamed, so no upstream tests
https://github.com/aaupov ready_for_review
https://github.com/llvm/llvm-project/pull/97358
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap ,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap ,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap ,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
@@ -1084,10 +1084,76 @@ static void
mergeArch(RISCVISAUtils::OrderedExtensionMap ,
}
}
+static void mergeAtomic(DenseMap::iterator it,
+const InputSectionBase *oldSection,
+const InputSectionBase *newSection,
+
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/97358
9d0754ada5dbbc0c009bcc2f7824488419cc5530 dropped MC support required for
macro-fusion alignment in BOLT. Remove the support in BOLT.
Test Plan:
macro-fusion alignment was never upstreamed, so no upstream tests
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/7] Added call to matchWithCallsAsAnchors
Created using spr
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/97347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
llvmbot wrote:
@llvm/pr-subscribers-lld
@llvm/pr-subscribers-lld-elf
Author: Paul Kirth (ilovepi)
Changes
This patch adds support for merging the atomic_abi attribute, specifid in
https://github.com/ilovepi created
https://github.com/llvm/llvm-project/pull/97347
This patch adds support for merging the atomic_abi attribute, specifid in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version,
to LLD.
The
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/97110
>From 2d25e0d32672ecae3dc3ad42c50446e651eceb06 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 28 Jun 2024 15:27:42 -0500
Subject: [PATCH 1/2] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-
@@ -747,105 +747,79 @@ void clang::getOpenMPCaptureRegions(
assert(unsigned(DKind) < llvm::omp::Directive_enumSize);
assert(isOpenMPCapturingDirective(DKind) && "Expecting capturing directive");
- switch (DKind) {
- case OMPD_metadirective:
-
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 1/6] Added call to matchWithCallsAsAnchors
Created using spr
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
>From 788f58b302f20a000db3a9741e54cc861c9dcb88 Mon Sep 17 00:00:00 2001
From: Paul Kirth
Date: Mon, 1 Jul 2024 10:13:23 -0700
Subject: [PATCH] Fix mismerge
Created using spr 1.3.4
---
lld/ELF/Arch/RISCV.cpp
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/ilovepi updated
https://github.com/llvm/llvm-project/pull/90267
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/kparzysz updated
https://github.com/llvm/llvm-project/pull/97110
>From 2d25e0d32672ecae3dc3ad42c50446e651eceb06 Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Fri, 28 Jun 2024 15:27:42 -0500
Subject: [PATCH] [clang][OpenMP] Rewrite `getOpenMPCaptureRegions` in term
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
arsenm wrote:
How about isLegalCrossLaneType?
https://github.com/llvm/llvm-project/pull/96934
@@ -3480,6 +3480,31 @@ DiagnosedSilenceableFailure
transform::MapCopyToThreadsOp::applyToOne(
return DiagnosedSilenceableFailure::success();
}
+//===--===//
+// WinogradConv2DOp
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder ) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(loc,
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder ) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(loc,
@@ -2638,4 +2638,41 @@ def WinogradConv2DOp : Op {
+ let description = [{
+Decompose winograd operators. It will convert filter, input and output
+transform operators into a combination of scf, tensor, and linalg
Hsiangkai wrote:
Done.
@@ -2760,6 +2760,89 @@ LogicalResult WinogradFilterTransformOp::verify() {
return success();
}
+SmallVector
+WinogradFilterTransformOp::getIterationDomain(OpBuilder ) {
+ Location loc = getLoc();
+ Value zero = builder.create(loc, 0);
+ Value one = builder.create(loc,
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+
@@ -867,13 +867,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+
@@ -1700,19 +1725,30 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo ,
case 8:
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
- case S_LOAD_IMM:
+ case S_LOAD_IMM: {
+// If XNACK is enabled, use the constrained opcodes when the first
@@ -1212,8 +1228,17 @@ void SILoadStoreOptimizer::copyToDestRegs(
// Copy to the old destination registers.
const MCInstrDesc = TII->get(TargetOpcode::COPY);
- const auto *Dest0 = TII->getNamedOperand(*CI.I, OpName);
- const auto *Dest1 =
@@ -1700,19 +1725,30 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const
CombineInfo ,
case 8:
return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM;
}
- case S_LOAD_IMM:
+ case S_LOAD_IMM: {
+// If XNACK is enabled, use the constrained opcodes when the first
jayfoad wrote:
> [AMDGPU] Enable atomic optimizer for divergent i64 and double values
Needs some i64 tests
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigned
@@ -230,8 +245,7 @@ void
AMDGPUAtomicOptimizerImpl::visitAtomicRMWInst(AtomicRMWInst ) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent
@@ -313,8 +327,7 @@ void
AMDGPUAtomicOptimizerImpl::visitIntrinsicInst(IntrinsicInst ) {
// value to the atomic calculation. We can only optimize divergent values if
// we have DPP available on our subtarget, and the atomic operation is 32
// bits.
- if (ValDivergent
arsenm wrote:
### Merge activity
* **Jul 1, 6:08 AM EDT**: @arsenm started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/97180).
https://github.com/llvm/llvm-project/pull/97180
arsenm wrote:
### Merge activity
* **Jul 1, 6:08 AM EDT**: @arsenm started a stack merge that includes this pull
request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/97151).
https://github.com/llvm/llvm-project/pull/97151
https://github.com/jayfoad approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/97151
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -17565,6 +17565,12 @@ SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
if (CanCombineFCOPYSIGN_EXTEND_ROUND(N))
return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), VT, N0, N1.getOperand(0));
+ // We only take the sign bit from the sign operand.
+ EVT SignVT =
https://github.com/jayfoad edited
https://github.com/llvm/llvm-project/pull/97151
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/skatrak updated
https://github.com/llvm/llvm-project/pull/92524
>From 95d6f3446201d2b3162b694887e3fd888b628e96 Mon Sep 17 00:00:00 2001
From: Sergio Afonso
Date: Fri, 17 May 2024 11:38:36 +0100
Subject: [PATCH] [Flang][OpenMP] Update flang with changes to the OpenMP
dialect
@@ -178,6 +178,21 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool isOptimizableAtomic(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+unsigned
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
+ switch (Ty->getTypeID()) {
+ case Type::FloatTyID:
+ case Type::DoubleTyID:
+return true;
+ case Type::IntegerTyID: {
+if
https://github.com/vikramRH edited
https://github.com/llvm/llvm-project/pull/96934
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -178,6 +178,20 @@ bool AMDGPUAtomicOptimizerImpl::run(Function ) {
return Changed;
}
+static bool shouldOptimizeForType(Type *Ty) {
vikramRH wrote:
Any better suggestions ?
https://github.com/llvm/llvm-project/pull/96934
Author: Ryotaro KASUGA
Date: 2024-07-01T16:06:24+09:00
New Revision: dc041f77964ed3a93bae5568e18f9186acc265b4
URL:
https://github.com/llvm/llvm-project/commit/dc041f77964ed3a93bae5568e18f9186acc265b4
DIFF:
Author: David Spickett
Date: 2024-07-01T07:45:18+01:00
New Revision: 7e4a2ec169290640c2f16811bae9e1ad82ba2c5f
URL:
https://github.com/llvm/llvm-project/commit/7e4a2ec169290640c2f16811bae9e1ad82ba2c5f
DIFF:
Author: Ryotaro KASUGA
Date: 2024-07-01T10:13:35+09:00
New Revision: 4beed3ff573e195033450f4082868d95859c3d3c
URL:
https://github.com/llvm/llvm-project/commit/4beed3ff573e195033450f4082868d95859c3d3c
DIFF:
301 - 400 of 21975 matches
Mail list logo
