Current design has per-crtc-plane model.
As a result, for asic's that support underlay,
are unable to expose it to user space for modesetting.
To enable this, the drm driver intialisation now runs
for number of surfaces instead of stream/crtc.
This patch plumbs surface capabilities to drm framewo
I would like to use this letter to explain what this patche does.
(Note its tested on Carrizo & Stoney)
* Firstly it decouples the per-plane per-crtc design, as a result,
now with the unit test called as 'modetest' we can see 3 planes
and 2 crtc's compared to what it was 2 planes for 2 crtc's
update_plane() and disable_plane() functions
assoiciated with setting plane are called
without any check, causing kernel panic.
This patch adds the required check to avoid it.
Change-Id: I0d6792608b33e674c217388aa57c4b7d680d9bc7
Signed-off-by: Shirish S
---
drivers/gpu/drm/drm_plane.c | 6 +
On 17/03/17 04:51 PM, Shirish S wrote:
> I would like to use this letter to explain what this patche does.
> (Note its tested on Carrizo & Stoney)
>
> * Firstly it decouples the per-plane per-crtc design, as a result,
> now with the unit test called as 'modetest' we can see 3 planes
> and 2 cr
Am 17.03.2017 um 03:35 schrieb Zhou, David(ChunMing):
Hi Christian, Andres,
I understand your mean, especially high priority queue from Andres is
for VR, which is liking an engine to himself, but our scheduler is a
generic thing, which is used by multiple case.
From scheduler perspective, sche
On Fri, Mar 17, 2017 at 1:37 PM, Michel Dänzer wrote:
>
> On 17/03/17 04:51 PM, Shirish S wrote:
> > I would like to use this letter to explain what this patche does.
> > (Note its tested on Carrizo & Stoney)
> >
> > * Firstly it decouples the per-plane per-crtc design, as a result,
> > now with
On Fri, Mar 17, 2017 at 01:25:08PM +0530, Shirish S wrote:
> update_plane() and disable_plane() functions
> assoiciated with setting plane are called
> without any check, causing kernel panic.
Why are you registering a plane without the funcs?
>
> This patch adds the required check to avoid it.
Michel Dänzer wrote:
I'm pleased to announce the 1.3.0 release of xf86-video-amdgpu,
Highlights:
* Allow TearFree to be toggled at runtime via an RandR output property
"TearFree". The xorg.conf option "TearFree" now controls the default
value of the output properties.
Nice feature. Min
On Fri, Mar 17, 2017 at 3:26 PM, Ville Syrjälä
wrote:
> On Fri, Mar 17, 2017 at 01:25:08PM +0530, Shirish S wrote:
>> update_plane() and disable_plane() functions
>> assoiciated with setting plane are called
>> without any check, causing kernel panic.
>
> Why are you registering a plane without th
On Fri, Mar 17, 2017 at 03:46:34PM +0530, Shirish S wrote:
> On Fri, Mar 17, 2017 at 3:26 PM, Ville Syrjälä
> wrote:
> > On Fri, Mar 17, 2017 at 01:25:08PM +0530, Shirish S wrote:
> >> update_plane() and disable_plane() functions
> >> assoiciated with setting plane are called
> >> without any chec
Hi,
On Mon, Mar 13, 2017 at 2:01 PM, Deucher, Alexander
wrote:
> > We are unable to boot Acer Aspire E5-553G (AMD FX-9800P RADEON R7) nor
> > Acer Aspire E5-523 with standard configurations because during boot
> > the screen is flooded with the following error message over and over:
> >
> > AMD
And also remove an errant one.
Signed-off-by: Tom St Denis
---
src/lib/discover_by_did.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/lib/discover_by_did.c b/src/lib/discover_by_did.c
index 271e8adce35d..2851eb3a8d86 100644
--- a/src/lib/discover_by_did.c
+++ b/src/
Signed-off-by: Tom St Denis
---
src/lib/discover_by_did.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/lib/discover_by_did.c b/src/lib/discover_by_did.c
index 2851eb3a8d86..d8f64a091863 100644
--- a/src/lib/discover_by_did.c
+++ b/src/lib/discover_by_did.c
@@ -110,6 +110,7 @@ static co
From: Colin Ian King
The outer loop is redundant and can be removed as it is doing nothing
useful. Also remove some commented out code that is not being used.
Detected by CoverityScan, CID#1402073
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 27 +++
On Thu, Mar 16, 2017 at 11:02 PM, Evan Quan wrote:
> Change-Id: I730eed1bca04725696cd086e9c6ba1a31bafd8a7
> Signed-off-by: Evan Quan
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Alex Deucher
> diff --git a/drivers/gpu/drm/amd/amdgpu/a
On Thu, 2017-03-16 at 14:34 -0400, Alex Deucher wrote:
> > On Thu, Mar 16, 2017 at 2:25 PM, Adam Jackson wrote:
> > Mostly a hack for LCDs that only claim one supported resolution and
> > desktop environments too chicken to let you set arbitrary modes from
> > the display control panel. Again, not
On Fri, Mar 17, 2017 at 8:15 AM, Daniel Drake wrote:
> Hi,
>
> On Mon, Mar 13, 2017 at 2:01 PM, Deucher, Alexander
> wrote:
>> > We are unable to boot Acer Aspire E5-553G (AMD FX-9800P RADEON R7) nor
>> > Acer Aspire E5-523 with standard configurations because during boot
>> > the screen is flood
Both DID patches:
Reviewed-by: Alex Deucher
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Friday, March 17, 2017 9:31 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH umr] add missing pola
On Fri, Mar 17, 2017 at 01:08:43PM +0200, Ville Syrjälä wrote:
> On Fri, Mar 17, 2017 at 03:46:34PM +0530, Shirish S wrote:
> > On Fri, Mar 17, 2017 at 3:26 PM, Ville Syrjälä
> > wrote:
> > > On Fri, Mar 17, 2017 at 01:25:08PM +0530, Shirish S wrote:
> > >> update_plane() and disable_plane() funct
On Fri, Mar 17, 2017 at 05:57:52PM +0100, Daniel Vetter wrote:
> On Fri, Mar 17, 2017 at 01:08:43PM +0200, Ville Syrjälä wrote:
> > On Fri, Mar 17, 2017 at 03:46:34PM +0530, Shirish S wrote:
> > > On Fri, Mar 17, 2017 at 3:26 PM, Ville Syrjälä
> > > wrote:
> > > > On Fri, Mar 17, 2017 at 01:25:08P
On Fri, Mar 17, 2017 at 10:37 AM, Colin King wrote:
> From: Colin Ian King
>
> The outer loop is redundant and can be removed as it is doing nothing
> useful. Also remove some commented out code that is not being used.
>
> Detected by CoverityScan, CID#1402073
>
> Signed-off-by: Colin Ian King
Previously we discussed some issues with applying the LRU mapping policy
to the SDMA engines. Mainly, if both ring ids end up aliased to the same
HW block, the total transfer bandwith an application can achieve will be
severely impacted. E.g. an app uses one SDMA ring for upload and one for
downloa
Depending on usage patterns, the current LRU policy may create a
non-injective mapping between userspace ring ids and kernel rings.
This behaviour is undesired as apps that attempt to fill all HW blocks
would be unable to reach some of them.
This change forces the LRU policy to create bijective m
Spreading the load across multiple SDMA engines can increase memory
transfer performance.
Signed-off-by: Andres Rodriguez
---
drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c
b/drivers
Re-enable GFX PG. It's working properly with MEC now that KIQ is
enabled.
This reverts commit e9ef19aa1bdeac380662a112f1d03a7c3477527f.
---
drivers/gpu/drm/amd/amdgpu/vi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/am
Ville Syrjälä writes:
> On Fri, Mar 17, 2017 at 05:57:52PM +0100, Daniel Vetter wrote:
>> On Fri, Mar 17, 2017 at 01:08:43PM +0200, Ville Syrjälä wrote:
>> > On Fri, Mar 17, 2017 at 03:46:34PM +0530, Shirish S wrote:
>> > > On Fri, Mar 17, 2017 at 3:26 PM, Ville Syrjälä
>> > > wrote:
>> > > > On
From: Eric Huang
Signed-off-by: Eric Huang
Signed-off-by: Samuel Li
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index eff123b..343b4b0
On 2017-03-17 03:55 AM, Shirish S wrote:
update_plane() and disable_plane() functions
assoiciated with setting plane are called
without any check, causing kernel panic.
This patch adds the required check to avoid it.
Change-Id: I0d6792608b33e674c217388aa57c4b7d680d9bc7
Signed-off-by: Shirish S
Patches is:
Reviewed-by: Samuel Li
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex
Deucher
Sent: Friday, March 17, 2017 3:29 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] Revert "drm/amd/amdgpu: Disable GF
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