Re: [PATCH 2/2] drm/amd/display: Prevent premature pageflip when comitting in vblank. (v3)

On 25/04/17 01:54 AM, Mario Kleiner wrote: > Make sure we do not program a hw pageflip inside vblank 'n' iff the > atomic flip is comitted while inside the same vblank 'n'. We must > defer such a flip by one refresh cycle to vblank 'n+1', unless this > is a DRM_MODE_PAGE_FLIP_ASYNC async pageflip,

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

On 22/04/17 02:05 AM, Felix Kuehling wrote: > __setup doesn't work in modules. Right. We could build something like drivers/video/fbdev/core/fb_cmdline.c:video_setup() into the kernel to handle this, but it's a bit ugly, which is one reason why I was leaning towards: > s8250_options is only comp

[PATCH] drm/amdgpu: validate shadow before restoring from it

Change-Id: Id925f4e241c4192127880d2017fbf2979aa09fc7 Signed-off-by: Roger.He --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 33 ++ 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Re: [PATCH] drm/amdgpu: validate shadow before restoring from it

On 2017年04月25日 11:14, Roger.He wrote: Change-Id: Id925f4e241c4192127880d2017fbf2979aa09fc7 Signed-off-by: Roger.He --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 33 ++ 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b

Re: [PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format

On 24/04/17 03:25 PM, Gerd Hoffmann wrote: > Return correct fourcc codes on bigendian. Drivers must be adapted to > this change. > > Signed-off-by: Gerd Hoffmann Just to reiterate, this won't work for the radeon driver, which programs the GPU to use (effectively, per the current definition that

Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On 25/04/17 10:12 AM, Michel Dänzer wrote: > On 24/04/17 10:03 PM, Ville Syrjälä wrote: >> On Mon, Apr 24, 2017 at 03:57:02PM +0900, Michel Dänzer wrote: >>> On 22/04/17 07:05 PM, Ville Syrjälä wrote: On Fri, Apr 21, 2017 at 06:14:31PM +0200, Gerd Hoffmann wrote: > Hi, > >>> My p

Re: [PATCH 1/2] drm/amdgpu: fix gpu reset crash

On 2017年04月24日 17:47, Christian König wrote: The root cause is some ring doesn't have scheduler, like KIQ ring Change-Id: I420e84add9cdd9a7fd1f9921b8a5d0afa3dd2058 Signed-off-by: Chunming Zhou Reviewed-by: Christian König for both. I forgot to add RB when pushing patches, How can I add i

Re: [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint

On 04/24/2017 04:56 PM, Christian König wrote: Am 24.04.2017 um 10:55 schrieb Christian König: Am 24.04.2017 um 08:43 schrieb Junwei Zhang: Signed-off-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) dif

Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On 24/04/17 10:03 PM, Ville Syrjälä wrote: > On Mon, Apr 24, 2017 at 03:57:02PM +0900, Michel Dänzer wrote: >> On 22/04/17 07:05 PM, Ville Syrjälä wrote: >>> On Fri, Apr 21, 2017 at 06:14:31PM +0200, Gerd Hoffmann wrote: Hi, >> My personal opinion is that formats in drm_fourcc.h sho

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

On 24/04/17 11:26 PM, Ville Syrjälä wrote: > On Mon, Apr 24, 2017 at 04:54:25PM +0900, Michel Dänzer wrote: >> On 24/04/17 04:36 PM, Gerd Hoffmann wrote: >>> > drm: fourcc byteorder: add DRM_FORMAT_CPU_* > drm: fourcc byteorder: add bigendian support to > drm_mode_legacy_fb_form

Re: [PATCH] LRU map compute/SDMA user ring ids to kernel ring ids v2

On Mon, Apr 24, 2017 at 11:36 AM, Andres Rodriguez wrote: > > > On 2017-04-24 11:25 AM, Alex Deucher wrote: >> >> On Mon, Apr 24, 2017 at 3:40 AM, Christian König >> wrote: >>> >>> I wanted to push that to our internal branch, but found that it doesn't >>> apply cleanly. So please rebase on alex

[PATCH 2/4] drm/amdgpu: Fix use of interruptible waiting 1. The signal interrupt can affect the expected behaviour. 2. There is no mechanism to handle the corresponding error.

Change-Id: I43f3b0b420833a02ad5ece3ddeef04c6512667e9 Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 0516

[PATCH 3/4] drm/amdgpu: Fix use of interruptible waiting 1. The signal interrupt can affect the expected behaviour. 2. There is no good mechanism to handle the corresponding error.

Change-Id: I43f3b0b420833a02ad5ece3ddeef04c6512667e9 Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 4d04af9..2

[PATCH 1/4] drm/amdgpu: Fix potential issue if reserve function is interrupted If amdgpu_bo_reserve function is interrupted by signal, amdgpu_bo_kunmap function is not called.

Change-Id: Ide2b3be6549b3afb8d6116094b5fff495b18addf Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index a09ad3cf..

[PATCH 1/2] drm/amdgpu: Real return value can be over-written when clean up

Change-Id: Ib69f035eeb213a1aec5025e0a9f4515065706118 Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.

[PATCH 2/2] drm/amdgpu: Fix use of interruptible waiting 1. The signal interrupt can affect the expected behaviour. 2. There is no good mechanism to handle the corresponding error. When signal interru

Change-Id: I6889a4d9dd2703bcf5d448d18f6af51c496a93c9 Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c ind

RE: [PATCH 2/2] drm/amd/display: Prevent premature pageflip when comitting in vblank. (v3)

> -Original Message- > From: Mario Kleiner [mailto:mario.kleiner...@gmail.com] > Sent: Monday, April 24, 2017 12:54 PM > To: dri-de...@lists.freedesktop.org > Cc: amd-gfx@lists.freedesktop.org; Grodzovsky, Andrey; > mario.kleiner...@gmail.com; Wentland, Harry; Deucher, Alexander; > Daenze

[PATCH 4/4] drm/amdgpu: Fix use of interruptible waiting 1. The signal interrupt can affect the expected behaviour. 2. There is no good mechanism to handle the corresponding error.

Change-Id: I504cc9c280c70fa832cb64e6a1e0f8b4a1f3cbfd Signed-off-by: Alex Xie --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 8f5db2d..e

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

On Mon, Apr 24, 2017 at 05:26:03PM +0300, Ville Syrjälä wrote: > On Mon, Apr 24, 2017 at 04:54:25PM +0900, Michel Dänzer wrote: > > On 24/04/17 04:36 PM, Gerd Hoffmann wrote: > > > > > >>> drm: fourcc byteorder: add DRM_FORMAT_CPU_* > > >>> drm: fourcc byteorder: add bigendian support to > > >

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

Hi, On 24 April 2017 at 15:26, Ville Syrjälä wrote: > On Mon, Apr 24, 2017 at 04:54:25PM +0900, Michel Dänzer wrote: >> On 24/04/17 04:36 PM, Gerd Hoffmann wrote: >> > When running in opengl mode there will be a hardware-specific mesa >> > driver in userspace, which will either know what the gpu

[PATCH 2/2] drm/amd/display: Prevent premature pageflip when comitting in vblank. (v3)

Make sure we do not program a hw pageflip inside vblank 'n' iff the atomic flip is comitted while inside the same vblank 'n'. We must defer such a flip by one refresh cycle to vblank 'n+1', unless this is a DRM_MODE_PAGE_FLIP_ASYNC async pageflip, which must always execute as soon as possible. Wit

RE: [PATCH] drm/amdgpu: fix s3 ring test failed on Vi caused by KIQ enabled.

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Rex Zhu > Sent: Monday, April 24, 2017 10:07 AM > To: amd-gfx@lists.freedesktop.org > Cc: Zhu, Rex > Subject: [PATCH] drm/amdgpu: fix s3 ring test failed on Vi caused by KIQ > enabled. > > co

[PATCH] Interface changes for prioritized contexts amd-staging-4.9

This patch has been rebased onto amd-staging-4.9. It would be useful to have this patch outside the drm-next-4.12-wip branch as it would unblock submission of the corresponding libdrm and mesa patches. Splitting this off as it is my understanding that drm-next-4.12-wip may take a while to land on

[PATCH] drm/amdgpu: add parameter to allocate high priority contexts v8

Add a new context creation parameter to express a global context priority. The priority ranking in descending order is as follows: * AMDGPU_CTX_PRIORITY_HIGH * AMDGPU_CTX_PRIORITY_NORMAL * AMDGPU_CTX_PRIORITY_LOW The driver will attempt to schedule work to the hardware according to the priorit

RE: [PATCH 08/11] drm/amdgpu/vce4: replaced with virt_alloc_mm_table

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang > Subject: [PATCH 08/11] drm/amdgpu/vce4: replaced with > virt_alloc_mm_table > >

RE: [PATCH 07/11] drm/amdgpu/virt: add two functions for MM table

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang > Subject: [PATCH 07/11] drm/amdgpu/virt: add two functions for MM table > > Add

RE: [PATCH 11/11] drm/amdgpu/uvd7: add UVD hw init sequences for sriov

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang; Min, Frank > Subject: [PATCH 11/11] drm/amdgpu/uvd7: add UVD hw init sequences fo

RE: [PATCH 09/11] drm/amdgpu/uvd7: add sriov uvd initialization sequences

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang; Min, Frank > Subject: [PATCH 09/11] drm/amdgpu/uvd7: add sriov uvd initialization

RE: [PATCH 06/11] drm/amdgpu/soc15: enable UVD code path for sriov

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang; Min, Frank > Subject: [PATCH 06/11] drm/amdgpu/soc15: enable UVD code path for sr

RE: [PATCH 05/11] drm/amdgpu/vce4: move mm table constructions functions into mmsch header file

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang; Min, Frank > Subject: [PATCH 05/11] drm/amdgpu/vce4: move mm table constructions

RE: [PATCH 04/11] drm/amdgpu/vce4: fix a PSP loading VCE issue

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Wang, Daniel(Xiaowei); Yu, Xiangliang > Subject: [PATCH 04/11] drm/amdgpu/vce4: fix a PSP loading

RE: [PATCH 02/11] drm/amdgpu/virt: change the place of virt_init_setting

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Yu, Xiangliang > Subject: [PATCH 02/11] drm/amdgpu/virt: change the place of > virt_init_setting

RE: [PATCH 03/11] drm/amdgpu/psp: skip loading SDMA/RLCG under SRIOV VF

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Wang, Daniel(Xiaowei); Yu, Xiangliang > Subject: [PATCH 03/11] drm/amdgpu/psp: skip loading SDMA/

RE: [PATCH 01/11] drm/amdgpu/virt: bypass cg and pg setting for SRIOV

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: amd-gfx@lists.freedesktop.org > Cc: Min, Frank; Yu, Xiangliang > Subject: [PATCH 01/11] drm/amdgpu/virt: bypass cg and pg setting for

Re: [PATCH] LRU map compute/SDMA user ring ids to kernel ring ids v2

On 2017-04-24 11:25 AM, Alex Deucher wrote: On Mon, Apr 24, 2017 at 3:40 AM, Christian König wrote: I wanted to push that to our internal branch, but found that it doesn't apply cleanly. So please rebase on alex amd-staging-4.9 branch. Please stick with my drm-next-wip tree. It will make i

Re: [PATCH] LRU map compute/SDMA user ring ids to kernel ring ids v2

On Mon, Apr 24, 2017 at 3:40 AM, Christian König wrote: > I wanted to push that to our internal branch, but found that it doesn't > apply cleanly. So please rebase on alex amd-staging-4.9 branch. Please stick with my drm-next-wip tree. It will make it easier for me to integrate. Alex > > Addi

[PATCH 1/1] drm/radeon: check return value of radeon_ring_lock

From: Pan Bian Function radeon_ring_lock() returns an errno on failure, and its return value should be validated. However, in functions r420_cp_errata_init() and r420_cp_errata_fini(), its return value is not checked. This patch adds the checks. Signed-off-by: Pan Bian --- drivers/gpu/drm/rade

[PATCH 1/1] drm/radeon: check return value of radeon_fence_emit

From: Pan Bian Function radeon_fence_emit() returns -ENOMEM if there is no enough memory. And in this case, function radeon_ring_unlock_undo() rather than function radeon_ring_unlock_commit() should be called. However, in function radeon_test_create_and_emit_fence(), the return value of radeon_fe

[PATCH] drm/amdgpu: fix s3 ring test failed on Vi caused by KIQ enabled.

commit 2f3ea04dc9258cc can't fix s3 issue completely. Change-Id: I31d0ba7d143b11543bbb83273c022d8e77f34e08 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gp

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

On Mon, Apr 24, 2017 at 04:54:25PM +0900, Michel Dänzer wrote: > On 24/04/17 04:36 PM, Gerd Hoffmann wrote: > > > >>> drm: fourcc byteorder: add DRM_FORMAT_CPU_* > >>> drm: fourcc byteorder: add bigendian support to > >>> drm_mode_legacy_fb_format > >> > >> As I explained in my last follow

Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On Mon, Apr 24, 2017 at 03:57:02PM +0900, Michel Dänzer wrote: > On 22/04/17 07:05 PM, Ville Syrjälä wrote: > > On Fri, Apr 21, 2017 at 06:14:31PM +0200, Gerd Hoffmann wrote: > >> Hi, > >> > My personal opinion is that formats in drm_fourcc.h should be > independent of the CPU byte ord

Re: [PATCH libdrm] amdgpu: Use the canonical form in branch predicate

On 22.04.2017 08:47, Edward O'Callaghan wrote: Suggested-by: Emil Velikov Signed-off-by: Edward O'Callaghan Reviewed-by: Nicolai Hähnle --- amdgpu/amdgpu_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c index 0993a6d..868eb7b

Re: [PATCH] [RFC] drm/radeon: clear WC flag when moving bo from vram to gtt

On 24/04/17 07:01 PM, Julien Isorce wrote: > > On 24 April 2017 at 10:51, Christian König > wrote: > > Am 24.04.2017 um 11:42 schrieb Julien Isorce: > > But re-add the flag is the bo is moved back to vram. > > This fixes "ring 0/3 stalled" is

Re: [PATCH] [RFC] drm/radeon: clear WC flag when moving bo from vram to gtt

On 24/04/17 06:51 PM, Christian König wrote: > Am 24.04.2017 um 11:42 schrieb Julien Isorce: >> But re-add the flag is the bo is moved back to vram. >> >> This fixes "ring 0/3 stalled" issue which happens when the driver >> evicts bo from vram to gtt, at least on TAHITI and CAPVERDE. > > Interesti

Re: [PATCH] [RFC] drm/radeon: clear WC flag when moving bo from vram to gtt

On 24 April 2017 at 10:51, Christian König wrote: > Am 24.04.2017 um 11:42 schrieb Julien Isorce: > >> But re-add the flag is the bo is moved back to vram. >> >> This fixes "ring 0/3 stalled" issue which happens when the driver >> evicts bo from vram to gtt, at least on TAHITI and CAPVERDE. >> >

Re: [PATCH libdrm] amdgpu: Use the canonical form in branch predicate

On 22 April 2017 at 07:47, Edward O'Callaghan wrote: > Suggested-by: Emil Velikov > Signed-off-by: Edward O'Callaghan Reviewed-by: Emil Velikov Thanks Emil ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/l

Re: [PATCH] [RFC] drm/radeon: clear WC flag when moving bo from vram to gtt

Am 24.04.2017 um 11:42 schrieb Julien Isorce: But re-add the flag is the bo is moved back to vram. This fixes "ring 0/3 stalled" issue which happens when the driver evicts bo from vram to gtt, at least on TAHITI and CAPVERDE. Interesting find, but NAK on the approach for fixing it. If WC mapp

Re: [PATCH 1/2] drm/amdgpu: fix gpu reset crash

Am 24.04.2017 um 11:40 schrieb Chunming Zhou: [ 413.687439] BUG: unable to handle kernel NULL pointer dereference at 0548 [ 413.687479] IP: [] to_live_kthread+0x5/0x60 [ 413.687507] PGD 1efd12067 [ 413.687519] PUD 1efd11067 [ 413.687531] PMD 0 [ 413.687543] Oops: [#1] SMP

[PATCH 2/2] drm/amd/display: Prevent premature pageflip when comitting in vblank. (v2)

Make sure we do not program a hw pageflip inside vblank 'n' iff the atomic flip is comitted while inside the same vblank 'n'. We must defer such a flip by one refresh cycle to vblank 'n+1'. Without this, pageflips programmed via X11 GLX_OML_sync_control extensions glXSwapBuffersMscOML(..., target_

[PATCH 1/2] drm/amd/display: Fix race between vblank irq and pageflip irq. (v2)

Since DC now uses CRTC_VERTICAL_INTERRUPT0 as VBLANK irq trigger and vblank interrupts actually happen earliest at start of vblank, instead of a bit before vblank, we no longer need some of the fudging logic to deal with too early vblank irq handling (grep for lb_vblank_lead_lines). This itself fix

[PATCH] [RFC] drm/radeon: clear WC flag when moving bo from vram to gtt

But re-add the flag is the bo is moved back to vram. This fixes "ring 0/3 stalled" issue which happens when the driver evicts bo from vram to gtt, at least on TAHITI and CAPVERDE. I do not know the exact reason among the following: - si_copy_dma from vram to gtt is slow if WC (only for

[PATCH 1/2] drm/amdgpu: fix gpu reset crash

[ 413.687439] BUG: unable to handle kernel NULL pointer dereference at 0548 [ 413.687479] IP: [] to_live_kthread+0x5/0x60 [ 413.687507] PGD 1efd12067 [ 413.687519] PUD 1efd11067 [ 413.687531] PMD 0 [ 413.687543] Oops: [#1] SMP [ 413.687557] Modules linked in: amdgpu(OE) tt

[PATCH 2/2] drm/amdgpu: fix NULL pointer error

[ 141.420491] BUG: unable to handle kernel NULL pointer dereference at 0030 [ 141.420532] IP: [] fence_remove_callback+0x11/0x60 [ 141.420563] PGD 20a030067 [ 141.420575] PUD 2088ca067 [ 141.420587] PMD 0 [ 141.420599] Oops: [#1] SMP [ 141.420612] Modules linked in: amdgpu

Re: [PATCH 1/1] drm/radeon: check return value of radeon_ring_lock

Am 24.04.2017 um 10:38 schrieb Pan Bian: From: Pan Bian Function radeon_ring_lock() returns an errno on failure, and its return value should be validated. However, in functions r420_cp_errata_init() and r420_cp_errata_fini(), its return value is not checked. This patch adds the checks. Signed-

Re: [PATCH 1/1] drm/radeon: check return value of radeon_fence_emit

Am 24.04.2017 um 10:45 schrieb Pan Bian: From: Pan Bian Function radeon_fence_emit() returns -ENOMEM if there is no enough memory. And in this case, function radeon_ring_unlock_undo() rather than function radeon_ring_unlock_commit() should be called. However, in function radeon_test_create_and_

Re: [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint

Am 24.04.2017 um 10:55 schrieb Christian König: Am 24.04.2017 um 08:43 schrieb Junwei Zhang: Signed-off-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trac

Re: [PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint

Am 24.04.2017 um 08:43 schrieb Junwei Zhang: Signed-off-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h

Re: [PATCH] drm/amdgpu: fix trace error for amdgpu_vm_bo_unmap

Am 24.04.2017 um 08:15 schrieb Junwei Zhang: Signed-off-by: Junwei Zhang Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/

Re: [PATCH] Improve pipe split between amdgpu and amdkfd v4

If you ask me that set of patches and your other work are more than ready to land. I advise to rebase on to of alex amd-staging-4.9 branch for that, that's where most of our internal development of based on. We are going to move to drm-next based development model sooner or later, but that w

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

On 24/04/17 04:36 PM, Gerd Hoffmann wrote: > >>> drm: fourcc byteorder: add DRM_FORMAT_CPU_* >>> drm: fourcc byteorder: add bigendian support to >>> drm_mode_legacy_fb_format >> >> As I explained in my last followup in the "[PATCH] drm: fourcc >> byteorder: brings header file comments in l

Re: [PATCH 1/1] drm/radeon: check return vlaue of radeon_fence_emit

Am 23.04.2017 um 15:50 schrieb Pan Bian: From: Pan Bian Function radeon_fence_emit() returns -ENOMEM if there is no enough memory. And in this case, function radeon_ring_unlock_undo() rather than function radeon_ring_unlock_commit() should be called. However, in function radeon_test_create_and_

Re: [PATCH 1/1] drm/radeon: check return value of radeon_ring_lock

Am 23.04.2017 um 15:36 schrieb Pan Bian: From: Pan Bian Function radeon_ring_lock() returns an errno on failure, and its return value should be validated. However, in functions r420_cp_errata_init() and r420_cp_errata_fini(), its return value is not checked. This patch adds the checks. Signed-

Re: [PATCH] LRU map compute/SDMA user ring ids to kernel ring ids v2

I wanted to push that to our internal branch, but found that it doesn't apply cleanly. So please rebase on alex amd-staging-4.9 branch. Additional to that you forgot my rb on patch #4. Regards, Christian. Am 22.04.2017 um 01:48 schrieb Andres Rodriguez: V2 updates: * Rebased * All patches

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

Hi, > > Gerd Hoffmann (6): > > drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN > > I don't see how it can be dropped. It's only optional for formats where > all components have 8 bits. Well, we can, because it is simply not used anywhere ... We indeed can't specify RGB565 or XRGB2101010 i

Re: [PATCH 2/2] drm/amd/display: Prevent premature pageflip when comitting in vblank.

On 22/04/17 01:23 AM, Mario Kleiner wrote: > Make sure we do not program a hw pageflip inside vblank 'n' iff the > atomic flip is comitted while inside the same vblank 'n'. We must > defer such a flip by one refresh cycle to vblank 'n+1'. > > Without this, pageflips programmed via X11 GLX_OML_sync

Re: [PATCH 1/2] drm/amd/display: Fix race between vblank irq and pageflip irq.

On 22/04/17 01:23 AM, Mario Kleiner wrote: > Since DC now uses CRTC_VERTICAL_INTERRUPT0 as VBLANK irq trigger > and vblank interrupts actually happen earliest at start of vblank, > instead of a bit before vblank, we no longer need some of the > fudging logic to deal with too early vblank irq handli

[PATCH 03/11] drm/amdgpu/psp: skip loading SDMA/RLCG under SRIOV VF

From: Daniel Wang Now GPU hypervisor will load SDMA and RLCG ucode, so skip it in guest. Signed-off-by: Daniel Wang Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/dri

Re: [PATCH 0/6] drm: tackle byteorder issues, take two

On 24/04/17 03:25 PM, Gerd Hoffmann wrote: > Hi, > > Ok, different approach up for discussion. Given that userspace didn't > made the transition from ADDFB to ADDFB2 yet it seems we still can muck > with the fourcc codes without breaking everything, as long as we > maintain ADDFB and fbdev beha

[PATCH 11/11] drm/amdgpu/uvd7: add UVD hw init sequences for sriov

From: Frank Min Add UVD hw init. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 92 --- 1 file changed, 54 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/a