RE: [PATCH 0/7] *** GPU recover V3 ***

Please share the dmesg log, and what’s the chip are you using ? From: Julien Isorce [mailto:julien.iso...@gmail.com] Sent: 2017年11月9日 17:35 To: Liu, Monk Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 0/7] *** GPU recover V3 *** Hi Monk. I am interested on this.

FW: [PATCH] drm/amd/display: fix static checker warning

On 11/7/2017 2:06 PM, Michel Dänzer wrote: > On 07/11/17 04:29 AM, S, Shirish wrote: >> From: Shirish S >> >> This patch fixes static checker warning of >> "warn: cast after binop" introduced by >> 4d3e00dad80a: "drm/amd/display : add high part address calculation for >>

[PATCH libdrm 3/4] amdgpu: Move memory alloc tests in bo suite.

Signed-off-by: Andrey Grodzovsky --- tests/amdgpu/basic_tests.c | 49 -- tests/amdgpu/bo_tests.c| 49 ++ 2 files changed, 49 insertions(+), 49 deletions(-) diff --git

[PATCH libdrm 2/4] amdgpu: Use new suite/test disabling functionality.

Switch from disabling tests during run to using the new disable API. Signed-off-by: Andrey Grodzovsky --- tests/amdgpu/amdgpu_test.c| 14 ++-- tests/amdgpu/amdgpu_test.h| 15 tests/amdgpu/deadlock_tests.c | 8 + tests/amdgpu/uvd_enc_tests.c

[PATCH libdrm 0/4] Dynamicly disable suites and tets.

THe following patch series intoroduce dynamic tests dusabling/enabling in amdgpu tester using Cunit API. Today test suits that don't apply to specific HW just return success w/o executing while single tests that can't be executed properly are commented out. Suits are diasbled based on hooks

[PATCH libdrm 1/4] amdgpu: Add functions to disable suites and tests.

Suits are diasbled based on hooks they provide (e.g incompatible ASIC or missing blocks). Single tests are diasbled explicitly. Suit or test can be forced to execute even if disabled by adding -f flag after specifying suit [test] ids. Signed-off-by: Andrey Grodzovsky

Re: [PATCH 1/1] drm/amdkfd: CWSR and trap handler support

The file contains the assembly code as a reference (inside #if 0) and an array with the pre-compiled code. It gets #included in kfd_device.c. The trap handler binary gets compiled/linked into the kernel. To be GPL-compliant the source code needs to be included. Otherwise we'd have to load the

[PATCH 50/73] drm/amd/display: Report pitch_alignment for DCN

From: Andrew Jiang Change-Id: I2825b787ae02b7317bf1602eb2d45aeca8ba1041 Signed-off-by: Andrew Jiang Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h

[PATCH 56/73] drm/amd/display: Remove dangling planes on dc commit state

From: "Leo (Sunpeng) Li" When disabling pipe splitting, we need to make sure we disable both planes used. This should be done for Linux as well. Change-Id: I79f5416a55bd26c19ca3cfb346a943d69872a8ce Signed-off-by: Leo (Sunpeng) Li Reviewed-by: Tony Cheng

[PATCH 65/73] drm/amd/display: Fix unused variable warning

From: "Leo (Sunpeng) Li" 'struct mpc *mpc' is not used. Change-Id: Icc20385798c76e41e29f44ccb26d32b044829821 Signed-off-by: Leo (Sunpeng) Li Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 40/73] drm/amd/display: Fixed not set scaler bug.

From: Yongqiang Sun New scaler parameter assign to dpp is after early return, cause next flip scaler not program. Change-Id: I4af97d37de194429116378ce7bbb820b21b7a6af Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng

[PATCH 66/73] drm/amd/display: Optimize front end programming.

From: Yongqiang Sun for video scaling changes, Reduce reg access count from 1044 to 447, duration time from 4.6ms to 3ms. Change-Id: I92c5f7a30044b977dea5d4334ac12876b8ae5ae5 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng

[PATCH 69/73] drm/amd/display: Move dc_link interface to separate header

Change-Id: Id35bc6b48dde03068ed554fe7dcf72bd40009769 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 175 +-

[PATCH 51/73] drm/amd/display: Loosen plane_info and scaling_info checks

From: Andrew Jiang Make it so that differing dcc and plane size fields don't necessarily result in a full update, along with upscaling modes. This allows us to save some unnecessary full updates. Change-Id: I5ea98fa690e8ed136d39e2de0af8cbe10806c4b4 Signed-off-by: Andrew

[PATCH 27/73] drm/amd/display: use num_timing_generator instead of pipe_count

From: Ken Chalmers The two are not necessarily the same. Change-Id: I585542651c2a57502d4c37e0f9393ece4426e455 Signed-off-by: Ken Chalmers Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 37/73] drm/amd/display: dal 3.1.15

From: Tony Cheng Change-Id: I58812cc60def70f03da97e90eff052c461db4dbb Signed-off-by: Tony Cheng Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed,

[PATCH 71/73] drm/amd/display: remove stream_func vtable

From: Tony Cheng Change-Id: I5fd90f7b53efd60dc2a0559edfcc90e9ab1bf5ff Signed-off-by: Tony Cheng Reviewed-by: Sun peng Li Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 32

[PATCH 68/73] drm/amd/display: Move dc_stream interface to separate header

Change-Id: I390b96c79693dc7d00e39f8dfb8700cf20b7c3f3 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h| 223 +---

[PATCH 72/73] drm/amd/display: Fix Linux after optimize frontend programming

We still require the update_plane_addr call in commit_planes_for_stream. Change-Id: I281c0106e02bf9828a750c28590f12726d16196d Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 59/73] drm/amd/display: Remove legacy unused workaround

From: Andrew Jiang We shouldn't be able to get a non-visible plane into DC anymore. Change-Id: I152ff6dabe8e022fd200d0aab42e64e0444b70f9 Signed-off-by: Andrew Jiang Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 62/73] drm/amd/display: Added Opp and Diags Interface for P to I

From: Arun Pandey Change-Id: I47b7c9a88eebe84c238f20cd1c9206d06eace7e7 Signed-off-by: Arun Pandey Reviewed-by: Charlene Liu Acked-by: Harry Wentland --- .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

[PATCH 53/73] drm/amd/display: Apply work around for stutter.

From: Yongqiang Sun Power on one plane after disable all the planes, for a hw bug work around to resolve stutter efficiency issue. Change-Id: Ifc696c800f9402afb9615a974657c8b06a94b334 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng

[PATCH 58/73] drm/amd/display: Early return on stream programming failure

From: "Leo (Sunpeng) Li" The fail goto is incorrect. It will incorrectly release the dc_states on stream programming failure. Change-Id: Ifefa4561266aaef10235e02dc687f5c0f637e6c1 Signed-off-by: Leo (Sunpeng) Li Reviewed-by: Tony Cheng

[PATCH 34/73] drm/amd/display: Add transfer function to dc_surface_update

From: SivapiriyanKumarasamy Change-Id: Ic42be4e0033db8d402f5688aef7c3cea6f7e0119 Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 70/73] drm/amd/display: Remove unnecessary dc_stream vtable

There's no need to have this as a vtable. The vtable was initially used for stream_adjust_vmin_vmax but the condition checked here (set_drr) is always true, hence we don't need to assign this dynamically anymore. Change-Id: I60e3c213b4566b3808b8feb001b93b74bcf7f17a Signed-off-by: Harry Wentland

[PATCH 45/73] drm/amd/display: Remove extra arr_points element

arr_points[1] and [2] were duplicated. Remove the extra one. If we ever need more points we can add them but the current state of affairs is confusing. Change-Id: Ib72a1cb90940e9d52f241432c160f14393992523 Signed-off-by: Harry Wentland Reviewed-by: Anthony Koo

[PATCH 64/73] drm/amd/display: Add check update surfaces for stream wrapper

From: Andrew Jiang This allows us to properly clear and set the update flags for all cases. Change-Id: I9d4f8295db086f4401284098420af8a37c6bea44 Signed-off-by: Andrew Jiang Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 31/73] drm/amd/display: add warning on long reg_wait

From: Dmytro Laktyushkin Change-Id: I237ee9baaeb91434d94abe0b2ce052f9f4f67799 Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 33/73] drm/amd/display: send display_count msg so SMU can enter S0i2

From: Hersen Wu SMU can future lower voltages in long idle case when all display is off. If all display output is turned off via DPMS, send display_count = 0 after all output are turned off. otherwise send display_count msg before turning on display to make sure SMU exit

[PATCH 63/73] drm/amd/display: Rename pitch_alignment to linear_pitch_alignment

From: Andrew Jiang Also initialize this to 64 for all ASICs. Change-Id: Ia745d8d17e176ac2f65c6ac398d93bdc77fe75d6 Signed-off-by: Andrew Jiang Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 60/73] drm/amd/display: Add update flags in to determine surface update type

From: Andrew Jiang This way, we can know exactly what triggered the update type we're looking at, and we can simplify the logic for determining what exactly needs to be updated in the future. Also allow a dst rect size increase to go through a medium update, since that

[PATCH 35/73] drm/amd/display: fix dcn10_hubbub_wm_read_state

From: Ken Chalmers The ALLOW_SR registers might not always be available. Change-Id: I715cffd3e56caee38ceed7af112182a7a51ce39a Signed-off-by: Ken Chalmers Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 67/73] drm/amd/display: Fix formatting for null pointer dereference fix

Change-Id: I277078c8d6c547fb5a685845f6617bf9886c6fe4 Signed-off-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c

[PATCH 47/73] drm/amd/display: Remove unused register read in program_pwl

Change-Id: I28eb763419eec834c591c03281abd22ad446b2e7 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Reviewed-by: Anthony Koo Acked-by: Harry Wentland ---

[PATCH 49/73] drm/amd/display: combine output signal and signal

From: Eric Yang output signal used to be a public member to be used by DM to override the stream signal. Now since there is no longer separation between public and private part of stream, they are combined. The overriding was not working properly as well, which is addressed

[PATCH 57/73] drm/amd/display: Change frontend/backend programming sequence

From: "Leo (Sunpeng) Li" This is a follow-up to the following change: Yongqiang Sun: Program front end first when set mode. Due to pipe-splitting features, how we handle stream enabling and disabling needs to change. In the case of pipe split disable, two planes need to be

[PATCH 52/73] drm/amd/display: remove dcn10 wait on tg unlock

From: Dmytro Laktyushkin Change-Id: Ifde23126bc8528f42ad73fa19e6bf48d17a2233b Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 44/73] drm/amd/display: add flip_immediate to commit update for stream

From: Bhawanpreet Lakha This struct is not updated on page flip and causes vblank_mode to not work as expected Change-Id: I0e8684c5b67ec5670054f4bb849fa26bc60ed4b1 Signed-off-by: Bhawanpreet Lakha Reviewed-by: Tony Cheng

[PATCH 55/73] drm/amd/display: Optimize programming front end

From: Yongqiang Sun In case of update type is medium, optimize squence, reduce programing time. Change-Id: Ib1793408897b0c4d4a64434c239c3703d43e83d9 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 32/73] drm/amd/display: Modified front end initiail in init_hw

From: Yongqiang Sun Optimized front end initial sequence, reset MPC module properly. Change-Id: Id223308988505a15a9e0fc26f908beb1e42ed4a4 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 41/73] drm/amd/display: Check aux channel before MST resume

From: "Jerry (Fangzhi) Zuo" It is to fix: MST display failed to resume from S3 At the beginning of resume from S3, need to check if mgr->aux is NULL. Fake MST encoder doesn't have real aux channel. Change-Id: I15de6ab99da01841d62912dd98e6cc74d9100801 Signed-off-by: Jerry

[PATCH 36/73] drm/amd/display: Remove unused OPP functions from interface

From: Eric Bernstein Change-Id: Ib79e69b0178219e02819a7b92cc1cb1bea9b5a68 Signed-off-by: Eric Bernstein Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/inc/hw/opp.h

[PATCH 01/73] drm/amd/display: Multi display synchronization logic

From: Mikita Lipski This feature synchronizes multiple displays with various timings to a display with the highest refresh rate it is enabled if edid caps flag multi_display_sync is set to one There are limitations on refresh rates allowed that can be synchronized. That

[PATCH 43/73] drm/amd/display: dal 3.1.16

From: Tony Cheng Change-Id: If2b7804a5074077c3581f53db337768877fffc98 Signed-off-by: Tony Cheng Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed,

[PATCH 42/73] drm/amd/display: always call set output tf

From: Eric Yang Temporary solution to fix gamma adjustment not working. Change-Id: I1884bcee28f7d71cbd5f6edd56423f01c32107b1 Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 03/73] drm/amd/display: fix AZ clock not enabled before program AZ endpoint

From: Charlene Liu Change-Id: Ie8683cbe4791557054eba856aee6e06c948fc1f0 Signed-off-by: Charlene Liu Reviewed-by: Anthony Koo Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dce/dce_audio.c |

[PATCH 15/73] drm/amd/display: Don't use dc_link in link_encoder

From: Andrew Jiang dc_link is at a higher level than link_encoder, and we only want higher-level components to be able to access lower-level ones, not the other way around. Change-Id: I634b117b386938fb7ddba50c50484fadd54ad485 Signed-off-by: Andrew Jiang

[PATCH 18/73] drm/amd/display: Add OPP DPG blank function

From: Eric Bernstein Added a function to blank data using OPP DPG. Clean up code to prepare for pseudocode review with HW. Change-Id: Iac5e99e1eb72b8dd74c244e8d06d54bae9ab3ce2 Signed-off-by: Eric Bernstein Reviewed-by: Tony Cheng

[PATCH 10/73] drm/amd/display: Only update dchub if hubbub is available

From: Yue Hin Lau Change-Id: Id3ccff0209ae76330eb346c4ffd3aa3b6bf1909b Signed-off-by: Yue Hin Lau Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

[PATCH 11/73] drm/amd/display: get remote dpcd caps for timing validation

From: Eric Yang Change-Id: Iebe803ec074af7648329af111217da2a50f8426c Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc_link.c| 2 +-

[PATCH 00/73] DC Linux Patches Nov 9, 2017

* Whole bunch of Raven (DCN) work * Bunch of cleanups Andrew Jiang (7): drm/amd/display: Don't use dc_link in link_encoder drm/amd/display: Report pitch_alignment for DCN drm/amd/display: Loosen plane_info and scaling_info checks drm/amd/display: Remove legacy unused workaround

[PATCH 23/73] drm/amd/display: Refactor disable front end pipes.

From: Yongqiang Sun There are different code to disable front end, it is difficult to debug and adding new process. This refactor makes all disable front end call the same functions. Change-Id: Ia88b26851bcea426104a8dd9093b912d03424c9a Signed-off-by: Yongqiang Sun

[PATCH 29/73] drm/amd/display: fix uninitialized variable warning

From: Dmytro Laktyushkin Change-Id: Ida9244b5d9c44b8fc12c18a1bfb460e18778e04f Signed-off-by: Dmytro Laktyushkin Reviewed-by: Dmytro Laktyushkin Acked-by: Harry Wentland ---

[PATCH 26/73] drm/amd/display: Fix some more color indentations

Change-Id: Ib7290f11372f258308a5e8be69f964e0407c54d6 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 ++

[PATCH 08/73] drm/amd/display: use configurable FBC option in dm

From: Roman Li Replace ENABLE_FBC macro with config option CONFIG_DRM_AMD_DC_FBC in dm. DC code has been already updated the same way. Change-Id: I8c0e8deb6fe1387a7364822d12c2cc5beb888998 Signed-off-by: Roman Li Reviewed-by: Shirish Shankarappa

[PATCH 22/73] drm/amd/display: dal 3.1.14

From: Tony Cheng Change-Id: I87463dfba34a246c9ec5f2a0cf417b9943683f7e Signed-off-by: Tony Cheng Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed,

[PATCH 14/73] drm/amd/display: Both timing_sync and multisync need stream_count > 1

Previous code threw a warning about misleading indentation Change-Id: I93e5998448e2c80d1b084231a3ef575bc1a0dfdd Signed-off-by: Harry Wentland Reviewed-by: Mikita Lipski Acked-by: Harry Wentland ---

[PATCH 25/73] drm/amd/display: Bunch of indentation cleanups in color stuff

Trying to align with kernel coding style and make it a bit more readable. Change-Id: I7d4a06e221509a1b063c539223add2b73462a599 Signed-off-by: Harry Wentland Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 07/73] drm/amd/display: dal 3.1.11

From: Tony Cheng Change-Id: Iec51322a9e35f8ad8729168df7e6c88d42799e8c Signed-off-by: Tony Cheng Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed,

[PATCH 19/73] drm/amd/display: call set csc_default if enable adjustment is false

From: Yue Hin Lau Change-Id: Id7507b6af4ab877fc10c5549985ac2633fe3f124 Signed-off-by: Yue Hin Lau Reviewed-by: Eric Bernstein Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h

[PATCH 16/73] drm/amd/display: cache pwl params and scl_data to avoid extra programming

From: Dmytro Laktyushkin This saves us about 5000 reg writes per full update. This translates to about 4 writes over the course of single eDP bootup. Change-Id: If8e0c7bac744d8a3e2c56271c09453152025ccc8 Signed-off-by: Dmytro Laktyushkin

[PATCH 24/73] drm/amd/display: fix MST link training fail division by 0

From: Eric Yang When link training fail in MST case, we will divide by 0 when calculating avg_time_slots_per_mtp, so we cannot proceed. Change-Id: Iae7aef320deb3c204f3450544c36f89b075a5c21 Signed-off-by: Eric Yang Reviewed-by: Harry Wentland

[PATCH 09/73] drm/amd/display: Call ipp_program_bias_and_scale only if available

From: Eric Bernstein Also move some register definitions to common DCN regs. Change-Id: I6da468797abb0662e144aff073c62ab6a3ad430e Signed-off-by: Eric Bernstein Reviewed-by: Tony Cheng Acked-by: Harry Wentland

[PATCH 13/73] drm/amd/display: Add tg_init interface.

From: Yongqiang Sun Clear OPTC underflow status when init_hw. Change-Id: I96953ee2d842a53ee343da88cffbef1eac2df95b Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 02/73] drm/amd/display: create new function prototype update_dchub for dcn

From: Yue Hin Lau dcn version of update_dchub now uses hubbub instead of hwseq Change-Id: I6335897c721870cf023346dc52d65071a2f1cf8a Signed-off-by: Yue Hin Lau Reviewed-by: Dmytro Laktyushkin Acked-by: Harry Wentland

[PATCH 12/73] drm/amd/display: Enalbe blank data double buffer after mpc disconnected.

From: Yongqiang Sun Change-Id: I60d84f57d93870769fdb2d8f1e870121c2a28f15 Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 06/73] drm/amd/display: hubbub function flipping true and false

From: Yue Hin Lau no logic change Change-Id: I31bdbba1abeb64d54e385456b58839160b1e188b Signed-off-by: Yue Hin Lau Reviewed-by: Tony Cheng Acked-by: Harry Wentland ---

[PATCH 05/73] drm/amd/display: Do post_update_surfaces on new state

From: Charlene Liu Change-Id: I98a09a622bbcf92e52377eb5eb14970bc604adc2 Signed-off-by: Charlene Liu Reviewed-by: Anthony Koo Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/core/dc.c | 8

[PATCH 21/73] drm/amd/display: renaming dpp function to follow naming convention

From: Yue Hin Lau Change-Id: I01d8cc3095891bc44dcfb319729975b3dad6510e Signed-off-by: Yue Hin Lau Reviewed-by: Yuehin Lau Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 28

Re: [PATCH] amdgpu/dm: Don't use DRM_ERROR in amdgpu_dm_atomic_check

On 2017-11-09 12:38 PM, Michel Dänzer wrote: > From: Michel Dänzer > > The atomic_check hook is expected to fail in some cases, e.g. if the > modeset operation requested by userspace cannot be performed, so it must > not spam dmesg on failure. > > Fixes spurious > >

Re: [PATCH 0/7] *** GPU recover V3 ***

On Thu, Nov 9, 2017 at 4:35 AM, Julien Isorce wrote: > Hi Monk. > > I am interested on this. Currently when a "ring X stalled for more than N > sec" happens it usually goes into the gpu reset routine. > Does it always cause the vram to be lost ? Could you explain what

Re: [PATCH 7/7] drm/ttm: optimize ttm_mem_evict_first v2

On 09/11/17 09:59 AM, Christian König wrote: > Deleted BOs with the same reservation object can be reaped even if they > can't be reserved. > > v2: rebase and we still need to remove/add the BO from/to the LRU. > > Signed-off-by: Christian König > --- >

Re: [PATCH] amdgpu/dm: Don't use DRM_ERROR in amdgpu_dm_atomic_check

On Thu, Nov 9, 2017 at 12:38 PM, Michel Dänzer wrote: > From: Michel Dänzer > > The atomic_check hook is expected to fail in some cases, e.g. if the > modeset operation requested by userspace cannot be performed, so it must > not spam dmesg on failure.

Re: [PATCH] drm/amd/powerplay: fix copy-n-paste error on vddci_buf index

On Thu, Nov 9, 2017 at 6:35 AM, Colin King wrote: > From: Colin Ian King > > The index to vddci_buf is using profile->ucElbVDDC_Num rather > than profile->ucElbVDDCI_Num; this looks like a copy-n-paste > error from previous code for the

Re: [PATCH 4/7] drm/ttm: user reservation object wrappers

Am 09.11.2017 um 17:50 schrieb Michel Dänzer: On 09/11/17 09:59 AM, Christian König wrote: Consistently use the reservation object wrappers instead of accessing the ww_mutex directly. Additional to that use the reservation object wrappers directly instead of calling __ttm_bo_reserve with fixed

Re: [PATCH 4/7] drm/ttm: user reservation object wrappers

On 09/11/17 09:59 AM, Christian König wrote: > Consistently use the reservation object wrappers instead of accessing > the ww_mutex directly. > > Additional to that use the reservation object wrappers directly instead of > calling __ttm_bo_reserve with fixed parameters. > > Signed-off-by:

Re: [PATCH 2/4] drm/amdgpu: cleanup vm_size handling

On Thu, Nov 9, 2017 at 9:49 AM, Christian König wrote: > It's pointless to have the same value twice, just always use max_pfn. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher > --- >

Re: [PATCH 1/4] drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result

On Thu, Nov 9, 2017 at 9:49 AM, Christian König wrote: > Not sure what that should originally been good for, but it doesn't seem > to make any sense any more. > > Signed-off-by: Christian König Reviewed-by: Alex Deucher

Re: [PATCH 4/4] drm/amdgpu: fix VA hole handling on Vega10

Am 09.11.2017 um 15:59 schrieb Michel Dänzer: On 09/11/17 03:49 PM, Christian König wrote: Similar to the CPU address space the VA on Vega10 has a hole in it. [...] diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c index

Re: [PATCH] drm/amdgpu: Add common golden settings for GFX9

On Thu, Nov 9, 2017 at 3:03 AM, wrote: > From: Ken Wang > > Signed-off-by: Ken Wang Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 9 + > 1 file changed, 9 insertions(+) > >

[PATCH] drm/amd/powerplay: fix copy-n-paste error on vddci_buf index

From: Colin Ian King The index to vddci_buf is using profile->ucElbVDDC_Num rather than profile->ucElbVDDCI_Num; this looks like a copy-n-paste error from previous code for the vddc_buf array and I'm pretty sure this is incorrect. Fix this by using the correct variable.

Re: [PATCH 4/4] drm/amdgpu: fix VA hole handling on Vega10

On 09/11/17 03:49 PM, Christian König wrote: > Similar to the CPU address space the VA on Vega10 has a hole in it. [...] > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c > index 4710e51099c2..81c34132fbd5 100644 > ---

[PATCH 3/4] drm/amdgpu: make AMDGPU_VA_RESERVED_SIZE 64bit

Even when it's a small handle it as 64bit value as well. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 5 ++--- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 ++- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git

[PATCH 4/4] drm/amdgpu: fix VA hole handling on Vega10

Similar to the CPU address space the VA on Vega10 has a hole in it. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 10 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 +++ drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++-

[PATCH 2/4] drm/amdgpu: cleanup vm_size handling

It's pointless to have the same value twice, just always use max_pfn. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 18 +- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 7 +++ drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 1 -

[PATCH 1/4] drm/amdgpu: remove nonsense const u32 cast on ARRAY_SIZE result

Not sure what that should originally been good for, but it doesn't seem to make any sense any more. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/cik.c | 40 +- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 8 +++

Re: [RFC 0/7] UVD support for SI in amdgpu

Am 09.11.2017 um 15:37 schrieb Piotr Redlewski: On Thu, Nov 09, 2017 at 09:42:57AM +0100, Christian König wrote: Am 09.11.2017 um 00:54 schrieb Alex Deucher: On Wed, Nov 8, 2017 at 5:38 PM, Piotr Redlewski wrote: Hi, Following series implements UVD support for SI in

Re: [RFC 0/7] UVD support for SI in amdgpu

On Thu, Nov 09, 2017 at 09:42:57AM +0100, Christian König wrote: > Am 09.11.2017 um 00:54 schrieb Alex Deucher: > > On Wed, Nov 8, 2017 at 5:38 PM, Piotr Redlewski > > wrote: > > > Hi, > > > > > > Following series implements UVD support for SI in amdgpu driver. Code is >

Re: [RFC 0/7] UVD support for SI in amdgpu

On Thu, Nov 09, 2017 at 01:17:36PM +0100, Christian König wrote: > Am 09.11.2017 um 11:53 schrieb Piotr Redlewski: > > On Thu, Nov 09, 2017 at 11:09:42AM +0100, Christian König wrote: > > > Am 09.11.2017 um 10:54 schrieb Piotr Redlewski: > > > > On Wed, Nov 08, 2017 at 06:54:18PM -0500, Alex

Re: [RFC 0/7] UVD support for SI in amdgpu

Am 09.11.2017 um 11:53 schrieb Piotr Redlewski: On Thu, Nov 09, 2017 at 11:09:42AM +0100, Christian König wrote: Am 09.11.2017 um 10:54 schrieb Piotr Redlewski: On Wed, Nov 08, 2017 at 06:54:18PM -0500, Alex Deucher wrote: On Wed, Nov 8, 2017 at 5:38 PM, Piotr Redlewski

Re: [RFC 0/7] UVD support for SI in amdgpu

On Thu, Nov 09, 2017 at 11:09:42AM +0100, Christian König wrote: > Am 09.11.2017 um 10:54 schrieb Piotr Redlewski: > > On Wed, Nov 08, 2017 at 06:54:18PM -0500, Alex Deucher wrote: > > > On Wed, Nov 8, 2017 at 5:38 PM, Piotr Redlewski > > > wrote: > > > > Hi, > > > > > > >

Re: [PATCH umr] Switch GRBM index when reading wave data directly.

Reviewed-by: Nicolai Hähnle On 08.11.2017 19:39, Tom St Denis wrote: Signed-off-by: Tom St Denis --- src/lib/wave_status.c | 4 1 file changed, 4 insertions(+) diff --git a/src/lib/wave_status.c b/src/lib/wave_status.c index

Re: [RFC 0/7] UVD support for SI in amdgpu

On Wed, Nov 08, 2017 at 06:54:18PM -0500, Alex Deucher wrote: > On Wed, Nov 8, 2017 at 5:38 PM, Piotr Redlewski wrote: > > Hi, > > > > Following series implements UVD support for SI in amdgpu driver. Code is > > based > > on CIK's UVD support in amdgpu and SI's UVD support

Sorry for the commit noise on libdrm

I've accidentally pushed two incomplete WIP patches to the libdrm master repository yesterday. Just noticed the mistake and reverted the two. Sorry for the noise, Christian. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org

Re: [PATCH 0/7] *** GPU recover V3 ***

Hi Monk. I am interested on this. Currently when a "ring X stalled for more than N sec" happens it usually goes into the gpu reset routine. Does it always cause the vram to be lost ? Could you explain what happens if the vram remains lost ? I am asking this because I experienced some recurrent

Re: [PATCH v2 2/3] ASoC: rt5645: Wait for 400msec before concluding on value of RT5645_VENDOR_ID2

On 11/8/2017 11:39 PM, Mark Brown wrote: On Wed, Nov 08, 2017 at 12:24:03PM -0500, Alex Deucher wrote: regmap_read(regmap, RT5645_VENDOR_ID2, ); + /* +* Read after 400msec, as it is the interval required between +* read and power On. +*/ +

Re: [PATCH] drm/amdgpu: Fix null pointer issue in amdgpu_cs_wait_any_fence

Am 09.11.2017 um 08:59 schrieb Emily Deng: The array[first] may be null when the fence has already been signaled. BUG: SWDEV-136239 Signed-off-by: Emily Deng Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 7

[PATCH 6/7] drm/ttm: make unlocking in ttm_bo_cleanup_refs optional

Needed for the next patch. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 52 1 file changed, 28 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c

[PATCH 5/7] drm/ttm: remove ttm_bo_unreserve_ticket

Just another alias for ttm_bo_unreserve. Signed-off-by: Christian König --- drivers/gpu/drm/nouveau/nouveau_gem.c | 2 +- include/drm/ttm/ttm_bo_driver.h | 13 - 2 files changed, 1 insertion(+), 14 deletions(-) diff --git

[PATCH 7/7] drm/ttm: optimize ttm_mem_evict_first v2

Deleted BOs with the same reservation object can be reaped even if they can't be reserved. v2: rebase and we still need to remove/add the BO from/to the LRU. Signed-off-by: Christian König --- drivers/gpu/drm/ttm/ttm_bo.c | 39 +++

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