NAK on it.
First of all, without this patch, Does it cause any issue?
second,
entity->last_scheduled present the last submiting job.
Your this change will break this meaning and don't work, e.g.
1. mirror list has jobA and jobB, assuming they are belonged to same
entity, then the
When put the IB test out of exclusive mode, and do sriov reset,
the IB test will randomly fail. As out of exclusive mode it uses
kiq to do read and write registers, but as it has world switch,
the kiq read and write time will be random, sometimes it will
beyond the MAX_KIQ_REG_WAIT and then the
Reviewed-by : Monk Liu
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Pixel
Ding
Sent: 2018年4月25日 16:40
To: amd-gfx@lists.freedesktop.org
Cc: Ding, Pixel
Subject: [PATCH] drm/scheduler: don't update
Hi Monk,
Please review it. Thanks.
—
Sincerely Yours,
Pixel
On 2018/4/25, 4:39 PM, "Pixel Ding" wrote:
The current sequence in scheduler thread is:
1. update last sched fence
2. job begin (adding to mirror list)
3. job finish (remove from mirror list)
On 04/24/2018 03:35 PM, Chunming Zhou wrote:
Shadow BO is located on GTT and its parent (PT and PD) BO could located on VRAM.
In some case, the BO on GTT could be evicted but the parent did not. This may
cause the shadow BO not be put in the evict list and could not be invalidate
correctly.
On 04/24/2018 03:35 PM, Chunming Zhou wrote:
Change-Id: Ia3e57dbacff05f32b6c02e29aeadabd36f08028e
Signed-off-by: Chunming Zhou
Reviewed-by: Junwei Zhang
some trivial comments.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 75
On 04/26/2018 10:18 AM, Alex Deucher wrote:
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 31 +--
1 file changed, 29 insertions(+), 2
DC is preferred.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff
From: Eric Huang
Add the powertune table for VEGAM.
Signed-off-by: Eric Huang
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c | 189 +
1 file changed, 189
From: Eric Huang
Signed-off-by: Eric Huang
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/atombios.h | 7 +++
1 file changed, 7 insertions(+)
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 42 ++-
1 file changed, 26
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Harry Wentland
Some eDP displays use the extra link rate table to advertise link rate
support. If they do that they don't need to provide link rate through
the usual registers. Since we don't currently have support for the extra
link rate table default to HBR2 for
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 5 +
1 file changed, 5 insertions(+)
diff --git
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Eric Huang
Signed-off-by: Eric Huang
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/inc/smu75.h | 760 ++
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 3 +++
drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 1 +
2
From: Eric Huang
Add functionality to fetch gpio table from vbios.
Signed-off-by: Eric Huang
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
From: Leo Liu
v2: use proper register rather than hardcoding.
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 --
1 file
From: Leo Liu
Directly loaded by VBIOS
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 1 +
1 file changed, 1 insertion(+)
diff
From: "Jerry (Fangzhi) Zuo"
Implement device IDs for VEGAM
Signed-off-by: Jerry (Fangzhi) Zuo
Reviewed-by: Harry Wentland
Acked-by: Alex Deucher
Signed-off-by: Harry Wentland
From: Eric Huang
The smumgr handles communication between the driver
and the SMU for power management.
v2: fix typo (Alex)
Signed-off-by: Eric Huang
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
From: "Jerry (Fangzhi) Zuo"
Add CHIP_VEGAM
Signed-off-by: Jerry (Fangzhi) Zuo
Reviewed-by: Harry Wentland
Reviewed-by: Alex Deucher
Signed-off-by: Harry Wentland
Signed-off-by:
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 21 +++--
1 file changed, 15 insertions(+), 6
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 39 +++
1 file changed, 39
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: Leo Liu
Signed-off-by: Leo Liu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
include/drm/amd_asic_type.h| 1 +
2 files
Ping...
> -Original Message-
> From: Emily Deng [mailto:emily.d...@amd.com]
> Sent: Wednesday, April 25, 2018 11:26 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deng, Emily
> Subject: [PATCH] drm/amdgpu: For sriov reset, move IB test into exclusive
> mode
>
> When
Ping...
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Emily Deng
> Sent: Wednesday, April 25, 2018 2:38 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deng, Emily
> Subject: [PATCH 1/2] drm/amdgpu/sriov: Need to set
Hi Michel,
> This seems like a bad idea, as it would cause basically any userspace
which
> wants to use the GPU to fail to start during a GPU reset.
[Emily] Yes, this is what the change want to do, when driver is doing gpu
recover or hardware is doing reset,
it doesn't want to be
On Wed, Apr 25, 2018 at 11:35:13PM +0200, Daniel Vetter wrote:
> On arm that doesn't work. The iommu api seems like a good fit, except
> the dma-api tends to get in the way a bit (drm/msm apparently has
> similar problems like tegra), and if you need contiguous memory
> dma_alloc_coherent is the
Andrey Grodzovsky writes:
> On 04/25/2018 01:17 PM, Oleg Nesterov wrote:
>> On 04/25, Andrey Grodzovsky wrote:
>>> here (drm_sched_entity_fini) is also a bad idea, but we still want to be
>>> able to exit immediately
>>> and not wait for GPU jobs completion when the
On Wed, Apr 25, 2018 at 08:33:12AM -0700, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 12:04:29PM +0200, Daniel Vetter wrote:
> > - dma api hides the cache flushing requirements from us. GPUs love
> > non-snooped access, and worse give userspace control over that. We want
> > a strict
Hi Christian,
I love your patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.17-rc2 next-20180424]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Wed, Apr 25, 2018 at 5:33 PM, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 12:04:29PM +0200, Daniel Vetter wrote:
>> > Coordinating the backport of a trivial helper in the arm tree is not
>> > the end of the world. Really, this cowboy attitude is a good reason
>> >
On 4/17/2018 5:13 PM, Sinan Kaya wrote:
> Tested-by: Sinan Kaya
>
> using QDF2400 and XFX Vega64 GPU for the first two patches.
>
> ./builddir/tests/amdgpu/amdgpu_test -s 1
>
> Suite: Basic Tests
> Test: Userptr Test ...passed
>
> Userptr Test fails without this patch.
Andrey Grodzovsky writes:
> On 04/24/2018 12:30 PM, Eric W. Biederman wrote:
>> "Panariti, David" writes:
>>
>>> Andrey Grodzovsky writes:
Kind of dma_fence_wait_killable, except that we don't have such API
On Wed, Apr 25, 2018 at 1:13 PM, Sami Farin wrote:
> Is it supposed to work? Now if I use that option, monitor powers off
> (no signal) when it's initializing amdgpu and I have to reset the computer.
> Instead of crashing, could it not just give an error or something?
On Wed, Apr 25, 2018 at 10:44 AM, Alex Deucher wrote:
> On Wed, Apr 25, 2018 at 2:41 AM, Christoph Hellwig wrote:
>> On Wed, Apr 25, 2018 at 02:24:36AM -0400, Alex Deucher wrote:
>>> > It has a non-coherent transaction mode (which the chipset can opt to
On 04/25/2018 01:17 PM, Oleg Nesterov wrote:
On 04/25, Andrey Grodzovsky wrote:
here (drm_sched_entity_fini) is also a bad idea, but we still want to be
able to exit immediately
and not wait for GPU jobs completion when the reason for reaching this code
is because of KILL
signal to the user
On Wed, Apr 25, 2018 at 2:41 AM, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 02:24:36AM -0400, Alex Deucher wrote:
>> > It has a non-coherent transaction mode (which the chipset can opt to
>> > not implement and still flush), to make sure the AGP horror show
>> >
Andrey Grodzovsky writes:
> On 04/25/2018 11:29 AM, Eric W. Biederman wrote:
>
>> Another issue is changing wait_event_killable to wait_event_timeout where I
>> need
>> to understand
>> what TO value is acceptable for all the drivers using the scheduler, or
>> maybe
On 04/25, Andrey Grodzovsky wrote:
>
> here (drm_sched_entity_fini) is also a bad idea, but we still want to be
> able to exit immediately
> and not wait for GPU jobs completion when the reason for reaching this code
> is because of KILL
> signal to the user process who opened the device file.
On 04/24/2018 12:30 PM, Eric W. Biederman wrote:
"Panariti, David" writes:
Andrey Grodzovsky writes:
Kind of dma_fence_wait_killable, except that we don't have such API
(maybe worth adding ?)
Depends on how many places it would be
Hi Dave,
A few fixes for 4.17:
- Fix a hang on CZ boards with EDC enabled
- Fix hangs related to DP MST handling
- Fix a deadlock in irq handling in DC
The following changes since commit 221bda4b5f1abfd74159d7bf3703affa62468030:
Merge branch 'drm-next-4.17' of
On 04/25, Daniel Vetter wrote:
>
> On Wed, Apr 25, 2018 at 3:22 PM, Oleg Nesterov wrote:
> > On 04/24, Daniel Vetter wrote:
> >>
> >> wait_event_killabel doesn't check for fatal_signal_pending before calling
> >> schedule, so definitely has a nice race there.
> >
> > This is
[discussion about this patch, which should have been cced to the iommu
and linux-arm-kernel lists, but wasn't:
https://www.spinics.net/lists/dri-devel/msg173630.html]
On Wed, Apr 25, 2018 at 09:41:51AM +0200, Thierry Reding wrote:
> > API from the iommu/dma-mapping code. Drivers have no
Andrey Grodzovsky writes:
> On 04/25/2018 03:14 AM, Daniel Vetter wrote:
>> On Tue, Apr 24, 2018 at 05:37:08PM -0400, Andrey Grodzovsky wrote:
>>>
>>> On 04/24/2018 05:21 PM, Eric W. Biederman wrote:
Andrey Grodzovsky writes:
>
On 04/24, Daniel Vetter wrote:
>
> wait_event_killabel doesn't check for fatal_signal_pending before calling
> schedule, so definitely has a nice race there.
This is fine. See the signal_pending_state() check in __schedule().
And this doesn't differ from wait_event_interruptible(), it too
On Wed, Apr 25, 2018 at 09:30:39AM +0200, Daniel Vetter wrote:
> On Wed, Apr 25, 2018 at 12:09:05AM -0700, Christoph Hellwig wrote:
> > On Wed, Apr 25, 2018 at 09:02:17AM +0200, Daniel Vetter wrote:
> > > Can we please not nack everything right away? Doesn't really motivate
> > > me to show you
On Wed, Apr 25, 2018 at 09:56:43AM +0200, Thierry Reding wrote:
> And to add to the confusion, none of this seems to be an issue on 64-bit
> ARM where the generic DMA/IOMMU code from drivers/iommu/dma-iommu.c is
> used.
In the long term I want everyone to use that code. Help welcome!
On 04/24, Eric W. Biederman wrote:
>
> Let me respectfully suggest that the wait_event_killable on that code
> path is wrong.
I tend to agree even if I don't know this code.
But if it can be called from f_op->release() then any usage of "current" or
signals looks suspicious. Simply because
On Tue, Apr 24, 2018 at 11:43:35PM -0700, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 08:23:15AM +0200, Daniel Vetter wrote:
> > For more fun:
> >
> > https://www.spinics.net/lists/dri-devel/msg173630.html
> >
> > Yeah, sometimes we want to disable the iommu because the on-gpu
> >
On 04/24, Andrey Grodzovsky wrote:
>
> Currently calling wait_event_killable as part of exiting process
> will stall forever since SIGKILL generation is suppresed by PF_EXITING.
See my reply to 2/3,
> In our partilaur case AMDGPU driver wants to flush all GPU jobs in
> flight before shutting
On Wed, Apr 25, 2018 at 12:09:05AM -0700, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 09:02:17AM +0200, Daniel Vetter wrote:
> > Can we please not nack everything right away? Doesn't really motivate
> > me to show you all the various things we're doing in gpu to make the
> > dma layer work
On Wed, Apr 25, 2018 at 12:04:29PM +0200, Daniel Vetter wrote:
> > Coordinating the backport of a trivial helper in the arm tree is not
> > the end of the world. Really, this cowboy attitude is a good reason
> > why graphics folks have such a bad rep. You keep poking into random
> > kernel
On Wed, Apr 25, 2018 at 01:54:39AM -0700, Christoph Hellwig wrote:
> [discussion about this patch, which should have been cced to the iommu
> and linux-arm-kernel lists, but wasn't:
> https://www.spinics.net/lists/dri-devel/msg173630.html]
>
> On Wed, Apr 25, 2018 at 09:41:51AM +0200, Thierry
On 04/24, Andrey Grodzovsky wrote:
>
> --- a/drivers/gpu/drm/scheduler/gpu_scheduler.c
> +++ b/drivers/gpu/drm/scheduler/gpu_scheduler.c
> @@ -227,9 +227,10 @@ void drm_sched_entity_do_release(struct
> drm_gpu_scheduler *sched,
> return;
> /**
>* The client will not
On 04/25/2018 11:29 AM, Eric W. Biederman wrote:
Another issue is changing wait_event_killable to wait_event_timeout where I need
to understand
what TO value is acceptable for all the drivers using the scheduler, or maybe it
should come as a property
of drm_sched_entity.
It would not surprise
On 2018-04-25 05:21 AM, Dan Carpenter wrote:
> On Tue, Apr 24, 2018 at 02:58:10PM -0400, Felix Kuehling wrote:
>> Reviewed-by: Felix Kuehling
>>
>> We could probably add a sanity check for n_devices to avoid user mode
>> causing excessive memory allocations in the kernel.
On 04/24/2018 05:40 PM, Daniel Vetter wrote:
On Tue, Apr 24, 2018 at 05:02:40PM -0400, Andrey Grodzovsky wrote:
On 04/24/2018 03:44 PM, Daniel Vetter wrote:
On Tue, Apr 24, 2018 at 05:46:52PM +0200, Michel Dänzer wrote:
Adding the dri-devel list, since this is driver independent code.
On
On Wed, Apr 25, 2018 at 3:22 PM, Oleg Nesterov wrote:
> On 04/24, Daniel Vetter wrote:
>>
>> wait_event_killabel doesn't check for fatal_signal_pending before calling
>> schedule, so definitely has a nice race there.
>
> This is fine. See the signal_pending_state() check in
On 04/25/2018 03:14 AM, Daniel Vetter wrote:
On Tue, Apr 24, 2018 at 05:37:08PM -0400, Andrey Grodzovsky wrote:
On 04/24/2018 05:21 PM, Eric W. Biederman wrote:
Andrey Grodzovsky writes:
On 04/24/2018 03:44 PM, Daniel Vetter wrote:
On Tue, Apr 24, 2018 at
On Wed, Apr 25, 2018 at 01:54:39AM -0700, Christoph Hellwig wrote:
> [discussion about this patch, which should have been cced to the iommu
> and linux-arm-kernel lists, but wasn't:
> https://www.spinics.net/lists/dri-devel/msg173630.html]
>
> On Wed, Apr 25, 2018 at 09:41:51AM +0200, Thierry
On 2018-04-24 08:13 PM, Emil Velikov wrote:
> On 10 April 2018 at 09:27, Michel Dänzer wrote:
>> On 2018-04-04 04:29 PM, Emil Velikov wrote:
>>> From: Emil Velikov
>>>
>>> Signed-off-by: Emil Velikov
>>> ---
>>>
On 2018-04-24 09:55 PM, Mathieu Malaterre wrote:
> AGP mode is unstable on PowerPC. Symptoms are generally of the form:
>
> [ 1228.795711] radeon :00:10.0: ring 0 stalled for more than 10240msec
>
> Reviewed-by: Christian König
> Signed-off-by: Mathieu Malaterre
On Tue, Apr 24, 2018 at 02:58:10PM -0400, Felix Kuehling wrote:
> Reviewed-by: Felix Kuehling
>
> We could probably add a sanity check for n_devices to avoid user mode
> causing excessive memory allocations in the kernel. There is no good
> reason for this to be bigger
The current sequence in scheduler thread is:
1. update last sched fence
2. job begin (adding to mirror list)
3. job finish (remove from mirror list)
4. back to 1
Since we update last sched prior to joining mirror list, the jobs
in mirror list already pass the last sched fence. TDR just run
the
On 2018-04-25 08:39 AM, Emily Deng wrote:
> Signed-off-by: Monk Liu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index
On Wed, Apr 25, 2018 at 12:09:05AM -0700, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 09:02:17AM +0200, Daniel Vetter wrote:
> > Can we please not nack everything right away? Doesn't really motivate
> > me to show you all the various things we're doing in gpu to make the
> > dma layer work
On Tue, Apr 24, 2018 at 05:37:08PM -0400, Andrey Grodzovsky wrote:
>
>
> On 04/24/2018 05:21 PM, Eric W. Biederman wrote:
> > Andrey Grodzovsky writes:
> >
> > > On 04/24/2018 03:44 PM, Daniel Vetter wrote:
> > > > On Tue, Apr 24, 2018 at 05:46:52PM +0200, Michel
On Wed, Apr 25, 2018 at 09:02:17AM +0200, Daniel Vetter wrote:
> Can we please not nack everything right away? Doesn't really motivate
> me to show you all the various things we're doing in gpu to make the
> dma layer work for us. That kind of noodling around in lower levels to
> get them to do
On Wed, Apr 25, 2018 at 02:24:36AM -0400, Alex Deucher wrote:
> > It has a non-coherent transaction mode (which the chipset can opt to
> > not implement and still flush), to make sure the AGP horror show
> > doesn't happen again and GPU folks are happy with PCIe. That's at
> > least my
On Wed, Apr 25, 2018 at 08:23:15AM +0200, Daniel Vetter wrote:
> For more fun:
>
> https://www.spinics.net/lists/dri-devel/msg173630.html
>
> Yeah, sometimes we want to disable the iommu because the on-gpu
> pagetables are faster ...
I am not on this list, but remote NAK from here. This needs
On Wed, Apr 25, 2018 at 8:43 AM, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 08:23:15AM +0200, Daniel Vetter wrote:
>> For more fun:
>>
>> https://www.spinics.net/lists/dri-devel/msg173630.html
>>
>> Yeah, sometimes we want to disable the iommu because the on-gpu
>>
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 6d55cae..adeca71 100644
---
After host os reset gpu reset, need to set flag in_gpu_reset to
zero.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
On Tue, Apr 24, 2018 at 9:15 AM, Luc Van Oostenryck
wrote:
> The method struct vga_switcheroo_handler::get_client_id() is defined
> as returning an 'enum vga_switcheroo_client_id' but the implementation
> in this driver, amdgpu_atpx_get_client_id(), returns an 'int'.
On Wed, Apr 25, 2018 at 2:13 AM, Daniel Vetter wrote:
> On Wed, Apr 25, 2018 at 7:48 AM, Christoph Hellwig wrote:
>> On Tue, Apr 24, 2018 at 09:32:20PM +0200, Daniel Vetter wrote:
>>> Out of curiosity, how much virtual flushing stuff is there still out
>>>
On Wed, Apr 25, 2018 at 8:13 AM, Daniel Vetter wrote:
> On Wed, Apr 25, 2018 at 7:48 AM, Christoph Hellwig wrote:
>> On Tue, Apr 24, 2018 at 09:32:20PM +0200, Daniel Vetter wrote:
>>> Out of curiosity, how much virtual flushing stuff is there still out
>>>
On Wed, Apr 25, 2018 at 7:48 AM, Christoph Hellwig wrote:
> On Tue, Apr 24, 2018 at 09:32:20PM +0200, Daniel Vetter wrote:
>> Out of curiosity, how much virtual flushing stuff is there still out
>> there? At least in drm we've pretty much ignore this, and seem to be
>> getting
On Wed, Apr 25, 2018 at 1:48 AM, Christoph Hellwig wrote:
> On Tue, Apr 24, 2018 at 09:32:20PM +0200, Daniel Vetter wrote:
>> Out of curiosity, how much virtual flushing stuff is there still out
>> there? At least in drm we've pretty much ignore this, and seem to be
>> getting
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