[PATCH AUTOSEL 4.19 27/68] drm/amdgpu: Add amdgpu "max bpc" connector property (v2)

From: Nicholas Kazlauskas [ Upstream commit 69756c6ff0de478c10100481f16c966dde3b5339 ] [Why] Many panels support more than 8bpc but some modes are unavailable while running at greater than 8bpc due to DP/HDMI bandwidth constraints. Support for more than 8bpc was added recently in the driver

[PATCH AUTOSEL 4.19 28/68] drm/amd/display: Support amdgpu "max bpc" connector property (v2)

From: Nicholas Kazlauskas [ Upstream commit 07e3a1cfb0568b6d8d7862077029af96af6690ea ] [Why] Many panels support more than 8bpc but some modes are unavailable while running at greater than 8bpc due to DP/HDMI bandwidth constraints. Support for more than 8bpc was added recently in the driver

RE: [PATCH] drm/amdgpu: don't expose fan attributes on APUs

Reviewed-by: Evan Quan > -Original Message- > From: amd-gfx On Behalf Of Alex > Deucher > Sent: 2018年11月29日 2:52 > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; > sta...@vger.kernel.org > Subject: [PATCH] drm/amdgpu: don't expose fan attributes on APUs > > They don't

Re: [PATCH 4/4] drm/edid: Add display_info.rgb_quant_range_selectable

On Wed, Nov 28, 2018 at 12:19 PM Eric Anholt wrote: > > Ville Syrjala writes: > > > From: Ville Syrjälä > > > > Move the CEA-861 QS bit handling entirely into the edid code. No > > need to bother the drivers with this. > > > > Cc: Alex Deucher > > Cc: "Christian König" > > Cc: "David

Re: [PATCH] drm: radeon: fix overflow on 32bit systems

On Wed, Nov 28, 2018 at 3:14 AM Christian König wrote: > > Am 27.11.18 um 12:50 schrieb Yang Xiao: > > From: Young Xiao > > > > the type mem->start is unsigned long, so this can overflow on > > 32bit system, since the type addr is uint64_t. > > > > Signed-off-by: Young Xiao > > Reviewed-by:

Re: [PATCH] drm/amd/pp: fix spelling mistake "dependancy" -> "dependency"

On Tue, Nov 27, 2018 at 9:19 AM Colin King wrote: > > From: Colin Ian King > > There are spelling mistakes in PP_ASSERT_WITH_CODE messages, fix these. > > Signed-off-by: Colin Ian King Applied. thanks! Alex > --- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 +++--- > 1 file

[pull] amdgpu drm-fixes-4.20

Hi Dave, Fixes for 4.20. Nothing major. - DC DP MST fix - GPUVM fix for huge page mapping - RLC fix for vega20 The following changes since commit a5d0f4565996e5595a10cb57b3d1e3d74379c502: drm/amdgpu: Enable HDP memory light sleep (2018-11-20 14:40:15 -0500) are available in the git

Re: [Intel-gfx] [PATCH RFC 2/5] cgroup: Add mechanism to register vendor specific DRM devices

On Wed, Nov 28, 2018 at 4:14 AM Joonas Lahtinen wrote: > So we can only choose the lowest common denominator, right? > > Any core count out of total core count should translate nicely into a > fraction, so what would be the problem with percentage amounts? I don't think having an abstracted

[PATCH] drm/amdgpu: don't expose fan attributes on APUs

They don't have a fan controller. Signed-off-by: Alex Deucher Cc: sta...@vger.kernel.org --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index

Re: [PATCH 4/4] drm/edid: Add display_info.rgb_quant_range_selectable

Ville Syrjala writes: > From: Ville Syrjälä > > Move the CEA-861 QS bit handling entirely into the edid code. No > need to bother the drivers with this. > > Cc: Alex Deucher > Cc: "Christian König" > Cc: "David (ChunMing) Zhou" > Cc: amd-gfx@lists.freedesktop.org > Cc: Eric Anholt

Re: [PATCH v3 1/3] drm/connector: Add generic underscan properties

Brian Starkey writes: > Hi Boris, > > Just because I happened to read the docs in here, one typo below: > > On Thu, Nov 22, 2018 at 12:23:29PM +0100, Boris Brezillon wrote: >>diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c >>index c555e17ab8d7..170317248da6 100644

Re: [PATCH] drm/amd/display: Disable 4k@60 on DP as well for DCE11

On 2018-11-27 3:52 a.m., S, Shirish wrote: > This patch extends the below patch to apply DP signal type, for exactly > the same reasons it was disabled for HDMI. > > "1a0e348 drm/amd/display: Disable 4k 60 HDMI on DCE11" > > Signed-off-by: Shirish S > --- >

Re: [PATCH v3 0/3] Add support for XGMI hive reset

From the design it looks good to me, but I really don't know much about XGMI. When you want to simplify it a bit, I'm pretty sure the calls to ttm_bo_lock_delayed_workqueue()/ttm_bo_unlock_delayed_workqueue() can just be dropped. They are copy & pasted over from radeon and on amdgpu there

Re: [PATCH v3 0/3] Add support for XGMI hive reset

Ping... Andrey On 11/27/2018 01:37 PM, Andrey Grodzovsky wrote: > This set of patches adds support to reset entire XGMI hive > when reset is required. > > Patches 1-2 refactoring a bit the XGMI infrastructure as > preparaton for the actual hive reset change. > > Patch 5 is GPU reset/recovery

Re: [PATCH] drm/amdgpu: disable UVD/VCE for some polaris 12 variants

Yes, my intention was that that patch series may fix the issue you are seeing, but it wasn't exactly clear where the bug was. Alex From: Zhang, Jerry Sent: Tuesday, November 27, 2018 10:48:15 PM To: Alex Deucher Cc: Koenig, Christian; Zhang, Jerry; Deucher,

[PATCH libdrm 3/5] add timeline wait/query ioctl v2

From: Chunming Zhou v2: drop export/import Signed-off-by: Chunming Zhou --- xf86drm.c | 44 xf86drm.h | 8 2 files changed, 52 insertions(+) diff --git a/xf86drm.c b/xf86drm.c index 71ad54ba..afa2f466 100644 --- a/xf86drm.c +++

[PATCH libdrm 1/5] new syncobj extension v2

From: Chunming Zhou v2: drop not implemented IOCTLs and flags Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- include/drm/drm.h | 25 + 1 file changed, 25 insertions(+) diff --git a/include/drm/drm.h b/include/drm/drm.h index 85c685a2..34f1e3f9 100644

[PATCH libdrm 4/5] wrap syncobj timeline query/wait APIs for amdgpu v3

From: Chunming Zhou v2: symbos are stored in lexical order. v3: drop export/import and extra query indirection Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- amdgpu/amdgpu-symbol-check | 2 ++ amdgpu/amdgpu.h| 39 +++

[PATCH libdrm 2/5] addr cs chunk for syncobj timeline

From: Chunming Zhou Signed-off-by: Chunming Zhou --- include/drm/amdgpu_drm.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index 1ceec56d..a3c067dd 100644 --- a/include/drm/amdgpu_drm.h +++ b/include/drm/amdgpu_drm.h @@ -517,6

[PATCH libdrm 5/5] add syncobj timeline tests v2

From: Chunming Zhou v2: drop DRM_SYNCOBJ_CREATE_TYPE_TIMELINE, fix timeout calculation, fix some warnings Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- tests/amdgpu/Makefile.am | 3 +- tests/amdgpu/amdgpu_test.c | 12 ++ tests/amdgpu/amdgpu_test.h | 21

[PATCH 11/11] drm/amdgpu: update version for timeline syncobj support in amdgpu

From: Chunming Zhou Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 90f474f98b6e..316bfc1a6a75 100644 ---

[PATCH 10/11] drm/amdgpu: add timeline support in amdgpu CS v2

From: Chunming Zhou syncobj wait/signal operation is appending in command submission. v2: separate to two kinds in/out_deps functions Signed-off-by: Chunming Zhou Cc: Daniel Rakos Cc: Jason Ekstrand Cc: Bas Nieuwenhuizen Cc: Dave Airlie Cc: Christian König Cc: Chris Wilson ---

[PATCH 08/11] drm/syncobj: add timeline payload query ioctl v4

From: Chunming Zhou user mode can query timeline payload. v2: check return value of copy_to_user v3: handle querying entry by entry v4: rebase on new chain container, simplify interface Signed-off-by: Chunming Zhou Cc: Daniel Rakos Cc: Jason Ekstrand Cc: Bas Nieuwenhuizen Cc: Dave Airlie

[PATCH 05/11] drm/syncobj: remove drm_syncobj_cb and cleanup

This completes "drm/syncobj: Drop add/remove_callback from driver interface" and cleans up the implementation a bit. Signed-off-by: Christian König --- drivers/gpu/drm/drm_syncobj.c | 91 ++- include/drm/drm_syncobj.h | 21 -- 2 files changed,

[PATCH 04/11] drm/syncobj: use only a single stub fence

Extract of useful code from the timeline work. Let's use just a single stub fence instance instead of allocating a new one all the time. Signed-off-by: Chunming Zhou Signed-off-by: Christian König --- drivers/gpu/drm/drm_syncobj.c | 67 ++- 1 file

[PATCH 09/11] drm/syncobj: use the timeline point in drm_syncobj_find_fence v3

Implement finding the right timeline point in drm_syncobj_find_fence. v2: return -EINVAL when the point is not submitted yet. v3: fix reference counting bug, add flags handling as well Signed-off-by: Christian König --- drivers/gpu/drm/drm_syncobj.c | 43

[PATCH 06/11] drm/syncobj: add new drm_syncobj_add_point interface v2

Use the dma_fence_chain object to create a timeline of fence objects instead of just replacing the existing fence. v2: rebase and cleanup Signed-off-by: Christian König --- drivers/gpu/drm/drm_syncobj.c | 37 + include/drm/drm_syncobj.h | 5 + 2

[PATCH 07/11] drm/syncobj: add support for timeline point wait v7

From: Chunming Zhou points array is one-to-one match with syncobjs array. v2: add seperate ioctl for timeline point wait, otherwise break uapi. v3: userspace can specify two kinds waits:: a. Wait for time point to be completed. b. and wait for time point to become available v4: rebase v5: add

[PATCH 01/11] dma-buf: make fence sequence numbers 64 bit

For a lot of use cases we need 64bit sequence numbers. Currently drivers overload the dma_fence structure to store the additional bits. Stop doing that and make the sequence number in the dma_fence always 64bit. For compatibility with hardware which can do only 32bit sequences the comparisons in

[PATCH 03/11] drm: revert "expand replace_fence to support timeline point v2"

This reverts commit 9a09a42369a4a37a959c051d8e1a1f948c1529a4. The whole interface isn't thought through. Since this function can't fail we actually can't allocate an object to store the sync point. Sorry, I should have taken the lead on this from the very beginning and reviewed it more

[PATCH 02/11] dma-buf: add new dma_fence_chain container v2

Lockless container implementation similar to a dma_fence_array, but with only two elements per node and automatic garbage collection. v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno, drop prev reference during garbage collection if it's not a chain fence.

restart syncobj timeline changes v2

Tested this patch set more extensively in the last two weeks and fixed tons of additional bugs. Still only testing with hand made DRM patches, but those are now rather reliable at least on amdgpu. Setting up igt is the next thing on the TODO list. UAPI seems to be pretty solid already except

RE: [Intel-gfx] [PATCH RFC 2/5] cgroup: Add mechanism to register vendor specific DRM devices

Quoting Ho, Kenny (2018-11-27 17:41:17) > On Tue, Nov 27, 2018 at 4:46 AM Joonas Lahtinen > wrote: > > I think a more abstract property "% of GPU (processing power)" might > > be a more universal approach. One can then implement that through > > subdividing the resources or timeslicing them,

[PATCH 1/3] drm/amd/powerplay: support new pptable upload on Vega20

New pptable upload through sysfs interface is supported. Change-Id: Idba7aad2898c05bde1f11c7f9ef2f2f077101d9f Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git

[PATCH 2/3] drm/amd/powerplay: issue pre-display settings for display change event

For display config change event only, pre-display config settings are needed. Change-Id: Ifeee7cf35afc00e2fc0269c2a189c560b2091c49 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 3 +++ drivers/gpu/drm/amd/powerplay/hwmgr/pp_psm.c | 2 -- 2 files changed, 3

[PATCH 3/3] drm/amd/powerplay: support SoftMin/Max setting for some specific DPM

For some case, no need to force SoftMin/Max settings for all DPMs. It's OK to force on some specific DPM only. Change-Id: Ic5c7658b794ec47c815aae8616bbf0a9bf01fd17 Signed-off-by: Evan Quan --- .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 54 +++ 1 file changed, 32

Re: [PATCH] drm: radeon: fix overflow on 32bit systems

Am 27.11.18 um 12:50 schrieb Yang Xiao: From: Young Xiao the type mem->start is unsigned long, so this can overflow on 32bit system, since the type addr is uint64_t. Signed-off-by: Young Xiao Reviewed-by: Christian König --- drivers/gpu/drm/radeon/radeon_vm.c | 2 +- 1 file changed,

Re: [PATCH 1/6] drm/amdgpu: add VCN JPEG support amdgpu_ctx_num_entities

Maybe drop patch #2 when you refactor that code in patch #3 and #4 anyway. On patch #3 I would put the new helper into amdgpu_ctx.c instead because that is rather how rings map to userspace queues. Apart from that it looks good to me. Christian. Am 27.11.18 um 22:10 schrieb Alex Deucher: