Reviewed-by: Feifei Xu
-Original Message-
From: Pan, Xinhui
Sent: Tuesday, March 5, 2019 3:11 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Xu, Feifei ;
Deucher, Alexander
Subject: [PATCH] drm/amdgpu: return err if input is not valid
Signed-off-by: xinhui pan
---
driver
Signed-off-by: xinhui pan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 8b1088dac686..1df6b03a3680 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
I got this kernel Oops when running ROCm kernel in a ARM64 machine with
Vega64 card.
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 20d7e4775d49
On Mon, Mar 04, 2019 at 02:10:00PM +0100, Luc Van Oostenryck wrote:
> The method in struct amdgpu_virt_ops::trans_msg() is defined as
> using an 'u32' for its 2nd argument (the request) but the actual
> implementation()s and calls use an 'enum idh_request' for it.
>
> Fix this by using 'enum idh_r
One not so obvious change here: The fence on the page table after
clear_bo now waits for clearing both the page table and the shadow. That
may make clearing of page tables appear a bit slower. On the other hand,
if you're clearing a bunch of page tables at once, then difference will
be minimal
Adjust vram base offset for XGMI mapping when update the PT entry so
the address will fall into correct XGMI aperture for peer device
Change-Id: I78bdf244da699d2559481ef5afe9663b3e752236
Signed-off-by: shaoyunl
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 21 +
1 file changed
Adjust vram base offset for XGMI mapping when update the PT entry so
the address will fall into correct XGMI aperture for peer device
Change-Id: I78bdf244da699d2559481ef5afe9663b3e752236
Signed-off-by: shaoyunl
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 18 ++
1 file changed, 1
That doesn't seem to have any negative effects.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 30 +++---
1 file changed, 13 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
b/drivers/gpu/drm/amd/amdgpu/vega10_i
The doorbells should already be reserved, just enable them.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 3 +-
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 66 +-
2 files changed, 45 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/
Disable overflow and enable full drain. This makes fault handling on ring 1
much more reliable since we don't generate back pressure any more.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amd
On Sat, Mar 2, 2019 at 5:17 PM Colin King wrote:
>
> From: Colin Ian King
>
> An earlier commit replaced ttm_bo_wait with amdgpu_bo_sync_wait and
> removed the error return assignment to variable ret. Fix this by adding
> the assignment back. Also break line to clean up checkpatch overly
> long l
Hi Luc,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v5.0 next-20190304]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Luc
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Christian
König
Sent: Monday, March 4, 2019 1:36 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: also reroute VMC and UMD to IH ring 1 on Vega 20
Same patch we alredy did for Vega10. Just re
Same patch we alredy did for Vega10. Just re-route page faults to a separate
ring to avoid drowning in interrupts.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 36 ++
1 file changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/
Hi Felix,
I will split this and submit two patches for review.
I didn't realize mprotect can have userptr with more than 2 vmas. For
malloc, it will always be one or two vmas. I will loop over all VMAs to
call hmm_vma_fault to get userptr pages.
Thanks,
Philip
On 2019-03-01 7:46 p.m., Kuehlin
Instead of providing it from outside figure out the ats status in the
function itself from the data structures.
v2: simplify finding the right level
v3: partially revert changes from v2, more cleanup and split code
into more functions.
Signed-off-by: Christian König
Acked-by: Huang Rui
---
This way we only deal with the real BO in here.
v2: use a do { ... } while loop instead
v3: fix NULL pointer in v2
Signed-off-by: Christian König
Acked-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 67 +++---
1 file changed, 39 insertions(+), 28 deletions(-)
d
Am 04.03.19 um 16:59 schrieb StDenis, Tom:
Signed-off-by: Tom St Denis
Acked-by: Christian König
---
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h | 2 ++
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h | 5 +
2 files changed, 7 insertions(+)
diff --git a/dr
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h | 2 ++
drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h | 5 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h
b/drivers/gpu/drm/amd/
The method in struct amdgpu_virt_ops::trans_msg() is defined as
using an 'u32' for its 2nd argument (the request) but the actual
implementation()s and calls use an 'enum idh_request' for it.
Fix this by using 'enum idh_request' for the method declaration too.
Signed-off-by: Luc Van Oostenryck
--
Would be good to verify this across all vega parts (10/12/20). Other than that:
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Christian
König
Sent: Monday, March 4, 2019 8:15 AM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: reroute VMC
Page faults can easily overwhelm the interrupt handler.
So to make sure that we never lose valuable interrupts on the primary ring
we re-route page faults to IH ring 1.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 1 +
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 3
Am 01.03.19 um 17:43 schrieb Bhawanpreet Lakha:
Fixes the warnings below
warning: ‘ta_hdr’ may be used uninitialized in this function
[-Wmaybe-uninitialized]
warning: ISO C90 forbids mixed declarations and code
[-Wdeclaration-after-statement]
warning: unused variable ‘ras_cmd’ [-Wunused-variab
> -Original Message-
> From: Julia Lawall [mailto:julia.law...@lip6.fr]
> Sent: Saturday, March 02, 2019 2:51 PM
> To: Gao, Likun
> Cc: Deucher, Alexander ; Wang, Kevin(Yang)
> ; Quan, Evan ; Koenig,
> Christian ; David Airlie ;
> Daniel Vetter ; Huang, Ray ; amd-
> g...@lists.freedesktop
From: Colin Ian King
An earlier commit replaced ttm_bo_wait with amdgpu_bo_sync_wait and
removed the error return assignment to variable ret. Fix this by adding
the assignment back. Also break line to clean up checkpatch overly
long line warning.
Detected by CoverityScan, CID#1477327 ("Logically
On 3/1/19 5:54 PM, Alex Deucher wrote:
> On Fri, Mar 1, 2019 at 4:51 PM Gustavo A. R. Silva
> wrote:
>>
>> Add missing break statement in order to prevent the code from falling
>> through to case SMU_Discrete_DpmTable.
>>
>> This bug was found thanks to the ongoing efforts to enable
>> -Wimplici
From: kbuild test robot
Simplify the code a bit by using kmemdup instead of kzalloc and memcpy.
Generated by: scripts/coccinelle/api/memdup.cocci
Fixes: 76760fe3c00d ("drm/amd/powerplay: add function to store overdrive
information for smu11")
CC: Likun Gao
Signed-off-by: kbuild test robot
Si
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