From: Marek Olšák
Hopefully we'll only use 1 gfx ring, because otherwise we'd have to have
separate GDS buffers for each gfx ring.
This is a workaround to ensure stability of transform feedback. Shaders hang
waiting for a GDS instruction (ds_sub, not ds_ordered_count).
The disadvantage is that
On 2019-07-16 1:04 p.m., Michel Dänzer wrote:
> On 2019-07-16 6:35 p.m., Jason Gunthorpe wrote:
>> On Tue, Jul 16, 2019 at 06:31:09PM +0200, Michel Dänzer wrote:
>>> On 2019-07-15 7:25 p.m., Jason Gunthorpe wrote:
On Mon, Jul 15, 2019 at 06:51:06PM +0200, Michel Dänzer wrote:
> With a
From: Rob Clark
Needed in the following patch for cache operations.
Signed-off-by: Rob Clark
---
v3: rebased on drm-tip
drivers/gpu/drm/drm_gem.c | 8
drivers/gpu/drm/drm_internal.h | 4 ++--
drivers/gpu/drm/drm_prime.c | 4 ++--
On Tue, 2019-07-16 at 18:28 +, Li, Sun peng (Leo) wrote:
>
>
> On 2019-07-10 6:50 p.m., Lyude Paul wrote:
> > gah. So, I was originally going to ask "why didn't we add the connector
> > name
> > into this?", but then I realized we're doing the right thing already and
> > just
> > doing
Hi folks.
I hit the problem "*ERROR* Waiting for fences timed out or
interrupted!" which is always reproducible in one of the cutscenes in
the game Max Payne 3.
I filled bugreport here: https://bugs.freedesktop.org/show_bug.cgi?id=24
And dumps are attached there.
Could anyone look is enough
On 2019-07-16 5:27 a.m., Christian König wrote:
> Am 13.07.19 um 08:42 schrieb Kuehling, Felix:
>> Walk page table for the faulting address and dump PDEs and PTEs at
>> all levels. Also flag discrepancies where a PDE points to a different
>> address than the next level PDB or PTB BO.
>>
>> v2:
>>
Quoting Rob Clark (2019-07-16 18:43:22)
> From: Rob Clark
>
> Needed in the following patch for cache operations.
What's the base for this patch? (I'm missing the ancestor for drm_gem.c)
-Chris
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
On 2019-07-10 6:50 p.m., Lyude Paul wrote:
> gah. So, I was originally going to ask "why didn't we add the connector name
> into this?", but then I realized we're doing the right thing already and just
> doing card%d-%s % (card_number, path_prop). Which means we probably really
> don't
> want
On Tue, Jul 16, 2019 at 2:15 PM KyleMahlkuch
wrote:
>
> During kexec some adapters hit an EEH since they are not properly
> shut down in the radeon_pci_shutdown() function. Adding
> radeon_suspend_kms() fixes this issue.
>
> Since radeon.h is now included in radeon_drv.c radeon_init() needs
> a
During kexec some adapters hit an EEH since they are not properly
shut down in the radeon_pci_shutdown() function. Adding
radeon_suspend_kms() fixes this issue.
Since radeon.h is now included in radeon_drv.c radeon_init() needs
a new name. I chose radeon_initl(). This can be changed if there is
On Tue, Jul 16, 2019 at 07:04:52PM +0200, Michel Dänzer wrote:
> On 2019-07-16 6:35 p.m., Jason Gunthorpe wrote:
> > On Tue, Jul 16, 2019 at 06:31:09PM +0200, Michel Dänzer wrote:
> >> On 2019-07-15 7:25 p.m., Jason Gunthorpe wrote:
> >>> On Mon, Jul 15, 2019 at 06:51:06PM +0200, Michel Dänzer
On Tue, Jul 16, 2019 at 06:31:09PM +0200, Michel Dänzer wrote:
> On 2019-07-15 7:25 p.m., Jason Gunthorpe wrote:
> > On Mon, Jul 15, 2019 at 06:51:06PM +0200, Michel Dänzer wrote:
> >>
> >> With a KASAN enabled kernel built from amd-staging-drm-next, the
> >> attached use-after-free is pretty
From: Rob Clark
Needed in the following patch for cache operations.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_gem.c | 10 ++
drivers/gpu/drm/drm_gem_vram_helper.c | 6 --
drivers/gpu/drm/drm_prime.c | 4 ++--
Note patch 1 sent to internal amd mailing list for review.
-Original Message-
From: Kim, Jonathan
Sent: Tuesday, July 16, 2019 1:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kim, Jonathan ; Kim, Jonathan
Subject: [PATCH 2/3] drm/amdgpu: add perfmon and fica atomics for df
adding
Note patch 1 sent to internal amd mailing list for review.
-Original Message-
From: Kim, Jonathan
Sent: Tuesday, July 16, 2019 1:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kim, Jonathan ; Kim, Jonathan
Subject: [PATCH 3/3] drm/amdgpu: adding xgmi error monitoring
monitor xgmi errors
adding perfmon and fica atomic operations to adhere to data fabrics finite
state machine requirements for indirect register access.
Change-Id: I2ab17fd59d566b4251c9a9d0e67b897b8c221249
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +
monitor xgmi errors via mc pie status through fica registers.
Change-Id: Id80b6c2f635a294afe343cf55a03902e9a1787a5
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 38 ++--
1 file changed, 36 insertions(+), 2 deletions(-)
diff --git
On 2019-07-16 9:36 a.m., Christian König wrote:
> Am 02.07.19 um 21:35 schrieb Kuehling, Felix:
>> This assumes that page tables are resident when a page fault is handled.
>
> Yeah, that is correct. I also haven't completely figured out how we
> can prevent the VM from being destroyed while
On 2019-07-15 7:25 p.m., Jason Gunthorpe wrote:
> On Mon, Jul 15, 2019 at 06:51:06PM +0200, Michel Dänzer wrote:
>>
>> With a KASAN enabled kernel built from amd-staging-drm-next, the
>> attached use-after-free is pretty reliably detected during a piglit gpu run.
>
> Does this branch you are
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Yuan,
Xiaojie
Sent: Tuesday, July 16, 2019 11:55 AM
To: amd-gfx@lists.freedesktop.org
Cc: tao1.z...@amd.com; Xiao, Jack; Yuan, Xiaojie; Zhang, Hawking
Subject: [PATCH] drm/amdgpu/psp11: check if prior to
Signed-off-by: Xiaojie Yuan
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 87596c69b235..a8b526dbb6c6 100644
---
Am 16.07.19 um 16:31 schrieb Alex Deucher:
Not used anymore.
Noticed-by: Dave Airlie
Signed-off-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vi.c | 1 -
drivers/gpu/drm/amd/amdgpu/vi_dpm.h | 32 -
2 files changed, 33
Not used anymore.
Noticed-by: Dave Airlie
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 1 -
drivers/gpu/drm/amd/amdgpu/vi_dpm.h | 32 -
2 files changed, 33 deletions(-)
delete mode 100644 drivers/gpu/drm/amd/amdgpu/vi_dpm.h
diff --git
Am 26.06.19 um 14:29 schrieb Daniel Vetter:
On Wed, Jun 26, 2019 at 02:23:05PM +0200, Christian König wrote:
On the exporter side we add optional explicit pinning callbacks. If those
callbacks are implemented the framework no longer caches sg tables and the
map/unmap callbacks are always called
Am 02.07.19 um 21:35 schrieb Kuehling, Felix:
This assumes that page tables are resident when a page fault is handled.
Yeah, that is correct. I also haven't completely figured out how we can
prevent the VM from being destroyed while handling the fault.
I mean it's perfectly possible that
On Tue, Jul 16, 2019 at 12:42:07PM +0200, Andrey Konovalov wrote:
> On Mon, Jul 15, 2019 at 8:05 PM Jason Gunthorpe wrote:
> >
> > On Mon, Jul 15, 2019 at 06:01:29PM +0200, Andrey Konovalov wrote:
> > > On Mon, Jun 24, 2019 at 7:40 PM Catalin Marinas
> > > wrote:
> > > >
> > > > On Mon, Jun 24,
Am 16.07.19 um 13:24 schrieb StDenis, Tom:
The register debugfs interface was using the wrong bitmask for vmid
selection for GFX_CNTL.
Signed-off-by: Tom St Denis
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1
The register debugfs interface was using the wrong bitmask for vmid
selection for GFX_CNTL.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
In amdgpu_ras_debugfs_ctrl_parse_data(), first fetch str from buf to
get op value, if op == -1 which means no command matched, fetch data
from buf again.
If change buf between two fetches may cause security problems or
unexpected behaivor. amdgpu_ras_debugfs_ctrl_parse_data() was called
by
On Mon, Jul 15, 2019 at 8:05 PM Jason Gunthorpe wrote:
>
> On Mon, Jul 15, 2019 at 06:01:29PM +0200, Andrey Konovalov wrote:
> > On Mon, Jun 24, 2019 at 7:40 PM Catalin Marinas
> > wrote:
> > >
> > > On Mon, Jun 24, 2019 at 04:32:56PM +0200, Andrey Konovalov wrote:
> > > > This patch is a part
Am 13.07.19 um 08:42 schrieb Kuehling, Felix:
Under memory pressure, buffer moves between RAM to VRAM can
fail when there is no GTT space available. In those cases
amdgpu_bo_move falls back to ttm_bo_move_memcpy, which seems to
succeed, although it doesn't really support non-contiguous or
Am 13.07.19 um 08:42 schrieb Kuehling, Felix:
Walk page table for the faulting address and dump PDEs and PTEs at
all levels. Also flag discrepancies where a PDE points to a different
address than the next level PDB or PTB BO.
v2:
* Fix address shift for GFXv8
* Redo PDB/PTB address checking to
Am 12.07.19 um 15:44 schrieb StDenis, Tom:
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 0d94c812df1b..7d5207bbe382
Am 12.07.19 um 15:44 schrieb StDenis, Tom:
Add 5 bits to the offset for SRBM selection to handle VMIDs. Also
update the select_me_pipe_q() callback to also select VMID.
Maybe split in two patches? Either way Reviewed-by: Christian König
.
Signed-off-by: Tom St Denis
---
On 16.07.19 00:54, Marek Olšák wrote:
> The patch doesn't apply. Can you rebase it?
It's on top of amd-staging-drm-next. I've pushed it to our internal
version of that branch.
Cheers,
Nicolai
>
> Thanks,
> Marek
>
> On Fri, Jul 12, 2019 at 9:47 AM Haehnle, Nicolai
>
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Evan
Quan
Sent: Tuesday, July 16, 2019 4:51 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH 2/2] drm/amd/powerplay: update
Typo: furhter
With that fixed, the patch is Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Kenneth Feng
> Sent: Tuesday, July 16, 2019 4:49 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Feng, Kenneth
> Subject: [PATCH] drm/amd/powerplay: enable fw ctf,apcc
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Evan
Quan
Sent: Tuesday, July 16, 2019 4:51 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH 1/2] drm/amd/powerplay:
Do not halt driver loading on if_version mismatch. As our
driver and FWs are backward compatible.
Change-Id: I01271202d08a62e775efabfb66310f6cc742b9dd
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff
enable fw ctf, apcc dfll and gfx ss on navi10.
fw ctf: when the fw ctf is triggered, the gfx and soc power domain
are shut down. fan speed is boosted to the maximum.
gfx ss: hardware feature, sanity check has been done.
apcc dfll: can check the scoreboard in smu fw to confirm if it's enabled.
no
Ah! Yeah that was a known issue. Please ignore my response as well :)
Sorry for the noise,
Christian.
Am 16.07.19 um 05:41 schrieb Liu, Monk:
Please ignore this patch, looks 643d146c86c2f1e29cb18db93fbcd2ee43e6959f
already addressed the issue.
_
Monk
Am 16.07.19 um 05:08 schrieb Monk Liu:
don't commit sdma vm job if no updates needed and free
the ib
NAK, when the IB is empty then that is a severe bug and we need to find
the root cause.
How did you trigger this?
Christian.
Signed-off-by: Monk Liu
---
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