Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 55da6f5..8b4a568 100644
---
nbif v7_4 interrupt source definition
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
.../amd/include/ivsrcid/nbio/irqsrcs_nbif_7_4.h| 42 ++
1 file changed, 42 insertions(+)
create mode 100644 drivers/gpu/drm/amd/include/ivsrcid/nbio/irqsrcs_nbif_7_4.h
Ras controller interrupt and Ras err event athub interrupt are two dedicated
interrupts for RAS support.
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 4 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 14
ras_controller_interrupt and SDP err_event_athub_interrupt are two dedicated
interrupt for VG20 RAS controller
ras_controller interrupt will be triggered when there is NBIF error. Driver can
leverage this interrupt to query and log necessary error count and other
information.
err_event_athub
For the hardware that can not enable BIF ring for IH cookies for both
ras_controller_irq and err_event_athub_irq, the driver has to poll the
status register in irq handling and ack the hardware properly when there
is interrupt triggered
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
Add mmBIF_INTR_CNTL and its shift mask.
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h | 4 ++--
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
More nbio funcitonalities will be added and nbio could
be treated as an ip block like gfx/sdma.etc
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 87
1 file changed, 87 insertions(+)
create mode 100644
ras_controller_interrupt and err_event_interrupt are ras specific interrupts.
add functions to check their status and ack them if they are generated. both
funcitons should only be invoked in ISR when BIF ring is disabled or even not
initialized.
Signed-off-by: Hawking Zhang
Reviewed-by: Alex
no functional change, just switch to new structures
Signed-off-by: Hawking Zhang
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 63 ++-
drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 16 ++---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
Reviewed-by: Jack Xiao
-Original Message-
From: Yuan, Xiaojie
Sent: Thursday, August 22, 2019 11:01 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Hawking
; Xiao, Jack ; Yuan, Xiaojie
Subject: [PATCH] drm/amdgpu: add dummy read for some GCVM status registers
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Russell, Kent
> Sent: Friday, August 23, 2019 9:37 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Russell, Kent
> Subject: [PATCH] drm/powerplay: Fix Vega20 power reading again
>
> For the 40.46 SMU release, they
Am 25.08.19 um 17:29 schrieb Michel Dänzer:
On 2019-08-24 1:10 p.m., Christian König wrote:
Am 23.08.19 um 22:01 schrieb Gang Ba:
This reverts commit 4f8bc72fbf10f2dc8bca74d5da08b3a981b2e5cd.
Change-Id: I577ba236e0571d11400a51f9d95840234aef678a
Missing Signed-of-by line here. With that fixed
On 2019-08-24 1:10 p.m., Christian König wrote:
> Am 23.08.19 um 22:01 schrieb Gang Ba:
>> This reverts commit 4f8bc72fbf10f2dc8bca74d5da08b3a981b2e5cd.
>>
>> Change-Id: I577ba236e0571d11400a51f9d95840234aef678a
>
> Missing Signed-of-by line here. With that fixed Reviewed-by: Christian
> König
Hi folks,
I left unblocked gnome-shell at noon, and when I returned at the
evening I discovered than monitor not sleeping and show open gnome
activity. At first, I thought that some application did not let fall
asleep the system. But when I try to move the mouse, I realized that
the system hanged.
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