[Why]
HDMI 2.0 adds aspect ratio attribute to distinguish different
4k modes. According to Appendix E of HDMI 2.0 spec, source should
use VSIF to indicate video mode only when the mode is one defined
in HDMI 1.4b 4K modes. Otherwise, use AVI infoframes to convey VIC.
Current code doesn't take aspe
[Why]
In hdmi_mode_alternate_clock(), it adds an exception for VIC 4
mode (4096x2160@24) due to there is no alternate clock defined for
that mode in HDMI1.4b. But HDMI2.0 adds 23.98Hz for that mode.
[How]
Remove the exception
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/drm_edid.c | 3 ---
1 fi
RunBTC is added for Navi ASIC on hardware setup.
Change-Id: I1c04b481ed14d5f12c20b7b0d592b62a65889e4a
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
b/drivers/gpu
Hi Christian,
I add the follow print in function drm_sched_cleanup_jobs. From the log it
shows that only use cancel_delayed_work could not avoid to free job when the
sched is in reset. But don't know exactly where it is wrong about the driver.
Do you have any suggestion about this?
+
Hi Andrey,
On my side, it doesn't need to a specific scenario, I only run the quark
with slow job. Then sometimes, it will have fake hang and hardware fence will
back. For this case, it will randomly occur the NULL pointer issue in
amdgpu_device_gpu_recover.
>-Original Message-
>Fr
Thinking more about this claim - we assume here that if cancel_delayed_work
returned true it guarantees that timeout work is not running but, it merely
means there was a pending timeout work which was removed from the workqueue
before it's timer elapsed and so it didn't have a chance to be deque
Otherwise, without RLC reinitialization, the DPM reenablement
will fail. That affects the custom pptable uploading.
V2: setting/clearing uploading_custom_pp_table in
smu_sys_set_pp_table()
Change-Id: I6fe2ed5ce23f2a5b66f371c0b6d1f924837e5af6
Reported-by: Matt Coffin
Signed-off-by: Evan Quan
> -Original Message-
> From: Alex Deucher
> Sent: Tuesday, November 12, 2019 1:34 AM
> To: Quan, Evan
> Cc: amd-gfx list
> Subject: Re: [PATCH] drm/amd/powerplay: avoid DPM reenable process on
> Navi1x ASICs
>
> On Mon, Nov 11, 2019 at 4:25 AM Evan Quan wrote:
> >
> > Otherwise, with
From: Nicholas Kazlauskas
[Why]
We need some extra dmub_cmd_type for NV10
[How]
Add command table functions in DMUB firmware.
Signed-off-by: Nicholas Kazlauskas
Signed-off-by: Xiong Yan
Reviewed-by: Tony Cheng
Acked-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/am
From: Joshua Aberback
[Why]
There is a case where the margin is between 50 and 60, but applying the
workaround causes a hang. By increasing the threshold, we are blocking more
cases from switching p-state during active, but those cases will fall back
to switching during blank, which is fine.
[Ho
From: Ilya Bakoulin
[Why]
Need to be able to enable native 422 for debugging purposes.
[How]
Add new dc_debug_options bool and check it in the get_dsc_enc_caps
function.
Signed-off-by: Ilya Bakoulin
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h
From: Nikola Cornij
[why]
When updating DSC config, a new config has to be validated before proceeding
with applying the update. Validation, however, modifies the current state.
This means DSC config validation would affect pipe re-assignment, causing
intermittent screen corruption issues when OD
From: Jaehyun Chung
[Why]
Need validation that we are programming the expected values (rq, ttu, dlg)
from DML. This debug feature will output logs if we are programming
incorrect values and may help differentiate DAL issues from HW issues.
[How]
Dump relevant registers for each pipe with active
From: Nikola Cornij
[why]
In SST mode no idle pattern will be generated after link training if
DIG FE is not connected to DIG BE.
Signed-off-by: Nikola Cornij
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4
1 file changed, 4 inse
From: Samson Tam
[Why]
When sending DCC with Stereo, DCC gets enabled but the meta addresses
are 0. This happens momentarily before the meta addresses are populated
with a valid address.
[How]
Add call validate_dcc_with_meta_address() in
copy_surface_update_to_plane() to check for surface addres
From: Wenjing Liu
[why]
In the TEST_MSIC dpcd register field definition, the test equipment
has the option to choose between YCbCr601 or YCbCr709.
We will apply corresponding YCbCr coefficient based on this test
request.
[how]
Add a new input parameter in dc_link_dp_set_test_pattern to allow the
From: Nicholas Kazlauskas
[Why]
By default we shouldn't be trying to write secure registers during
DMUB hardware init.
[How]
Add a parameter to control whether we put the DMCUB into secure reset
and attempt to load CW0/CW1.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Tony Cheng
Acked-by:
From: Michael Strauss
[WHY]
There can be a conflict between OS HDR multiplier and 3dlut HDR
multiplier, which are both sent to DC.
[HOW]
Instead of having dc determine which HDR multiplier to use, make the
decision in dm and send only the intended value in a surface update.
Store the current OS
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 4c6c2fcc6a96..da
From: Anthony Koo
[Why]
Too many construct functions which makes searching
difficult, especially on some debuggers.
[How]
Append all construct and destruct functions with dcn
number and object type to make each construct function
name unique
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Ac
From: Nicholas Kazlauskas
[Why]
It's an interface violation to use infinite loops within DMUB
service functions and we'll lock up the kernel by doing so.
[How]
Revert the function back to its intended functionality.
Move the infinite loops into DC/DM as necessary.
Signed-off-by: Nicholas Kazlau
From: Mikita Lipski
[why]
We were missing debugfs files on MST connectors as the files
weren't initialized.
[how]
Move connector debugfs initialization into connoctor's
init helper function so it will be called by both SST and MST
connectors. Also move connector registration so it will be
regist
This DC patchset brings improvements in multiple areas. In summary, we
have:
* Some adjustments in Renoir register
* Enhancements in DMUB
* Some code cleanup
* Improvements and fixes in debugfs
Alvin Lee (1):
drm/amd/display: Changes in dc to allow full update in some cases
Anthony Koo (3):
From: Yongqiang Sun
[Why & How]
1. Add trace code enum for easy debugging.
2. Add trace during uC boot up, including loading phy FW
and dmcu FW.
3. Change cache memory type back to write back,
since write through has issue when resume from S0i3 100% hang after
3.2ms.
4. Change CW3 base a
From: Stylon Wang
[Why]
HDMI 2.0 HF-VSDB in EDID defines supported color depths in YCBCR420 modes.
But we did not honor these bit masks when choosing pixel encoding.
HDMI 2.0 compliance tests with deep color and YCBCR420 failed as a result.
[How]
Cap color depth based on y420_dc_modes from EDID.
From: Joseph Gravenor
[why]
Before we were reading registers specific to luma size, which caused a black
line
to appear on the screen from time to time, as although the luma row height
is generally the same as the chroma row height for the video case, it will
sometimes
be one more
[how]
Read t
From: "David (Dingchen) Zhang"
[why]
need to send immediate SDP message via debugfs on Navi board.
[how]
hook up the DCN1x encoder function of sending immediate sdp
message to DCN2.
Signed-off-by: David (Dingchen) Zhang
Reviewed-by: Harry Wentland
Acked-by: Rodrigo Siqueira
---
drivers/gpu/
From: Nicholas Kazlauskas
[Why]
DCN will hang if we access registers before PHY init is done.
So we need to spin or abort.
[How]
On hardware with DMCUB running and working we shouldn't time out
waiting for this to finish and we shouldn't hit the spin cycle.
If there's no hardware support then
From: "Leo (Hanghong) Ma"
[Why]
For debug purpose, we need to check HUBP_CLOCK_ENABLE in DTN
log debugfs on Navi.
[How]
Add related register read in dcn20_hubp.c.
Signed-off-by: Leo (Hanghong) Ma
Reviewed-by: Harry Wentland
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn20
From: abdoulaye berthe
Signed-off-by: abdoulaye berthe
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 92 +++
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 48 --
drivers/gpu/drm/amd/display/dc/dc_link.h |
From: Joseph Gravenor
[why]
we want to increase the pte row plus 1 line if chroma viewport
height is integer multiple of the pte row height
[how]
instead of ceiling viewport height, we floor it. this allows
us to accommodate both cases: those where the chroma viewport
height is integer multiple
From: Alvin Lee
Changes in dc to allow for different cases where full update is
required.
Signed-off-by: Alvin Lee
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 22 +++
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 2 +-
From: Samson Tam
[Why]
Hanging on RV for DTN driver verifier
[How]
Roll back change and investigate further
Signed-off-by: Samson Tam
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 27
1 file changed, 27 deletions(-)
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 2e6b3ecd564d..4c
From: Mikita Lipski
[why]
Previous patch allowed to initialize debugfs entries on both MST
and SST connectors, but MST connectors get registered much later
which exposed an issue of debugfs entries being initialized in the
same folder.
[how]
Return SST debugfs entries' initialization back to whe
From: Hugo Hu
[Why]
Background color only takes effect in bottommost mpcc.
[How]
Update background color in bottommost mpcc.
Signed-off-by: Hugo Hu
Reviewed-by: Yongqiang Sun
Acked-by: Rodrigo Siqueira
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 19 +--
1 file change
From: Anthony Koo
[Why]
Unused register in the code
[How]
Remove unused register
Signed-off-by: Anthony Koo
Reviewed-by: Tony Cheng
Acked-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu
From: Nicholas Kazlauskas
[Why]
We want to avoid reprogramming the cache window when possible.
We don't need to worry about it for S3 but we *do* need to worry about
it for S4 resume.
DM can check whether hardware should be reinitialized or store software
state when going to S4 to know whether
Patch is Tested-by: Matt Coffin
On 11/11/19 2:25 AM, Evan Quan wrote:
> Otherwise, without RLC reinitialization, the DPM reenablement
> will fail. That affects the custom pptable uploading.
>
> Change-Id: I6fe2ed5ce23f2a5b66f371c0b6d1f924837e5af6
> Signed-off-by: Evan Quan
> ---
> drivers/gpu/
Thanks Evan. I can confirm that the linked patch resolves the issue for me.
I commented and resolved the bug as well in case other people find it.
Cheers,
Matt
On 11/11/19 2:28 AM, Quan, Evan wrote:
> Just sent out a patch which should be able to address this issue.
> https://lists.freedesktop.o
workgroup context data writes from m->cp_hqd_cntl_stack_size, so we
should deduct it when calculating the used size.
Change-Id: I5252e25662c3b8221f451c39115bf084d1911eae
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 3 ++-
1 file changed, 2 insertions(+), 1 delet
Ported from gfx9.
Change-Id: I388dc7c609ed724a6d600840f8e7317d9c2c877d
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
b/drivers/gpu/drm/
Given control stack is now in the userspace context save restore area
on GFX10, the same as GFX8, it is not needed to copy it back to userspace.
Change-Id: I063ddc3026eefa57713ec47b466a90f9bf9d49b8
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c | 14 +-
The NULL pointer is not an issue, because for DIQ, the if (q) condition,
which guards the section but is now shown, will never be satisfied.
Anyway, I still added the NULL pointer check.
With that, I have pushed the change.
Yong
On 2019-11-11 3:51 p.m., Felix Kuehling wrote:
On 2019-11-11 1
Applied. Thanks!
Alex
On Mon, Nov 11, 2019 at 2:44 PM Gustavo A. R. Silva
wrote:
>
>
>
> On 11/11/19 11:46, Mikita Lipski wrote:
> >
> > Thanks for catching it!
> >
>
> Glad to help out. :)
>
> > Reviewed-by: Mikita Lipski
> >
>
> Thanks
> --
> Gustavo
>
> >
> > On 11.11.2019 12:25, Gustavo A.
Move reset_method next to reset callback to match the struct layout and
the other definition in this file.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/
Emily - is there a particular scenario to reproduce this ? I am trying
with libdrm deadlock test and artificially delaying the GPU reset logic
until after the guilty job is signaling but indeed nothing bad happens
as drm_sched_cleanup_jobs returns early because there is a reset in
progress and
On 2019-10-08 2:15 p.m., Julien Isorce wrote:
> Hi Harry,
>
> I can reproduce on LG, Samsung and NEC monitors.
>
> "Have you checked whether the driver picks RGB or YCBCR420 without your
> patch?" -> it was selecting RGB .
>
> For example on https://commons.wikimedia.org/wiki/File:Gray_scale.jpg
On 2019-11-11 15:43, Felix Kuehling wrote:
On 2019-11-01 16:10, Zhao, Yong wrote:
dorbell_off in the queue properties is mainly used for the doorbell dw
offset in pci bar. We should not set it to the doorbell byte offset in
process doorbell pages. This makes the code much easier to read.
I kin
flush/cancel delayed works before doing finalization
to avoid concurrently requests.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
in
On 2019-11-01 16:10, Zhao, Yong wrote:
dorbell_off in the queue properties is mainly used for the doorbell dw
offset in pci bar. We should not set it to the doorbell byte offset in
process doorbell pages. This makes the code much easier to read.
I kind of agree. I think what's confusing is that
On 2019-11-07 10:56 a.m., Bhawanpreet Lakha wrote:
> Just like with the 1.4 series of patches This only introduces the
> ability to authenticate and encrypt the link. These patches by
> themselves don't constitute a complete and compliant HDCP content
> protection solution but are a requirement for
On Mon, Nov 11, 2019 at 3:29 PM Kyle Mahlkuch
wrote:
>
> From: KyleMahlkuch
>
> This fixes the formatting on one comment and consolidates the
> pci_get_drvdata() into the radeon_suspend_kms().
>
> Signed-off-by: Kyle Mahlkuch
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/radeon/radeon_drv.c
On 2019-11-01 16:10, Zhao, Yong wrote:
Change-Id: I75da23bba90231762cf58da3170f5bb77ece45ed
Signed-off-by: Yong Zhao
I agree with the name changes. One suggestion for a comment inline. With
that fixed, this patch is
Reviewed-by: Felix Kuehling
---
.../gpu/drm/amd/amdkfd/kfd_device_que
From: KyleMahlkuch
This fixes the formatting on one comment and consolidates the
pci_get_drvdata() into the radeon_suspend_kms().
Signed-off-by: Kyle Mahlkuch
---
drivers/gpu/drm/radeon/radeon_drv.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/ra
On Mon, Nov 11, 2019 at 1:01 PM Alex Deucher wrote:
>
> Applied. Thanks!
I've dropped this as it leads to a warning in the code since
get_color_depth is no longer used. Care to fix that up as well?
Thanks!
Alex
>
> Alex
>
> On Sun, Nov 10, 2019 at 9:30 PM YueHaibing wrote:
> >
> > Fixes gcc
On 2019-11-01 16:12, Zhao, Yong wrote:
create_cp_queue() could also work with SDMA queues, so we should rename
it.
Change-Id: I76cbaed8fa95dd9062d786cbc1dd037ff041da9d
Signed-off-by: Yong Zhao
The name change makes sense. This patch is
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/am
On 11/11/19 11:46, Mikita Lipski wrote:
>
> Thanks for catching it!
>
Glad to help out. :)
> Reviewed-by: Mikita Lipski
>
Thanks
--
Gustavo
>
> On 11.11.2019 12:25, Gustavo A. R. Silva wrote:
>> Currenly, the error check below on variable*vcpi_slots* is always
>> false because it is a u
From: Bjorn Helgaas
amdgpu and radeon do a bit of mucking with the PCIe Link Control 2
register, some of it using hard-coded magic numbers. The idea here is to
replace those with #defines.
I don't intend the Target Link Speed patch to change anything, so it should
be straightforward to review.
From: Bjorn Helgaas
Add definitions for these PCIe Link Control 2 register fields:
Enter Compliance
Transmit Margin
and use them in amdgpu and radeon.
NOTE: This is a functional change because "7 << 9" was apparently a typo.
That mask included the high order bit of Transmit Margin, the Ent
From: Bjorn Helgaas
Replace hard-coded magic numbers with the descript PCI_EXP_LNKCTL2
definitions. No functional change intended.
Signed-off-by: Bjorn Helgaas
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c | 8
drivers/gpu/drm/amd/amdgpu/si.c | 8
drivers/
[Why]
On Navi10, and presumably arcterus, updating pp_table via sysfs would
not re-scale the maximum possible power limit one can set. On navi10,
the SMU code ignored the power percentage overdrive setting entirely,
and would not allow you to exceed the default power limit at all.
[How]
Adding a f
[Why]
Before this patch, navi10 overdrive settings could not be printed via
pp_od_clk_voltage
[How]
Implement printing for the overdrive settings for the following clocks
in navi10's ppt print_clk_levels implementation:
* SMU_OD_SCLK
* SMU_OD_MCLK
* SMU_OD_VDDC_CURVE
Signed-off-by: Matt Coffin
[Why]
Before this patch, there was no way to use pp_od_clk_voltage on navi
[How]
Similar to the vega20 implementation, but using the common smc_v11_0
headers, implemented the pp_od_clk_voltage API for navi10's pptable
implementation
Signed-off-by: Matt Coffin
---
drivers/gpu/drm/amd/powerplay/i
[Why]
Before this patch, there was no way to set the gfxclk voltage curve in
the overdrive settings for navi10 through pp_od_clk_voltage
[How]
Add the required implementation to navi10's ppt dpm table editing
implementation, similar to the vega20 implementation and interface.
Signed-off-by: Matt
Note that kthread_park waits for kthread->parked to be signaled before
proceeding - so in the scenario you described it meas main thread is
running (not parked and so kthread->parked is not signaled) and so
kthread_park will not proceed until the sched thread finish current loop
(including remo
ping
On 2019-11-01 4:10 p.m., Zhao, Yong wrote:
Change-Id: I75da23bba90231762cf58da3170f5bb77ece45ed
Signed-off-by: Yong Zhao
---
.../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c | 14 +++---
drivers/gpu/drm/amd/amdkfd/kf
ping
On 2019-11-01 4:12 p.m., Zhao, Yong wrote:
create_cp_queue() could also work with SDMA queues, so we should rename
it.
Change-Id: I76cbaed8fa95dd9062d786cbc1dd037ff041da9d
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c | 6 +++---
1 file changed, 3
Applied. Thanks!
Alex
On Sun, Nov 10, 2019 at 9:30 PM YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c: In function
> get_pbn_from_timing:
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:2364:11: warning:
Applied. thanks!
Alex
On Sun, Nov 10, 2019 at 9:29 PM YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c: In function
> dp_wa_power_up_0010FA:
> drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:2320:35:
Applied. Thanks!
Alex
On Mon, Nov 11, 2019 at 3:07 AM zhengbin wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c: In function
> fiji_populate_single_graphic_level:
> drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c:943:11: warnin
Applied. Thanks!
Alex
On Mon, Nov 11, 2019 at 9:11 AM zhengbin wrote:
>
> Move the static keyword to the front of declarations.
>
> Reported-by: Hulk Robot
> Signed-off-by: zhengbin
> ---
> drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> d
Applied. Thanks!
Alex
On Sun, Nov 10, 2019 at 11:04 PM Quan, Evan wrote:
>
> Series is reviewed-by: Evan Quan
>
> > -Original Message-
> > From: zhengbin
> > Sent: Monday, November 11, 2019 11:46 AM
> > To: rex@amd.com; Quan, Evan ; Deucher,
> > Alexander ; Koenig, Christian
> > ;
Currenly, the error check below on variable *vcpi_slots* is always
false because it is a uint64_t type variable, hence, the values
this variable can hold are never less than zero:
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:
4870 if (dm_new_connector_state->vcpi_slots < 0) {
4871
Thanks for catching it!
Reviewed-by: Mikita Lipski
On 11.11.2019 12:25, Gustavo A. R. Silva wrote:
Currenly, the error check below on variable*vcpi_slots* is always
false because it is a uint64_t type variable, hence, the values
this variable can hold are never less than zero:
drivers/gpu/
Patch is missing your signed-off-by. Please address Evan's comments
and the signed off by and I'll apply it.
Thanks!
Alex
On Sun, Nov 10, 2019 at 11:03 PM Quan, Evan wrote:
>
> If smu_get_pptable_power_limit() is designed to be used internally, the
> second argument "lock_needed" can be dropp
Patches are missing your Signed-off-by. Please follow up with that
and I'll apply them.
Thanks!
Alex
On Fri, Nov 8, 2019 at 4:28 PM Matt Coffin wrote:
>
> [Why]
> Before this patchset, navi10 users could not utilize the overdrive
> functionality. This prevented them from overclocking, overvolt
Applied. Thanks!
Alex
On Mon, Nov 11, 2019 at 8:38 AM Kazlauskas, Nicholas
wrote:
>
> On 2019-11-09 10:49 a.m., Colin King wrote:
> > From: Colin Ian King
> >
> > There is comparison expression that is duplicated and hence one
> > of the expressions can be removed. Remove it.
> >
> > Addresse
On Mon, Nov 11, 2019 at 4:25 AM Evan Quan wrote:
>
> Otherwise, without RLC reinitialization, the DPM reenablement
> will fail. That affects the custom pptable uploading.
>
> Change-Id: I6fe2ed5ce23f2a5b66f371c0b6d1f924837e5af6
> Signed-off-by: Evan Quan
> ---
> drivers/gpu/drm/amd/powerplay/amd
Applied. Thanks!
Alex
On Mon, Nov 11, 2019 at 8:37 AM Kazlauskas, Nicholas
wrote:
>
> On 2019-11-09 2:49 p.m., Colin King wrote:
> > From: Colin Ian King
> >
> > There are spelling mistakes in a DC_ERROR message and a comment.
> > Fix these.
> >
> > Signed-off-by: Colin Ian King
>
> Reviewed-
Reviewed-by: Alex Deucher
From: Hawking Zhang
Sent: Sunday, November 10, 2019 11:41 PM
To: amd-gfx@lists.freedesktop.org ; Deucher,
Alexander ; Clements John ;
Ma, Le
Cc: Zhang, Hawking
Subject: [PATCH] drm/amdgpu: avoid upload corrupted ta ucode to psp
xgmi,
This patch reworks the whole delayed deletion of BOs which aren't idle.
Instead of having two counters for the BO structure we resurrect the BO
when we find that a deleted BO is not idle yet.
This has many advantages, especially that we don't need to
increment/decrement the BOs reference counter
When non-imported BOs are resurrected for delayed delete we replace
the dma_resv object to allow for easy reclaiming of the resources.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo
The function is always called with deleted BOs.
While at it cleanup the indentation as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo
Ghost BOs need to stick with the resv object only when the origin is imported.
This is a low hanging fruit to avoid OOM situations on evictions.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo_util.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/d
On 2019-11-10 7:00 p.m., Subsentient wrote:
Hi, I've been experiencing a bug on kernels 5.2 and up that apparently
is uncommon and/or unimportant enough to have both threads mentioning it
die.
On a Ryzen 3 2200G, the amdgpu driver fails upon lightdm login:
https://bugzilla.redhat.com/show_bug
Fix a build warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:75:1:
warning: 'static' is not at beginning of declaration [-Wold-style-declaration]
Signed-off-by: YueHaibing
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Move the static keyword to the front of declarations.
Reported-by: Hulk Robot
Signed-off-by: zhengbin
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/
On 2019-11-09 2:49 p.m., Colin King wrote:
From: Colin Ian King
There are spelling mistakes in a DC_ERROR message and a comment.
Fix these.
Signed-off-by: Colin Ian King
Reviewed-by: Nicholas Kazlauskas
Thanks!
Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c|
On 2019-11-09 10:49 a.m., Colin King wrote:
From: Colin Ian King
There is comparison expression that is duplicated and hence one
of the expressions can be removed. Remove it.
Addresses-Coverity: ("Same on both sides")
Fixes: 12e2b2d4c65f ("drm/amd/display: add dcc programming for dual plane")
Just sent out a patch which should be able to address this issue.
https://lists.freedesktop.org/archives/amd-gfx/2019-November/042458.html
Regards,
Evan
> -Original Message-
> From: Matt Coffin
> Sent: Saturday, November 9, 2019 4:50 AM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> C
Otherwise, without RLC reinitialization, the DPM reenablement
will fail. That affects the custom pptable uploading.
Change-Id: I6fe2ed5ce23f2a5b66f371c0b6d1f924837e5af6
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 32 +++
.../gpu/drm/amd/powerplay/
Hi Christian and Andrey,
The issue I encountered is the bad job is freeing after entering to the
amdgpu_device_gpu_recover. Don't know why, as per Christian said, it will call
cancel_delayed_work in drm_sched_cleanup_jobs.
Best wishes
Emily Deng
>-Original Message-
>From: amd-gfx
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c: In function
get_pbn_from_timing:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:2364:11: warning:
variable bpc set but not used [-Wunused-but-set-variable]
It is not used since commi
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c: In function
dp_wa_power_up_0010FA:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:2320:35: warning:
variable ds_port set but not used [-Wunused-but-set-variable]
It is never us
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c: In function
vega10_get_performance_level:
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c:5217:23: warning: variable
data set but not used [-Wunused-but-set-variable]
'data' is introduced by co
From: Colin Ian King
There are spelling mistakes in a DC_ERROR message and a comment.
Fix these.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c| 2 +-
drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
d
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c: In function
fiji_populate_single_graphic_level:
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c:943:11: warning: variable
threshold set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/a
zhengbin (2):
drm/amd/powerplay: remove set but not used variable
'vbios_version','data'
drm/amd/powerplay: remove set but not used variable 'data'
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 4
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 2 --
2 files changed, 6 de
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c: In function
smu7_check_mc_firmware:
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:4215:11: warning: variable
vbios_version set but not used [-Wunused-but-set-variable]
drivers/gpu/drm/amd/powerpla
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