Reviewed-by: xinhui pan
> 2020年3月30日 18:50，Christian König 写道：
>
> The problem is that we can't add the clear fence to the BO
> when there is an exclusive fence on it since we can't
> guarantee the the clear fence will complete after the
> exclusive one.
>
> To fix this refactor the function
This patch seems to be using DOS line-endings. After converting
it to UNIX line-endings, the output of "git am" using "scripts/checkpatch.pl"
via the pre-commit hook is appended last to my thoughts below.
On 2020-03-30 11:49 a.m., Nirmoy Das wrote:
> Generate HW IP's sched_list in
[Why]
The buffer used when calling psp is a shared buffer. If we have multiple calls
at the same time we can overwrite the buffer.
[How]
Add mutex to guard the shared buffer.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +
On 2020-03-30 2:00 p.m., Bhawanpreet Lakha wrote:
[Why]
Some displays have an issue where the hdcp chips are initialized after the
display has already lit up. This means we can sometimes authentication too early
and cause authentication failures.
This happens when HDCP is enabled and the
[Why]
Some displays have an issue where the hdcp chips are initialized after the
display has already lit up. This means we can sometimes authentication too early
and cause authentication failures.
This happens when HDCP is enabled and the display is power cycled. Normally we
will authenticate 2
[Why]
-We need to cancel future callbacks/watchdogs events when a callback/watchdog
event happens
[How]
-fix typo in event_callback()
-cancel callback, not watchdog
-cancel watchdog events in event_watchdog_timer().
Signed-off-by: Bhawanpreet Lakha
---
On 2020-03-30 10:21 a.m., Leo Liu wrote:
On 2020-03-30 8:13 a.m., James Zhu wrote:
Added firmware share memory support for VCN. Current multiple
queue mode is enabled only.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 13 +
Generate HW IP's sched_list in amdgpu_ring_init() instead of
amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(),
ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary.
This patch also stores sched_list for all HW IPs in one big
array in struct amdgpu_device which makes
Am 2020-03-30 um 11:24 a.m. schrieb Alex Sierra:
> This reverts commit 6237cb9febd7d61780d281e7141e12462c81cfb8.
> Due to Loading driver failed at "*ERROR* ring sdma0 test failed" issue:
> SWDEV-229211
The Jira ticket is not visible to the public. Therefore please include
more information about
This reverts commit 6237cb9febd7d61780d281e7141e12462c81cfb8.
Due to Loading driver failed at "*ERROR* ring sdma0 test failed" issue:
SWDEV-229211
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git
On Monday, March 30, 2020 5:18 PM, Kazlauskas, Nicholas
wrote:
> On 2020-03-30 9:13 a.m., Simon Ser wrote:
>
> > On Monday, March 30, 2020 3:11 PM, Kazlauskas, Nicholas
> > nicholas.kazlaus...@amd.com wrote:
> >
> > > On 2020-03-30 9:02 a.m., Simon Ser wrote:
> > >
> > > > On Monday, March 30,
On 2020-03-30 9:13 a.m., Simon Ser wrote:
On Monday, March 30, 2020 3:11 PM, Kazlauskas, Nicholas
wrote:
On 2020-03-30 9:02 a.m., Simon Ser wrote:
On Monday, March 30, 2020 2:59 PM, Kazlauskas, Nicholas
nicholas.kazlaus...@amd.com wrote:
We've been doing these checks for position before
On Mon, Mar 30, 2020 at 01:54:33PM +, Deucher, Alexander wrote:
> > -Original Message-
> > From: Bjorn Helgaas
> > Sent: Saturday, March 28, 2020 4:19 PM
> > To: Mikel Rychliski
> > Cc: amd-gfx@lists.freedesktop.org; linux-...@vger.kernel.org;
> > nouv...@lists.freedesktop.org;
On 3/30/20 4:13 PM, Christian König wrote:
Am 30.03.20 um 16:02 schrieb Nirmoy Das:
Generate HW IP's sched_list in amdgpu_ring_init() instead of
amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(),
ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary.
This patch also stores
On 2020-03-30 8:13 a.m., James Zhu wrote:
Added firmware share memory support for VCN. Current multiple
queue mode is enabled only.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 13 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 24
Am 30.03.20 um 16:02 schrieb Nirmoy Das:
Generate HW IP's sched_list in amdgpu_ring_init() instead of
amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(),
ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary.
This patch also stores sched_list for all HW IPs in one big
array in struct
Generate HW IP's sched_list in amdgpu_ring_init() instead of
amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(),
ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary.
This patch also stores sched_list for all HW IPs in one big
array in struct amdgpu_device which makes
Importing should work out of the box.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index ffeb20f11c07..aef12ee2f1e3
Check if we can do peer2peer on the PCIe bus.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index
Calling ttm_bo_cleanup_memtype_use() destroys the TT object
which in turn could result in warnings without this.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c
Add a peer2peer flag noting that the importer can deal with device
resources which are not backed by pages.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-buf.c | 2 ++
include/linux/dma-buf.h | 10 ++
2 files changed, 12 insertions(+)
diff --git a/drivers/dma-buf/dma-buf.c
We should be able to do this now after checking all the prerequisites.
v2: fix entrie count in the sgt
v3: manually construct the sg
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 56 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 12 ++-
Note if a buffer was imported using peer2peer.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index
[AMD Public Use]
> -Original Message-
> From: Bjorn Helgaas
> Sent: Saturday, March 28, 2020 4:19 PM
> To: Mikel Rychliski
> Cc: amd-gfx@lists.freedesktop.org; linux-...@vger.kernel.org;
> nouv...@lists.freedesktop.org; Deucher, Alexander
> ; Koenig, Christian
> ; Zhou, David(ChunMing)
On Monday, March 30, 2020 3:11 PM, Kazlauskas, Nicholas
wrote:
> On 2020-03-30 9:02 a.m., Simon Ser wrote:
>
> > On Monday, March 30, 2020 2:59 PM, Kazlauskas, Nicholas
> > nicholas.kazlaus...@amd.com wrote:
> >
> > > We've been doing these checks for position before but I don't think we
> > >
On 2020-03-30 9:02 a.m., Simon Ser wrote:
On Monday, March 30, 2020 2:59 PM, Kazlauskas, Nicholas
wrote:
We've been doing these checks for position before but I don't think we
really need them. DC should be disabling the cursor when we ask for a
position completely off the screen.
I think
On Monday, March 30, 2020 2:59 PM, Kazlauskas, Nicholas
wrote:
> We've been doing these checks for position before but I don't think we
> really need them. DC should be disabling the cursor when we ask for a
> position completely off the screen.
>
> I think that's better than rejecting the
On 2020-03-30 5:23 a.m., Simon Ser wrote:
This patch adds a basic cursor check when an atomic test-only commit is
performed. The position and size of the cursor plane is checked.
This should fix user-space relying on atomic checks to assign buffers to
planes.
Signed-off-by: Simon Ser
Hi Emily
Many thanks
-Original Message-
From: Deng, Emily
Sent: 2020年3月30日 19:57
To: Tao, Yintian ; Koenig, Christian
; Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org; Tao, Yintian
Subject: RE: [PATCH] drm/amdgpu: skip access sdma_v5_0 registers under SRIOV
[AMD Official Use
Add firmware write/read point reset sync through shared memory
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 42 ---
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
Add vcn dpg harware synchronization to fix race condition
issue between vcn driver and hardware.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
Add vcn dpg harware synchronization to fix race condition
issue between vcn driver and hardware.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
Add firmware write/read point reset sync through shared memory
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 51 ---
1 file changed, 47 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
Added firmware share memory support for VCN. Current multiple
queue mode is enabled only.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 13 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 24
2 files changed, 37 insertions(+)
diff --git
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Emily Deng
Best wishes
Emily Deng
>-Original Message-
>From: amd-gfx On Behalf Of Yintian
>Tao
>Sent: Monday, March 30, 2020 4:50 PM
>To: Koenig, Christian ; Deucher, Alexander
>
>Cc: amd-gfx@lists.freedesktop.org; Tao,
Am 25.03.20 um 12:03 schrieb Nirmoy:
On 3/25/20 10:23 AM, Pan, Xinhui wrote:
2020年3月25日 15:48，Koenig, Christian 写道：
Am 25.03.20 um 06:47 schrieb xinhui pan:
Hit panic during GPU recovery test. drm_sched_entity_select_rq might
set NULL to rq. So add a check like drm_sched_job_init does.
The problem is that we can't add the clear fence to the BO
when there is an exclusive fence on it since we can't
guarantee the the clear fence will complete after the
exclusive one.
To fix this refactor the function and also add the exclusive
fence as shared to the resv object.
v2: fix warning
We still need to add the VM update fences to the root PD.
So make sure to never sync to those implicitely.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
This patch adds a basic cursor check when an atomic test-only commit is
performed. The position and size of the cursor plane is checked.
This should fix user-space relying on atomic checks to assign buffers to
planes.
Signed-off-by: Simon Ser
Reported-by: Roman Gilg
References:
Due to the new L1.0b0c011b policy, many SDMA registers are blocked which raise
the violation warning. There are total 6 pair register needed to be skipped
when driver init and de-init.
mmSDMA0/1_CNTL
mmSDMA0/1_F32_CNTL
mmSDMA0/1_UTCL1_PAGE
mmSDMA0/1_UTCL1_CNTL
mmSDMA0/1_CHICKEN_BITS,
On Fri, Mar 27, 2020 at 05:00:16PM -0300, Jason Gunthorpe wrote:
> From: Jason Gunthorpe
>
> Now that flags are handled on a fine-grained per-page basis this global
> flag is redundant and has a confusing overlap with the pfn_flags_mask and
> default_flags.
>
> Normalize the HMM_FAULT_SNAPSHOT
On Fri, Mar 27, 2020 at 05:00:14PM -0300, Jason Gunthorpe wrote:
> From: Jason Gunthorpe
>
> Using two bools instead of flags return is not necessary and leads to
> bugs. Returning a value is easier for the compiler to check and easier to
> pass around the code flow.
>
> Convert the two bools
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