From: changzhu
From: Changfeng
To avoid s3 faild at the first cycle on renoir platform, it
needs to revert this patch:
drm/amd/display: add mechanism to skip DCN init
Change-Id: Idca8933d728531fb68ea2ff00c6c8d77d2a3cdca
Signed-off-by: changfeng
---
drivers/gpu/drm/amd/display/dc/core/dc.c
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Bhawanpreet Lakha
From: Nicholas Kazlauskas
Sent: July 8, 2020 4:34 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kazlauskas, Nicholas ; Lakha, Bhawanpreet
; Cyr, Aric
Subject: [PATCH]
[Why]
DCN3 has two gamut remap matrices. When using CSC adjustment the CM
remap is set to bypass and MPCC remap is used. However to bypass CM
some state in the context is modified and not restored correctly
resulting in subsequent calls to disable MPCC remap as well.
[How]
Fix logic for
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Bhawanpreet Lakha
From: Nicholas Kazlauskas
Sent: July 8, 2020 2:59 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kazlauskas, Nicholas ; Lakha, Bhawanpreet
Subject: [PATCH] drm/amd/display: Use
[Why]
Soft hangs occur when FreeSync is engaged since we utilize VUPDATE
(which doesn't fire when holding the pipe lock) to send back vblank
events when FreeSync is active.
[How]
The alternative (working) interrupt source for this mechanism is
VUPDATE_NO_LOCK. We already use this all other DCN
Hii AMD Maintainers,
I plan to convert logging of information, error and warnings
inside the AMD driver(s) to drm_* functions and macros for loggin,
as described by the TODO list in the DRM documentation[1].
I need your approval for the change before sending any patches, to make
sure that
RENOIR loads dmub fw not dmcu, check dmcu only will prevent loading iram,
it breaks backlight control.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=208277
Signed-off-by: Aaron Ma
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Wed, Jul 8, 2020 at 1:15 PM wrote:
>
> Non HTML email since previous was HTML formatted and likely broken.
>
>
> On Wednesday, 08 July 2020 19:08:49 CAT you wrote:
>
> I get complete and total kernel freezes that result in an entirely
> unresponsive system. This issue as driven me entirely
Non HTML email since previous was HTML formatted and likely broken.
On Wednesday, 08 July 2020 19:08:49 CAT you wrote:
I get complete and total kernel freezes that result in an entirely
unresponsive system. This issue as driven me entirely insane since it happens
at random. It has cost me
I get complete and total kernel freezes that result in an entirely unresponsive
system. This issue as driven me entirely insane since it happens at random. It
has
cost me lost work on my machine and I haven't the energy to further
troubleshoot, since it took me ages to get just this kernel
On Wed, Jul 8, 2020 at 5:19 PM Alex Deucher wrote:
>
> On Wed, Jul 8, 2020 at 11:13 AM Daniel Vetter wrote:
> >
> > On Wed, Jul 8, 2020 at 4:57 PM Christian König
> > wrote:
> > >
> > > Could we merge this controlled by a separate config option?
> > >
> > > This way we could have the checks
On Wed, Jul 8, 2020 at 11:13 AM Daniel Vetter wrote:
>
> On Wed, Jul 8, 2020 at 4:57 PM Christian König
> wrote:
> >
> > Could we merge this controlled by a separate config option?
> >
> > This way we could have the checks upstream without having to fix all the
> > stuff before we do this?
>
>
On Wed, Jul 8, 2020 at 4:57 PM Christian König wrote:
>
> Could we merge this controlled by a separate config option?
>
> This way we could have the checks upstream without having to fix all the
> stuff before we do this?
Since it's fully opt-in annotations nothing blows up if we don't merge
any
Could we merge this controlled by a separate config option?
This way we could have the checks upstream without having to fix all the
stuff before we do this?
Thanks,
Christian.
Am 07.07.20 um 22:12 schrieb Daniel Vetter:
Design is similar to the lockdep annotations for workers, but with
Looks good to me.
Reviewed-by: Nicholas Kazlauskas
Regards,
Nicholas Kazlauskas
On 2020-07-08 10:15 a.m., Deucher, Alexander wrote:
[AMD Public Use]
[AMD Public Use]
Acked-by: Alex Deucher
*From:* Aaron Ma
*Sent:*
[AMD Public Use]
Acked-by: Alex Deucher
From: Aaron Ma
Sent: Wednesday, July 8, 2020 4:16 AM
To: Wentland, Harry ; Li, Sun peng (Leo)
; Deucher, Alexander ; Koenig,
Christian ; airl...@linux.ie ;
dan...@ffwll.ch ; amd-gfx@lists.freedesktop.org
;
Dear Dennis,
Thank you for you patch.
On 2020-07-08 09:48, Dennis Li wrote:
> During GPU reset, driver should hold on all external access to
> GPU, otherwise psp will randomly fail to do post, and then cause
> system hang.
Maybe update the commit message summary to read:
> Avoid external GPU
Am 08.07.20 um 09:35 schrieb Chauhan, Madhav:
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Monday, July 6, 2020 11:18 PM
To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Subject: [PATCH 2/2] drm/amdgpu: stop allocating dummy
Am 07.07.20 um 21:16 schrieb Chauhan, Madhav:
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Monday, July 6, 2020 11:18 PM
To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Subject: [PATCH 1/2] drm/ttm: further cleanup ttm_mem_reg
During GPU reset, driver should hold on all external access to
GPU, otherwise psp will randomly fail to do post, and then cause
system hang.
v2:
1. add rwlock for some ioctls, debugfs and file-close function.
2. change to use dqm->is_resetting and dqm_lock for protection in kfd
driver.
3. remove
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Monday, July 6, 2020 11:18 PM
To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Subject: [PATCH 2/2] drm/amdgpu: stop allocating dummy GTT nodes
Now that TTM is fixed up we can finally
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Gao, Likun
Sent: Wednesday, July 8, 2020 13:48
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Gao, Likun
Subject: [v2] drm/amdgpu: remove unnecessary logic of ASIC check
From: Likun Gao
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