On Tue, Aug 11, 2020 at 4:12 AM Dennis Li wrote:
>
> [ 584.110304]
> [ 584.110590] WARNING: possible recursive locking detected
> [ 584.110876] 5.6.0-deli-v5.6-2848-g3f3109b0e75f #1 Tainted: G OE
> [ 584.64] ---
Am 11.08.20 um 04:12 schrieb Dennis Li:
[ 584.110304]
[ 584.110590] WARNING: possible recursive locking detected
[ 584.110876] 5.6.0-deli-v5.6-2848-g3f3109b0e75f #1 Tainted: G OE
[ 584.64]
[AMD Public Use]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Sheng, Wenhui
Sent: Tuesday, August 11, 2020 14:30
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhang, Hawking ;
Clements, John ; Sheng, Wenhui
Subject: [PATCH 3/3] drm/amdgpu: ad
[AMD Public Use]
Series is:
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: Sheng, Wenhui
Sent: Tuesday, August 11, 2020 2:30 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Guchun ; Zhang, Hawking ;
Clements, John ; Sheng, Wenhui
Subject: [PATCH 3/3] drm/amdgpu: ad
After amdgpu driver loading successfully, we can use
RAP debugfs interface /dri/xxx/rap_test
to trigger RAP test.
Currently only L0 validate test is supported.
v2: refine amdgpu_rap.h
Signed-off-by: Wenhui Sheng
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdg
Enable the RAP TA loading path and add RAP test
trigger interface.
v2: fix potential mem leak issue
Signed-off-by: Wenhui Sheng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 183 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 17 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode
The RAP TA contains tests used to verify if
RAP(Register Access Policy), or otherwise known
as Security Policy is applied correctly
by PSP BL&TOS.
The RAP test is a measure to ensure that we reduce
the avenue of complexity and mistakes when dealing
with RAP in post-si execution, where debugging fa
Renoir only has one sdma instance, it will get failed once query the
sdma1 registers. So use switch-case instead of static register array.
Signed-off-by: Huang Rui
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 31 +--
1 file changed, 22 insertions(+), 9 deletions(-)
diff -
Change to dynamically create and release hive info object,
which help driver support more hives in the future.
Signed-off-by: Dennis Li
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 8a55b0bc044a..fdfdc2f678c9 100644
--- a/drivers/gpu/
[AMD Public Use]
Hi Gunchun,
Thanks for pointing this out, for rap_test file node, I thought I need to use
the same file mode as ras previously, it seems that I'm wrong, for this
rap_test file node, I think only S_IWUSR is enough, what's your opinion?
Brs
Wenhui
-Original Message-
F
Drop unnecessary lock protections during hw setup which was confirmed
to have no race condition. Drop also unnecessary null pointer checker.
Change-Id: Ida301ae7bad1abae15285c4e019eda4f7dc6e297
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 20
drivers/gpu/
To fit the latest SMU firmware.
Change-Id: Ic9d02de54d20b6b90d18bac8b3fbb356d8fdf3ad
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
b/drivers/gpu/drm/amd
Instead of having one copy in each ASIC.
Change-Id: I5e2a72382700cdb0e4847e5d9e2143f4b5508cdb
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 55 ++-
drivers/gpu/drm/amd/powerplay/navi10_ppt.c| 41 +++---
drivers/gpu/drm/amd/powerplay/reno
To make the setting same as Arcturus/Navi1x/Sienna_Cichlid.
Change-Id: I7ea721bf5872023f1ab39c3827fb9c6fd05877cc
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 2 +-
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 2 +-
drivers/gpu/drm/amd/powerplay/renoir
[AMD Public Use]
One comment inline, please check.
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Wenhui Sheng
Sent: Tuesday, August 11, 2020 11:04 AM
To: amd-gfx@lists.freedesktop.org
Cc: Clements, John ; Sheng, Wenhui
; Zhang, Hawking
Subject: [PATCH 3/3] drm/amdgpu:
After amdgpu driver loading successfully, we can use
RAP debugfs interface /dri/xxx/rap_test
to trigger RAP test.
Currently only L0 validate test is supported.
v2: refine amdgpu_rap.h
Signed-off-by: Wenhui Sheng
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdg
The RAP TA contains tests used to verify if
RAP(Register Access Policy), or otherwise known
as Security Policy is applied correctly
by PSP BL&TOS.
The RAP test is a measure to ensure that we reduce
the avenue of complexity and mistakes when dealing
with RAP in post-si execution, where debugging fa
Enable the RAP TA loading path and add RAP test
trigger interface.
v2: fix potential mem leak issue
Signed-off-by: Wenhui Sheng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 183 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 17 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode
[ 584.110304]
[ 584.110590] WARNING: possible recursive locking detected
[ 584.110876] 5.6.0-deli-v5.6-2848-g3f3109b0e75f #1 Tainted: G OE
[ 584.64]
[ 584.111456] kworker/38:1/553 is trying
Applied and updated the commit message to reflect the sizes.
Thanks!
Alex
On Mon, Aug 10, 2020 at 3:07 PM Marion & Christophe JAILLET
wrote:
>
>
> Le 10/08/2020 à 17:42, Dan Carpenter a écrit :
> > On Sun, Aug 09, 2020 at 10:34:06PM +0200, Christophe JAILLET wrote:
> >> When '*sgt' is allocated
Applied. Thanks!
Alex
On Mon, Aug 10, 2020 at 9:05 AM Qinglang Miao wrote:
>
> Convert cpu_to_le16(le16_to_cpu(E1) + E2) to use le16_add_cpu().
>
> Signed-off-by: Qinglang Miao
> ---
> drivers/gpu/drm/amd/display/dc/bios/command_table.c | 4 +---
> drivers/gpu/drm/amd/display/dc/bios/command
On Mon, Aug 10, 2020 at 7:46 AM Christian König
wrote:
>
> Hi guys,
>
> Am 10.08.20 um 08:43 schrieb Alexander Monakov:
>
> Hi,
>
> you should Сс a specialized mailing list and a relevant maintainer,
> otherwise your email is likely to be ignored as LKML is an incredibly
> high-volume list. Adding
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Christian König
[ Upstream commit ba806f98f868ce107aa9c453fef751de9980e4af ]
Always use the PCI GART instead. We just have to many cases
where AGP still causes problems. This means a performance
regression for some GPUs, but also a bug fix for some others.
Signed-off-by: Christian König
From: Jack Xiao
[ Upstream commit 55611b507fd6453d26030c0c0619fdf0c262766d ]
Check if irq_src is NULL to avoid dereferencing a NULL pointer,
for MES ring is uneccessary to recieve an interrupt notification.
Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
Reviewed-by: Hawking Zhang
Reviewed-b
From: Evan Quan
[ Upstream commit 9822ba2ead1baa3de4860ad9472f652c4cc78c9c ]
Fix the compile error below:
drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c: In function
'smu_v11_0_init_microcode':
>> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of function
>> 'pr_warn'; did y
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Alex Deucher
[ Upstream commit 376814f5fcf1aadda501d1413d56e8af85d19a97 ]
If there are no supported callbacks. We'll fall back to the
nominal clocks.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Christian König
[ Upstream commit ba806f98f868ce107aa9c453fef751de9980e4af ]
Always use the PCI GART instead. We just have to many cases
where AGP still causes problems. This means a performance
regression for some GPUs, but also a bug fix for some others.
Signed-off-by: Christian König
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Evan Quan
[ Upstream commit 75bc07e2403caea9ecac69f766dfb7dc33547594 ]
To suppress the compile error below for "ARCH=arc".
drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c: In function
'arcturus_fill_eeprom_i2c_req':
>> arch/arc/include/asm/bug.h:22:2: error: implicit declaration
From: Jack Xiao
[ Upstream commit 55611b507fd6453d26030c0c0619fdf0c262766d ]
Check if irq_src is NULL to avoid dereferencing a NULL pointer,
for MES ring is uneccessary to recieve an interrupt notification.
Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
Reviewed-by: Hawking Zhang
Reviewed-b
From: Evan Quan
[ Upstream commit 9822ba2ead1baa3de4860ad9472f652c4cc78c9c ]
Fix the compile error below:
drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c: In function
'smu_v11_0_init_microcode':
>> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of function
>> 'pr_warn'; did y
From: Christian König
[ Upstream commit ba806f98f868ce107aa9c453fef751de9980e4af ]
Always use the PCI GART instead. We just have to many cases
where AGP still causes problems. This means a performance
regression for some GPUs, but also a bug fix for some others.
Signed-off-by: Christian König
From: Jack Xiao
[ Upstream commit 55611b507fd6453d26030c0c0619fdf0c262766d ]
Check if irq_src is NULL to avoid dereferencing a NULL pointer,
for MES ring is uneccessary to recieve an interrupt notification.
Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
Reviewed-by: Hawking Zhang
Reviewed-b
From: Alex Deucher
[ Upstream commit 4072327a2622af8688b88f5cd0a472136d3bf33d ]
It's only applicable on newer asics. We could end up here when
using DC on older asics like SI or KV.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
S
From: Aric Cyr
[ Upstream commit eec3303de3378cdfaa0bb86f43546dbbd88f94e2 ]
[Why]
DC is very fast at link training and stream enablement
which causes issues such as blackscreens for non-compliant
monitors.
[How]
After debugging with scaler vendors we implement the
minimum delays at the necessar
From: Alex Deucher
[ Upstream commit 376814f5fcf1aadda501d1413d56e8af85d19a97 ]
If there are no supported callbacks. We'll fall back to the
nominal clocks.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Alex Deucher
[ Upstream commit 4072327a2622af8688b88f5cd0a472136d3bf33d ]
It's only applicable on newer asics. We could end up here when
using DC on older asics like SI or KV.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
S
From: Alex Deucher
[ Upstream commit 376814f5fcf1aadda501d1413d56e8af85d19a97 ]
If there are no supported callbacks. We'll fall back to the
nominal clocks.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
From: Aric Cyr
[ Upstream commit eec3303de3378cdfaa0bb86f43546dbbd88f94e2 ]
[Why]
DC is very fast at link training and stream enablement
which causes issues such as blackscreens for non-compliant
monitors.
[How]
After debugging with scaler vendors we implement the
minimum delays at the necessar
From: Wenjing Liu
[ Upstream commit 26b4750d6cf84cb2b3f0a84c9b345e7b71886410 ]
[why]
Two issues:
1. Add read only operation support for query ddc data over aux.
2. Fix a bug where if read size is multiple of 16,
mot of the last read transaction will not be set to 0.
Signed-off-by: Wenjing Liu
From: Evan Quan
[ Upstream commit 75bc07e2403caea9ecac69f766dfb7dc33547594 ]
To suppress the compile error below for "ARCH=arc".
drivers/gpu/drm/amd/amdgpu/../powerplay/arcturus_ppt.c: In function
'arcturus_fill_eeprom_i2c_req':
>> arch/arc/include/asm/bug.h:22:2: error: implicit declaration
From: Evan Quan
[ Upstream commit 9822ba2ead1baa3de4860ad9472f652c4cc78c9c ]
Fix the compile error below:
drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c: In function
'smu_v11_0_init_microcode':
>> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of function
>> 'pr_warn'; did y
From: Alex Deucher
[ Upstream commit 9eee152aab56d374edb9ad21b3db05f5cdda2fe6 ]
The call to pm_runtime_get_sync increments the counter even in case of
failure, leading to incorrect ref count.
In case of failure, decrement the ref count before returning.
Acked-by: Evan Quan
Signed-off-by: Alex
From: Aditya Pakki
[ Upstream commit 9fb10671011143d15b6b40d6d5fa9c52c57e9d63 ]
On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.
Acked-by: Evan Quan
Signed-off-by: Aditya Pakki
Sign
From: Christian König
[ Upstream commit ba806f98f868ce107aa9c453fef751de9980e4af ]
Always use the PCI GART instead. We just have to many cases
where AGP still causes problems. This means a performance
regression for some GPUs, but also a bug fix for some others.
Signed-off-by: Christian König
From: Jack Xiao
[ Upstream commit 55611b507fd6453d26030c0c0619fdf0c262766d ]
Check if irq_src is NULL to avoid dereferencing a NULL pointer,
for MES ring is uneccessary to recieve an interrupt notification.
Signed-off-by: Jack Xiao
Acked-by: Alex Deucher
Reviewed-by: Hawking Zhang
Reviewed-b
Le 10/08/2020 à 17:42, Dan Carpenter a écrit :
On Sun, Aug 09, 2020 at 10:34:06PM +0200, Christophe JAILLET wrote:
When '*sgt' is allocated, we must allocated 'sizeof(**sgt)' bytes instead
of 'sizeof(*sg)'. 'sg' (i.e. struct scatterlist) is smaller than
'sgt' (i.e struct sg_table), so this coul
Acked-by: Nirmoy Das
On 8/10/20 5:56 PM, Alex Deucher wrote:
This is not longer used as of the latest rework of this
code so drop it to avoid a unused function warning.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 --
1 file changed, 1
This is not longer used as of the latest rework of this
code so drop it to avoid a unused function warning.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 --
1 file changed, 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/
On Mon, Aug 10, 2020, at 17:38, Alex Deucher wrote:
> On Sat, Aug 8, 2020 at 4:51 PM Daniel Kolesa wrote:
> >
> > GFP_KERNEL may and will sleep, and this is being executed in
> > a non-preemptible context; this will mess things up since it's
> > called inbetween DC_FP_START/END, and rescheduling w
On Sun, Aug 09, 2020 at 10:34:06PM +0200, Christophe JAILLET wrote:
> When '*sgt' is allocated, we must allocated 'sizeof(**sgt)' bytes instead
> of 'sizeof(*sg)'. 'sg' (i.e. struct scatterlist) is smaller than
> 'sgt' (i.e struct sg_table), so this could lead to memory corruption.
The sizeof(*sg)
Applied. Thanks!
Alex
On Sat, Aug 8, 2020 at 4:51 PM Daniel Kolesa wrote:
>
> This adds ARM64 support into the DCN. This mainly enables support
> for Navi graphics cards. The dcn10 changes haven't been tested,
> since I don't have the relevant hardware available, but there
> is no way to condit
On Sat, Aug 8, 2020 at 4:51 PM Daniel Kolesa wrote:
>
> GFP_KERNEL may and will sleep, and this is being executed in
> a non-preemptible context; this will mess things up since it's
> called inbetween DC_FP_START/END, and rescheduling will result
> in the DC_FP_END later being called in a differen
On Mon, Aug 10, 2020 at 4:13 PM Bas Nieuwenhuizen
wrote:
>
> On Mon, Aug 10, 2020 at 3:09 PM Daniel Vetter wrote:
> >
> > On Mon, Aug 10, 2020 at 02:49:00PM +0200, Michel Dänzer wrote:
> > > On 2020-08-10 2:28 p.m., Daniel Vetter wrote:
> > > >
> > > > Ok just learned that amdgpu hat set/get_tili
On Mon, Aug 10, 2020 at 3:09 PM Daniel Vetter wrote:
>
> On Mon, Aug 10, 2020 at 02:49:00PM +0200, Michel Dänzer wrote:
> > On 2020-08-10 2:28 p.m., Daniel Vetter wrote:
> > >
> > > Ok just learned that amdgpu hat set/get_tiling, so I'm upgrading my idea
> > > here to a very strong recommendation,
On Mon, Aug 10, 2020 at 02:49:00PM +0200, Michel Dänzer wrote:
> On 2020-08-10 2:28 p.m., Daniel Vetter wrote:
> >
> > Ok just learned that amdgpu hat set/get_tiling, so I'm upgrading my idea
> > here to a very strong recommendation, i.e. please do this except if
> > there's and amd ddx which someh
On Mon, Aug 10, 2020 at 01:25:40PM +0200, Christian König wrote:
> Am 09.08.20 um 08:17 schrieb Lukas Bulwahn:
> > With commit 72b6ede73623 ("dma-buf.rst: Document why indefinite fences are
> > a bad idea"), document generation warns:
> >
> >Documentation/driver-api/dma-buf.rst:182: \
> >W
Convert cpu_to_le16(le16_to_cpu(E1) + E2) to use le16_add_cpu().
Signed-off-by: Qinglang Miao
---
drivers/gpu/drm/amd/display/dc/bios/command_table.c | 4 +---
drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 5 +
2 files changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/
On 2020-08-10 2:28 p.m., Daniel Vetter wrote:
>
> Ok just learned that amdgpu hat set/get_tiling, so I'm upgrading my idea
> here to a very strong recommendation, i.e. please do this except if
> there's and amd ddx which somehow wants to change tiling mode while a fb
> exists, and expects this to p
On Fri, Aug 07, 2020 at 10:32:11AM -0400, Kazlauskas, Nicholas wrote:
> On 2020-08-07 4:52 a.m., dan...@ffwll.ch wrote:
> > On Thu, Jul 30, 2020 at 04:36:42PM -0400, Nicholas Kazlauskas wrote:
> > > @@ -440,7 +431,7 @@ struct dm_crtc_state {
> > > #define to_dm_crtc_state(x) container_of(x, struc
On Mon, Aug 10, 2020 at 02:30:05PM +0200, Christian König wrote:
> Am 10.08.20 um 14:25 schrieb Daniel Vetter:
> > On Fri, Aug 07, 2020 at 10:29:09AM -0400, Kazlauskas, Nicholas wrote:
> > > On 2020-08-07 4:30 a.m., dan...@ffwll.ch wrote:
> > > > On Thu, Jul 30, 2020 at 04:36:38PM -0400, Nicholas K
Am 10.08.20 um 14:25 schrieb Daniel Vetter:
On Fri, Aug 07, 2020 at 10:29:09AM -0400, Kazlauskas, Nicholas wrote:
On 2020-08-07 4:30 a.m., dan...@ffwll.ch wrote:
On Thu, Jul 30, 2020 at 04:36:38PM -0400, Nicholas Kazlauskas wrote:
[Why]
We're racing with userspace as the flags could potentiall
On Fri, Aug 07, 2020 at 10:26:51AM -0400, Kazlauskas, Nicholas wrote:
> On 2020-08-07 4:34 a.m., dan...@ffwll.ch wrote:
> > On Thu, Jul 30, 2020 at 04:36:40PM -0400, Nicholas Kazlauskas wrote:
> > > [Why]
> > > MEDIUM or FULL updates can require global validation or affect
> > > bandwidth. By treat
On Wed, Aug 05, 2020 at 09:32:10AM +0200, dan...@ffwll.ch wrote:
> On Tue, Aug 04, 2020 at 11:31:17PM +0200, Bas Nieuwenhuizen wrote:
> > This sets the DC tiling options from the modifier, if modifiers
> > are used for the FB. This patch by itself does not expose the
> > support yet though.
> >
>
On Fri, Aug 07, 2020 at 10:29:09AM -0400, Kazlauskas, Nicholas wrote:
> On 2020-08-07 4:30 a.m., dan...@ffwll.ch wrote:
> > On Thu, Jul 30, 2020 at 04:36:38PM -0400, Nicholas Kazlauskas wrote:
> > > [Why]
> > > We're racing with userspace as the flags could potentially change
> > > from when we acq
The condition in which it’s enabled is hidden from upstream.
From: Brandon Wright
Sent: Saturday, August 8, 2020 10:11 PM
To: Brol, Eryk ; amd-gfx@lists.freedesktop.org; Wood, Wyatt
Subject: Re: [PATCH 12/15] drm/amd/display: Use hw lock mgr
Just curious, but I noticed this new lock manager is
Hi guys,
Am 10.08.20 um 08:43 schrieb Alexander Monakov:
Hi,
you should Сс a specialized mailing list and a relevant maintainer,
otherwise your email is likely to be ignored as LKML is an incredibly
high-volume list. Adding amd-gfx and Alex Deucher.
Thanks for forwarding this. AFAIK we haven'
Am 10.08.20 um 05:59 schrieb Monk Liu:
GFX10 KIQ will hang if we try below steps:
modprobe amdgpu
rmmod amdgpu
modprobe amdgpu sched_hw_submission=4
Due to KIQ is always living there even after KMD unloaded
thus when doing the realod KIQ will crash upon its register
being programed by different
Am 09.08.20 um 08:17 schrieb Lukas Bulwahn:
With commit 72b6ede73623 ("dma-buf.rst: Document why indefinite fences are
a bad idea"), document generation warns:
Documentation/driver-api/dma-buf.rst:182: \
WARNING: Title underline too short.
Repair length of title underline to remove warnin
Am 10.08.20 um 12:50 schrieb Michel Dänzer:
On 2020-08-09 2:13 p.m., Christian König wrote:
Am 08.08.20 um 15:50 schrieb Jiaxun Yang:
在 2020/8/8 下午9:41, Thomas Bogendoerfer 写道:
On Sat, Aug 08, 2020 at 03:25:02PM +0800, Tiezhu Yang wrote:
Loongson processors have a writecombine issue that mayb
On 2020-08-09 2:13 p.m., Christian König wrote:
> Am 08.08.20 um 15:50 schrieb Jiaxun Yang:
>> 在 2020/8/8 下午9:41, Thomas Bogendoerfer 写道:
>>> On Sat, Aug 08, 2020 at 03:25:02PM +0800, Tiezhu Yang wrote:
Loongson processors have a writecombine issue that maybe failed to
write back framebuf
Am 09.08.20 um 22:34 schrieb Christophe JAILLET:
When '*sgt' is allocated, we must allocated 'sizeof(**sgt)' bytes instead
of 'sizeof(*sg)'. 'sg' (i.e. struct scatterlist) is smaller than
'sgt' (i.e struct sg_table), so this could lead to memory corruption.
Fixes: f44ffd677fb3 ("drm/amdgpu: add
Hi,
you should Сс a specialized mailing list and a relevant maintainer,
otherwise your email is likely to be ignored as LKML is an incredibly
high-volume list. Adding amd-gfx and Alex Deucher.
More thoughts below.
On Sun, 9 Aug 2020, Ignat Insarov wrote:
> Hello!
>
> This is an issue report. I
On 08/09/2020 08:13 PM, Christian König wrote:
Am 08.08.20 um 15:50 schrieb Jiaxun Yang:
在 2020/8/8 下午9:41, Thomas Bogendoerfer 写道:
On Sat, Aug 08, 2020 at 03:25:02PM +0800, Tiezhu Yang wrote:
Loongson processors have a writecombine issue that maybe failed to
write back framebuffer used with
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