Am 05.03.21 um 02:21 schrieb Felix Kuehling:
Am 2021-03-01 um 10:09 a.m. schrieb Christian König:
Am 27.02.21 um 04:45 schrieb Felix Kuehling:
Move fences that have already signaled should not prevent memory
allocations with no_wait_gpu.
Signed-off-by: Felix Kuehling
Reviewed-by:
Am 05.03.21 um 02:20 schrieb Emily Deng:
When unloading driver after killing some applications, it will hit sdma
flush tlb job timeout which is called by ttm_bo_delay_delete. So
to avoid the job submit after fence driver fini, call
ttm_bo_lock_delayed_workqueue
before fence driver fini. And
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Evan Quan
Sent: Friday, March 5, 2021 2:25 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Georgios Toptsidis
; Quan, Evan ; Chen, Guchun
Subject:
The "/ 10" should be applied to the right-hand operand instead of
the left-hand one.
Change-Id: Ie730a1981aa5dee45cd6c3efccc7fb0f088cd679
Signed-off-by: Evan Quan
Noticed-by: Georgios Toptsidis
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 8
1 file changed, 4
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Jack Zhang
-Original Message-
From: Jingwen Chen
Sent: Friday, March 5, 2021 2:12 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Horace ; Zhang, Jack (Jian)
; Chen, JingWen
Subject: [PATCH] drm/amd/amdgpu: add fini
[Why]
when try to shutdown guest vm in sriov mode, virt data
exchange is not fini. After vram lost, trying to write
vram could hang cpu.
[How]
add fini virt data exchange in ip_suspend
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-
1 file changed, 3
[AMD Official Use Only - Internal Distribution Only]
Please comments what the issue is without this change.
/Jack
-Original Message-
From: Jingwen Chen
Sent: Friday, March 5, 2021 12:44 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Horace ; Zhang, Jack (Jian)
; Chen, JingWen
Subject:
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Anson Jacob
Sent: Friday, March 5, 2021 1:39 AM
To: amd-gfx@lists.freedesktop.org
Cc: Jacob, Anson ; Deucher, Alexander
; Kuehling, Felix
Subject: [PATCH] drm/amdkfd: Fix UBSAN shift-out-of-bounds warning
If
When bitmap_empty() or feature->feature_num triggers an error,
no error return code of smu_v11_0_set_allowed_mask() is assigned.
To fix this bug, ret is assigned with -EINVAL as error return code.
Reported-by: TOTE Robot
Signed-off-by: Jia-Ju Bai
---
Do fini data exchange everytime req_gpu_fini in SRIOV
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 3 +++
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git
[AMD Public Use]
Thanks. Reviewed-by: Evan Quan
-Original Message-
From: Jia-Ju Bai
Sent: Friday, March 5, 2021 11:54 AM
To: Deucher, Alexander ; Koenig, Christian
; airl...@linux.ie; dan...@ffwll.ch; Quan, Evan
; Zhang, Hawking ; Wang, Kevin(Yang)
; Gao, Likun
Cc:
Am 2021-03-04 um 3:03 a.m. schrieb Smith John:
> Hi! I noticed that kernels with different VMIDs have different GPU
> address spaces. I was wondering if it is possible for these kernels to
> run concurrently on the same GPU, or they need to be serialized even
> when there are free CUs.
They can
Am 2021-03-04 um 10:12 p.m. schrieb Jay Cornwall:
> Trap handler is set per-process per-device and is unrelated
> to queue management.
>
> Move implementation closer to TMA setup code.
>
> Signed-off-by: Jay Cornwall
Reviewed-by: Felix Kuehling
> ---
>
Trap handler is set per-process per-device and is unrelated
to queue management.
Move implementation closer to TMA setup code.
Signed-off-by: Jay Cornwall
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 6 +
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ---
Am 2021-03-01 um 10:09 a.m. schrieb Christian König:
> Am 27.02.21 um 04:45 schrieb Felix Kuehling:
>> Move fences that have already signaled should not prevent memory
>> allocations with no_wait_gpu.
>>
>> Signed-off-by: Felix Kuehling
>
> Reviewed-by: Christian König
I work on this on Alex's
When unloading driver after killing some applications, it will hit sdma
flush tlb job timeout which is called by ttm_bo_delay_delete. So
to avoid the job submit after fence driver fini, call
ttm_bo_lock_delayed_workqueue
before fence driver fini. And also put drm_sched_fini before waiting fence.
Am 2021-03-03 um 7:04 a.m. schrieb Christian König:
> Am 03.03.21 um 10:25 schrieb Nirmoy Das:
>> Implement a new struct based on amdgpu_bo base class
>> for BOs created by kfd device so that kfd related memeber
>> of amdgpu_bo can be moved there.
>
> You should probably restructure which patch
On 2021-03-04 2:43 p.m., Leo (Hanghong) Ma wrote:
[Why & How]
We use DMCUB outbox0 interrupt to log DMCUB trace buffer events
as Linux kernel traces, so need to add some irq source related
defination in the header files;
Signed-off-by: Leo (Hanghong) Ma
Reviewed-by: Harry Wentland
Harry
I tried the branch for a few hours now and it seems to solve the issue
(including, at least mostly, the “weaker” 5.16 version) – thanks a lot!
Cheers, Lucas
On 04.03.21 12:28, Christian König wrote:
> Hi Lucas,
>
> that sounds strongly as an known issue. Could you please test the
>
From: Mark Yacoub
To initialize the framebuffer, use drm_gem_fb_init_with_funcs which
verifies that the BO size can fit the FB size by calculating the minimum
expected size of each plane.
The bug was caught using igt-gpu-tools test: kms_addfb_basic.too-high
and kms_addfb_basic.bo-too-small
If get_num_sdma_queues or get_num_xgmi_sdma_queues is 0, we end up
doing a shift operation where the number of bits shifted equals
number of bits in the operand. This behaviour is undefined.
Set num_sdma_queues or num_xgmi_sdma_queues to ULLONG_MAX, if the
count is >= number of bits in the
[Why & How]
We use DMCUB outbox0 interrupt to log DMCUB trace buffer events
as Linux kernel traces, so need to add some irq source related
defination in the header files;
Signed-off-by: Leo (Hanghong) Ma
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
[AMD Official Use Only - Internal Distribution Only]
Apologies for the noise, and please ignore this one.
Thanks
-Original Message-
From: Leo (Hanghong) Ma
Sent: Thursday, March 4, 2021 2:31 PM
To: Siqueira, Rodrigo ; amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry ; Ma, Hanghong
This reverts commit 3590cb311815b3f82af04e2ff1f182ca919af3d3.
The patch is applyed mistakenly before code review.
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h | 2 --
2 files changed, 3 deletions(-)
diff --git
Hi Oak,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip linus/master v5.12-rc1 next-20210304]
[cannot apply to tegra-drm/drm/tegra/for-next drm-exynos/exynos-drm-next
drm/drm-next]
[If your patch
Hi Oak,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip linus/master v5.12-rc1 next-20210304]
[cannot apply to tegra-drm/drm/tegra/for-next drm-exynos/exynos-drm-next
drm/drm-next]
[If your patch
Am 04.03.21 um 18:40 schrieb Bhardwaj, Rajneesh:
On 3/4/2021 12:31 PM, Christian König wrote:
[CAUTION: External Email]
Am 04.03.21 um 18:01 schrieb Bhardwaj, Rajneesh:
I was wondering if a managed version of such API exists but looks like
none. We only have devm_ioremap_wc but that is
Am 04.03.21 um 18:01 schrieb Bhardwaj, Rajneesh:
I was wondering if a managed version of such API exists but looks like
none. We only have devm_ioremap_wc but that is valid only for
PAGE_CACHE_MODE_WC whereas ioremap_cache uses _WB. One more small
comment below.
Acked-by: Rajneesh Bhardwaj
On 3/4/2021 12:31 PM, Christian König wrote:
[CAUTION: External Email]
Am 04.03.21 um 18:01 schrieb Bhardwaj, Rajneesh:
I was wondering if a managed version of such API exists but looks like
none. We only have devm_ioremap_wc but that is valid only for
PAGE_CACHE_MODE_WC whereas ioremap_cache
On 2021-03-04 1:41 p.m., Alex Deucher wrote:
On Thu, Mar 4, 2021 at 1:33 PM Kazlauskas, Nicholas
wrote:
On 2021-03-04 12:41 p.m., Alex Deucher wrote:
It just spams the logs.
Signed-off-by: Alex Deucher
This series in general looks reasonable to me:
Reviewed-by: Nicholas Kazlauskas
---
On Thu, Mar 4, 2021 at 1:33 PM Kazlauskas, Nicholas
wrote:
>
> On 2021-03-04 12:41 p.m., Alex Deucher wrote:
> > It just spams the logs.
> >
> > Signed-off-by: Alex Deucher
>
> This series in general looks reasonable to me:
> Reviewed-by: Nicholas Kazlauskas
>
> > ---
> >
On 2021-03-04 12:41 p.m., Alex Deucher wrote:
It just spams the logs.
Signed-off-by: Alex Deucher
This series in general looks reasonable to me:
Reviewed-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 1 -
1 file changed, 1 deletion(-)
diff --git
On 2021-03-04 10:35 a.m., Michel Dänzer wrote:
On 2021-03-04 4:09 p.m., Kazlauskas, Nicholas wrote:
On 2021-03-04 4:05 a.m., Michel Dänzer wrote:
On 2021-03-03 8:17 p.m., Daniel Vetter wrote:
On Wed, Mar 3, 2021 at 5:53 PM Michel Dänzer wrote:
Moreover, in the same scenario plus an overlay
Am 25.02.21 um 17:44 schrieb Alex Deucher:
This has been stable for a while.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 10 ++
2 files changed, 12 insertions(+), 2
Am 2021-03-01 um 3:46 a.m. schrieb Thomas Hellström (Intel):
>
> On 3/1/21 9:32 AM, Daniel Vetter wrote:
>> On Wed, Jan 06, 2021 at 10:01:09PM -0500, Felix Kuehling wrote:
>>> From: Philip Yang
>>>
>>> Register vram memory as MEMORY_DEVICE_PRIVATE type resource, to
>>> allocate vram backing
From: Takashi Iwai
There seem devices that don't work with the aux channel backlight
control. For allowing such users to test with the other backlight
control method, provide a new module option, aux_backlight, to specify
enabling or disabling the aux backport support explicitly. As
default,
Need to fetch it via aux.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +++
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
It just spams the logs.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index fa9a62dc174b..974b70f21837 100644
---
Avoid the extra wrapper function.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 ---
1 file changed, 4 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
This builds on the debugging and patches that Takashi did on the
bugs referenced in the patches. It seems some latops claim to support
aux backlight control, but actually use the old pwm controller.
The code also currently warns in the backlight control function
if there is no pipe assigned, but
Ping?
Alex
On Thu, Feb 25, 2021 at 11:44 AM Alex Deucher wrote:
>
> This has been stable for a while.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 10 ++
> 2 files changed, 12 insertions(+), 2
I was wondering if a managed version of such API exists but looks like
none. We only have devm_ioremap_wc but that is valid only for
PAGE_CACHE_MODE_WC whereas ioremap_cache uses _WB. One more small
comment below.
Acked-by: Rajneesh Bhardwaj
On 3/4/2021 11:04 AM, Oak Zeng wrote:
If
On Wed, Feb 17, 2021 at 11:53 AM Harry Wentland wrote:
>
> On 2021-02-16 12:28 p.m., Alex Deucher wrote:
> > Commit 098214999c8f added fetching of the AUX_DPHY register
> > values from the vbios, but it also changed the default values
> > in the case when there are no values in the vbios. This
If tbo.mem.bus.caching is cached, buffer is intended to be mapped
as cached from CPU. Map it with ioremap_cache.
This wasn't necessary before as device memory was never mapped
as cached from CPU side. It becomes necessary for aldebaran as
device memory is mapped cached from CPU.
Signed-off-by:
On 2021-03-04 4:09 p.m., Kazlauskas, Nicholas wrote:
> On 2021-03-04 4:05 a.m., Michel Dänzer wrote:
>> On 2021-03-03 8:17 p.m., Daniel Vetter wrote:
>>> On Wed, Mar 3, 2021 at 5:53 PM Michel Dänzer wrote:
Moreover, in the same scenario plus an overlay plane enabled with a
HW
On 2021-03-04 4:05 a.m., Michel Dänzer wrote:
On 2021-03-03 8:17 p.m., Daniel Vetter wrote:
On Wed, Mar 3, 2021 at 5:53 PM Michel Dänzer wrote:
On 2021-02-19 7:58 p.m., Simon Ser wrote:
Make sure there's an underlying pipe that can be used for the
cursor.
Signed-off-by: Simon Ser
Cc: Alex
On 2021-03-03 10:20 a.m., Alex Deucher wrote:
We set up the parameters, but never called the atom table.
Signed-off-by: Alex Deucher
Reviewed-by: Harry Wentland
Harry
---
.../drm/amd/display/dc/bios/command_table.c | 21 +++
1 file changed, 21 insertions(+)
diff
[AMD Public Use]
Reviewed-by: Lijo Lazar
-Original Message-
From: Feifei Xu
Sent: Thursday, March 4, 2021 12:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: alexdeuc...@gmail.com; Lazar, Lijo ; Xu, Feifei
Subject: [PATCH] drm/amdgpu: simplify the sdma 4_x MGCG/MGLS logic.
SDMA 4_x
[AMD Public Use]
Reviewed-by: Lijo Lazar
-Original Message-
From: amd-gfx On Behalf Of Kevin Wang
Sent: Thursday, March 4, 2021 1:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Kevin(Yang)
Subject: [PATCH] drm/amd/pm: remove duplicate XGMI feature mask
replace SMU feature XGMI
Hi Lucas,
that sounds strongly as an known issue. Could you please test the
drm-misc-fixes branch (https://cgit.freedesktop.org/drm/drm-misc/) and
see if the problem still occurs?
Thanks in advance,
Christian.
Am 03.03.21 um 21:02 schrieb Lucas Werkmeister:
Hi all,
on Linux 5.11.1 and
[AMD Official Use Only - Internal Distribution Only]
Series is Acked-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Kevin Wang
Sent: Thursday, March 4, 2021 3:35 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Kevin(Yang)
Subject: [PATCH] drm/amd/pm: remove duplicate XGMI
On 2021-03-03 8:17 p.m., Daniel Vetter wrote:
On Wed, Mar 3, 2021 at 5:53 PM Michel Dänzer wrote:
On 2021-02-19 7:58 p.m., Simon Ser wrote:
Make sure there's an underlying pipe that can be used for the
cursor.
Signed-off-by: Simon Ser
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Nicholas
I think we should check for CONFIG_X86 instead, but in general it sounds
like the right approach to me for now.
Regards,
Christian.
Am 03.03.21 um 22:12 schrieb Oak Zeng:
If tbo.mem.bus.caching is cached, buffer is intended to be mapped
as cached from CPU. Map it with ioremap_cache.
This
Fix the following coccicheck warnings:
./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:956:52-57: WARNING:
conversion to bool not needed here.
./drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:8311:16-21: WARNING:
conversion to bool not needed here.
Reported-by: Abaci Robot
Yes, seems un-necessary in current implementation.
Thanks,
Feifei
-Original Message-
From: Lazar, Lijo
Sent: Thursday, March 4, 2021 3:38 PM
To: Chen, Guchun ; Alex Deucher ;
Xu, Feifei
Cc: amd-gfx list ; Zhang, Hawking
Subject: RE: [PATCH] drm/amdgpu: soc15 pcie gen4 support
Hi! I noticed that kernels with different VMIDs have different GPU address
spaces. I was wondering if it is possible for these kernels to run
concurrently on the same GPU, or they need to be serialized even when there
are free CUs.
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