[AMD Public Use]
amdgpu_irq_restore_msix should be one static function?
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Emily Deng
Sent: Tuesday, March 30, 2021 12:42 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily
Subject: [PATCH 3/6] drm/amdgpu: Restore msix after
During driver unloading, don't need to copy mem, or it will introduce
some call trace, such as when sa_manager is freed, it will introduce warn
call trace in amdgpu_sa_bo_new.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +++
1 file changed, 3 insertions(+)
diff
It will hit ramdomly sdma hang, and pending on utcl2
address translation when access the RPTR polling address.
According sdma firmware team mentioned, the RPTR writeback is done by
hardware automatically, and will hit issue when clock gating occurs. So
stop using the rptr write back for sdma5.0.
To fix the board disappear issue.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 46d4bbabce75..48dc171bc759 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
From: "Emily.Deng"
After FLR, the msix will be cleared, so need to re-enable it.
v2:
Change name with amdgpu_irq prefix, remove #ifdef.
Signed-off-by: Emily.Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 12
1 file changed, 12 insertions(+)
diff --git
Since vcn decoding ring is not required, so just disable it.
Signed-off-by: Frank.Min
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 29 -
2 files changed, 17 insertions(+), 16 deletions(-)
Set the num_types equal to the enabled num_crtc.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index
From: "Emily.Deng"
After FLR, the msix will be cleared, so need to re-enable it.
v2:
Change name with amdgpu_irq prefix, remove #ifdef.
Signed-off-by: Emily.Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 12
1 file changed, 12 insertions(+)
diff --git
[AMD Official Use Only - Internal Distribution Only]
Hi Christian,
We don't need to debate on the design's topic, each of us have our own opinion,
it is hard to persuade others sometimes, again with more and more features and
requirements it is pretty normal that an old design need to
Refine
>-Original Message-
>From: Deucher, Alexander
>Sent: Monday, March 29, 2021 10:41 PM
>To: Deng, Emily ; amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily
>Subject: RE: [PATCH 3/6] drm/amdgpu: Restore msix after FLR
>
>[AMD Public Use]
>
>> -Original Message-
>> From: amd-gfx On
[AMD Public Use]
Thanks Alex and Luben.
I've addressed the comments and pushed the changes.
Rohit
-Original Message-
From: Tuikov, Luben
Sent: March 29, 2021 11:54 AM
To: Khaire, Rohit ; amd-gfx@lists.freedesktop.org; Chang,
HaiJun ; Ming, Davis ; Liu, Monk
Cc: Koenig, Christian
On 2021-03-29 21:36 +0200, Christian König wrote:
> Am 29.03.21 um 21:27 schrieb Xi Ruoyao:
> > Hi Christian,
> >
> > I don't think there is any constraint implemented to ensure `num_entries %
> > AMDGPU_GPU_PAGES_IN_CPU_PAGE == 0`. For example, in `amdgpu_vm_bo_map()`:
> >
> > /*
Am 29.03.21 um 21:27 schrieb Xi Ruoyao:
Hi Christian,
I don't think there is any constraint implemented to ensure `num_entries %
AMDGPU_GPU_PAGES_IN_CPU_PAGE == 0`. For example, in `amdgpu_vm_bo_map()`:
/* validate the parameters */
if (saddr & AMDGPU_GPU_PAGE_MASK || offset
On 2021-03-30 02:21 +0800, Xi Ruoyao wrote:
> On 2021-03-29 20:10 +0200, Christian König wrote:
> > You need to identify the root cause of this, most likely start or last
> > are not a multiple of AMDGPU_GPU_PAGES_IN_CPU_PAGE.
>
> I printk'ed the value of start & last, they are all a multiple of
Hi Christian,
I don't think there is any constraint implemented to ensure `num_entries %
AMDGPU_GPU_PAGES_IN_CPU_PAGE == 0`. For example, in `amdgpu_vm_bo_map()`:
/* validate the parameters */
if (saddr & AMDGPU_GPU_PAGE_MASK || offset & AMDGPU_GPU_PAGE_MASK ||
size
On 2021-03-29 20:10 +0200, Christian König wrote:
> You need to identify the root cause of this, most likely start or last
> are not a multiple of AMDGPU_GPU_PAGES_IN_CPU_PAGE.
I printk'ed the value of start & last, they are all a multiple of 4
(AMDGPU_GPU_PAGES_IN_CPU_PAGE).
However...
Am 29.03.21 um 20:08 schrieb Xi Ruoyao:
On 2021-03-29 20:04 +0200, Christian König wrote:
Am 29.03.21 um 19:53 schrieb Xℹ Ruoyao:
If the initial value of `num_entires` (calculated at line 1654) is not
an integral multiple of `AMDGPU_GPU_PAGES_IN_CPU_PAGE`, in line 1681 a
value greater than the
On 2021-03-29 20:04 +0200, Christian König wrote:
> Am 29.03.21 um 19:53 schrieb Xℹ Ruoyao:
> > If the initial value of `num_entires` (calculated at line 1654) is not
> > an integral multiple of `AMDGPU_GPU_PAGES_IN_CPU_PAGE`, in line 1681 a
> > value greater than the initial value will be
Am 29.03.21 um 19:53 schrieb Xℹ Ruoyao:
If the initial value of `num_entires` (calculated at line 1654) is not
an integral multiple of `AMDGPU_GPU_PAGES_IN_CPU_PAGE`, in line 1681 a
value greater than the initial value will be assigned to it. That causes
`start > last + 1` after line 1708.
If the initial value of `num_entires` (calculated at line 1654) is not
an integral multiple of `AMDGPU_GPU_PAGES_IN_CPU_PAGE`, in line 1681 a
value greater than the initial value will be assigned to it. That causes
`start > last + 1` after line 1708. Then in the next iteration an
underflow
Ping?
Alex
On Thu, Mar 11, 2021 at 9:20 AM Alex Deucher wrote:
>
> This reverts commit c6d2b0fbb893d5c7dda405aa0e7bcbecf1c75f98.
>
> This patch is a workaround for a hardware bug, but I don't
> know that we've actually seen the hw bug triggered in practice,
> meanwhile a number of people have
For legacy S3, we need to use different handling in the driver.
Suggested by Heiko Przybyl.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1553
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On 2021-03-29 3:54 a.m., Louis Li wrote:
[Why]
This issue is found when scaling is not equal to one from src to dest.
When issue happens, there are offsets in both axis x and y between
two cursors. Users cannot control APP under such a condition.
What's the use case? I don't think we support
On Sat, Mar 27, 2021 at 3:28 AM Wan Jiabing wrote:
>
> struct dc_state has been declared at 273rd line.
> Remove the duplicate.
> Delete duplicate blank lines.
Can you split these into separate patches?
Alex
>
> Signed-off-by: Wan Jiabing
> ---
> drivers/gpu/drm/amd/display/dc/dc.h | 10
[AMD Public Use]
Some comments inline. Don't address them yet until someone else reviews this
more thoroughly though
> -Original Message-
> From: amd-gfx On Behalf Of Mike Li
> Sent: Monday, March 29, 2021 12:33 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Kuehling, Felix ; Lazar, Lijo
The L1 cache information has been updated and the L2/L3
information has been added. The changes have been made
for Vega10 and newer ASICs. There are no changes
for the older ASICs before Vega10.
BUG: SWDEV-260249
Signed-off-by: Mike Li
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 749
On 2021-03-23 4:44 p.m., Rohit Khaire wrote:
> Add 3 sub flags to notify guest for indirect access of gc, mmhub and ih
>
> Signed-off-by: Rohit Khaire
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h| 11 +++
> drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 17 +++--
> 2
[AMD Public Use]
Looks good to me.
Reviewed-by: Leo (Hanghong) Ma
Thanks,
Leo
-Original Message-
From: Chen, Guchun
Sent: Friday, March 26, 2021 10:08 AM
To: amd-gfx@lists.freedesktop.org; Ma, Hanghong ;
Wentland, Harry ; Lin, Wayne ; Yin,
Tianci (Rico)
Cc: Chen, Guchun
Subject:
Applied. Thanks!
Alex
On Fri, Mar 26, 2021 at 10:59 AM Harry Wentland wrote:
>
>
>
> On 2021-03-24 4:23 p.m., Alex Deucher wrote:
> > On Wed, Mar 17, 2021 at 11:25 AM Werner Sembach
> > wrote:
> >>
> >> When encoder validation of a display mode fails, retry with less bandwidth
> >> heavy
[AMD Official Use Only - Internal Distribution Only]
Maybe add something like the following in your commit message:
"The host sends this data depending on L1 policy version/asic and other
scenarios. These flags ensure that there is compatibility between different
guest/host/vbios versions."
[AMD Public Use]
> -Original Message-
> From: amd-gfx On Behalf Of
> Emily Deng
> Sent: Monday, March 29, 2021 3:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deng, Emily
> Subject: [PATCH 3/6] drm/amdgpu: Restore msix after FLR
>
> From: "Emily.Deng"
>
> After FLR, the msix will
[AMD Public Use]
Hi all,
This week this patchset was tested on a HP Envy 360, with Ryzen 5 4500U, on the
following display types (via usb-c to dp/dvi/hdmi/vga):
4k 60z, 1440p 144hz, 1680*1050 60hz, internal eDP 1080p 60hz
Tested on a Sapphire Pulse RX5700XT on the following display types (via
Hello Mikita Lipski,
The patch 04111850cf56: "drm/amd/display: Reuse parsing code of
debugfs write buffer" from Mar 26, 2020, leads to the following
static checker warning:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:80
parse_write_buffer_into_params()
> On Thu, 25 Mar 2021 12:12:09 -0400
> Alex Deucher wrote:
>
>> + dri-devel
>>
>> I don't think it's currently exposed anywhere.
>>
>> Alex
>>
>> On Wed, Mar 24, 2021 at 5:11 AM Werner Sembach
>> wrote:
>>> Hello,
>>>
>>> is the information which color mode is currently in used for a display
[AMD Public Use]
Reviewed-by: Lijo Lazar
-Original Message-
From: amd-gfx On Behalf Of Feifei Xu
Sent: Monday, March 29, 2021 1:31 PM
To: amd-gfx@lists.freedesktop.org
Cc: Xu, Feifei
Subject: [PATCH] drm/amdgpu: skip PP_MP1_STATE_UNLOAD on aldebaran
This message is not needed on
[AMD Public Use]
-Original Message-
From: amd-gfx On Behalf Of Emily Deng
Sent: Monday, March 29, 2021 1:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily
Subject: [PATCH 3/6] drm/amdgpu: Restore msix after FLR
From: "Emily.Deng"
After FLR, the msix will be cleared, so need
On Thu, 25 Mar 2021 12:12:09 -0400
Alex Deucher wrote:
> + dri-devel
>
> I don't think it's currently exposed anywhere.
>
> Alex
>
> On Wed, Mar 24, 2021 at 5:11 AM Werner Sembach
> wrote:
> >
> > Hello,
> >
> > is the information which color mode is currently in used for a display
> >
[Why]
This issue is found when scaling is not equal to one from src to dest.
When issue happens, there are offsets in both axis x and y between
two cursors. Users cannot control APP under such a condition.
[How]
For dual cursors, cursor should be disabled if there is a visible pipe
on top of the
This message is not needed on Aldebaran.
Signed-off-by: Feifei Xu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 389730a38e19..9e769cf6095b
During driver unloading, don't need to copy mem, or it will introduce
some call trace, such as when sa_manager is freed, it will introduce warn
call trace in amdgpu_sa_bo_new.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +++
1 file changed, 3 insertions(+)
diff
It will hit ramdomly sdma hang, and pending on utcl2
address translation when access the RPTR polling address.
According sdma firmware team mentioned, the RPTR writeback is done by
hardware automatically, and will hit issue when clock gating occurs. So
stop using the rptr write back for sdma5.0.
To fix the board disappear issue.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/nv.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 46d4bbabce75..b9832d31f00d 100644
---
Set the num_types equal to the enabled num_crtc.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
index
From: "Emily.Deng"
After FLR, the msix will be cleared, so need to re-enable it.
Signed-off-by: Emily.Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
Since vcn decoding ring is not required, so just disable it.
Signed-off-by: Frank.Min
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 29 -
2 files changed, 17 insertions(+), 16 deletions(-)
On Fri, Mar 26, 2021 at 04:37:52PM -0400, Lyude Paul wrote:
> This is something that we've wanted for a while now: the ability to
> actually look up the respective drm_device for a given drm_dp_aux struct.
> This will also allow us to transition over to using the drm_dbg_*() helpers
> for debug
On Fri, Mar 26, 2021 at 04:37:49PM -0400, Lyude Paul wrote:
> As pointed out by the documentation for drm_dp_aux_register(),
> drm_dp_aux_init() should be used in situations where the AUX channel for a
> display driver can potentially be registered before it's respective DRM
> driver. This is the
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