No, this structure contains all the details of the vbios: date, serial number,
name, etc.
The sysfs node only contains the vbios name string
> On May 9, 2021, at 23:33, Gu, JiaWei (Will) wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> With a second thought,
> __u8 serial
[AMD Official Use Only - Internal Distribution Only]
With a second thought,
__u8 serial[16] in drm_amdgpu_info_vbios is a bit redundant, sysfs
serial_number already exposes it.
Is it fine to abandon it from drm_amdgpu_info_vbios struct? @Alex Deucher
@Nieto, David M
Best regards,
Jiawei
[AMD Public Use]
Please explicitly print out warning message for
TA_RAS_STATUS__ERROR_ASD_READ_WRITE ASIC prior to aldebaran, and
TA_RAS_STATUS__ERROR_RAS_READ_WRITE for aldebaran and onwards. With that fixed,
the patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message
The original codes use ras status and kernl errno together in the same
function, which is a wrong code style.
Signed-off-by: Dennis Li
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 17b728d2c1f2..231479b67b33 100644
--- a/drivers/gpu/drm/amd
Reviewed-by: Emily Deng
>-Original Message-
>From: amd-gfx On Behalf Of Sun, Roy
>Sent: Saturday, May 8, 2021 12:35 PM
>To: Sun, Roy ; amd-gfx@lists.freedesktop.org
>Subject: RE: [PATCH] drm/amd/amdgpu: Cancel the hrtimer in sw_fini
>
>[AMD Official Use Only - Internal Distribution Only]
[AMD Official Use Only - Internal Distribution Only]
>
>-Original Message-
>From: Liu, Zhan
>Sent: Sunday, May 9, 2021 10:30 PM
>To: amd-gfx@lists.freedesktop.org; Liu, Zhan ; Cornij,
>Nikola
>Subject: [PATCH] drm/amd/display: Avoid HPD IRQ in GPU reset state
>
>[Why]
>If GPU is in rese
[Why]
If GPU is in reset state, force enabling link will cause
unexpected behaviour.
[How]
Avoid handling HPD IRQ when GPU is in reset state.
Signed-off-by: Zhan Liu
Change-Id: I29d80501e44096068e98b5d5984e63822dfcef82
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
1 file chang
Create new structure SISLANDS_SMC_SWSTATE_SINGLE, as initialState.levels
and ACPIState.levels are never actually used as flexible arrays. Those
arrays can be used as simple objects of type
SISLANDS_SMC_HW_PERFORMANCE_LEVEL, instead.
Currently, the code fails because flexible array _levels_ in
stru
Create new structure NISLANDS_SMC_SWSTATE_SINGLE, as initialState.levels
and ACPIState.levels are never actually used as flexible arrays. Those
arrays can be used as simple objects of type
NISLANDS_SMC_HW_PERFORMANCE_LEVEL, instead.
Currently, the code fails because flexible array _levels_ in
stru
It would be very helpful if you could enable drm.debug=0x4 and then
take the dmesg to figure out what modifier was rejected
On Sun, May 9, 2021 at 10:51 PM youling 257 wrote:
>
> look this video,
> https://drive.google.com/file/d/1QklH_H2AlOTu8W1D3yl6_3rtZ7IqbjR_/view?usp=sharing
>
> 2021-05-09 2
Am 09.05.21 um 16:49 schrieb Dwaipayan Ray:
Fix a couple of syntax errors and removed one excess
parameter in the function documentations which lead
to kernel docs build warning.
Signed-off-by: Dwaipayan Ray
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 +++
On Sat, May 8, 2021 at 2:48 AM Jiawei Gu wrote:
>
> 20 should be serial char size now instead of 16.
>
> Signed-off-by: Jiawei Gu
Please make sure this keeps proper 64 bit alignment in the structure.
Alex
> ---
> include/uapi/drm/amdgpu_drm.h | 2 +-
> 1 file changed, 1 insertion(+), 1 delet
On Sun, May 9, 2021 at 11:42 AM youling257 wrote:
>
> I using amd 3400g running with android-x86, this patch is a bad commit when i
> use android-x86 on amdgpu.
Can you provide more details? What sort of problem are you seeing?
Please provide your dmesg output.
Alex
> ___
Hi!
This patch needs some fixing.
On Thu, Apr 22, 2021 at 10:34:48AM +0800, Jiawei Gu wrote:
> + case AMDGPU_INFO_VBIOS_INFO: {
> + struct drm_amdgpu_info_vbios vbios_info = {};
> + struct atom_context *atom_context;
> +
> +
I using amd 3400g running with android-x86, this patch is a bad commit when i
use android-x86 on amdgpu.
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
This function is not used anywhere, remove it. It was added in
40dd6bd376a4 ("drm/amd/display: Linux Set/Read link rate and lane count
through debugfs") and moved in fe798de53a7a ("drm/amd/display: Move link
functions from dc to dc_link"), but a user is missing.
Signed-off-by: Rouven Czerwinski
-
Fix a couple of syntax errors and removed one excess
parameter in the function documentations which lead
to kernel docs build warning.
Signed-off-by: Dwaipayan Ray
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 -
2 files changed, 3 insertions(+)
I using amd 3400g running with android-x86, this patch is a bad commit when i
use android-x86 on amdgpu.
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On Sat, May 08, 2021 at 06:01:23AM +, Gu, JiaWei (Will) wrote:
> [AMD Official Use Only - Internal Distribution Only]
>
> Thanks for this catching Kees.
>
> Yes it should be 20, not 16. I was not aware that serial size had been
> changed from 16 to 20 in struct amdgpu_device.
> Will submit a
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