RE: [PATCH V3 12/12] drm/amdgpu: Removed redundant ras code

[AMD Official Use Only] Thank you Thomas, This series looks good to me too. Reviewed-by: John Clements -Original Message- From: Zhang, Hawking Sent: Wednesday, December 29, 2021 3:55 PM To: Chai, Thomas ; amd-gfx@lists.freedesktop.org; Zhou1, Tao ; Clements, John ; Yang, Stanley

RE: [PATCH 2/2] drm/amdgpu: don't set s3 and s0ix at the same time

[AMD Official Use Only] Series is acked-by: Evan Quan > -Original Message- > From: amd-gfx On Behalf Of > Mario Limonciello > Sent: Monday, January 3, 2022 11:23 PM > To: amd-gfx@lists.freedesktop.org > Cc: Limonciello, Mario > Subject: [PATCH 2/2] drm/amdgpu: don't set s3 and s0ix at

[PATCH] drm/amdgpu: Delay unmapping MMIO VRAM to amdgpu_ttm_fini() in GPU initialization failure

If the driver loads failed during hw_init(), delay unmapping MMIO VRAM to amdgpu_ttm_fini(). Its prevents accessing invalid memory address in vcn_v3_0_sw_fini(). Signed-off-by: Leslie Shi --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 +---

Re: softlockup in v5.15.12 in dcn20_post_unlock_program_front_end

On Sun, 2022-01-02 at 09:30 -0500, Jeff Layton wrote: > I'm seeing a reproducible softlockup on amdgpu on v5.15.12: > > [ 861.656146] [drm:dc_dmub_srv_wait_idle [amdgpu]] *ERROR* Error waiting for > DMUB idle: status=3 > [ 861.914848] [drm:dc_dmub_srv_wait_idle [amdgpu]] *ERROR* Error waiting

Re: [PATCH v2] drm/amd/display: move calcs folder into DML

Hello, Jasdeep, On 2021-12-23 17:44, Dhillon, Jasdeep wrote: > [AMD Official Use Only] > > Hi Isabbasso, > > The patch fails to compile when there is No DCN because the calc > object files fail to generate since dml depends on the > CONFIG_DRM_AMD_DC_DCN being enabled (Makefile inside dc

[PATCH AUTOSEL 5.10 7/8] drm/amd/display: Added power down for DCN10

From: "Lai, Derek" [ Upstream commit d97e631af2db84c8c9d63abf68d487d0bb559e4c ] [Why] The change of setting a timer callback on boot for 10 seconds is still working, just lacked power down for DCN10. [How] Added power down for DCN10. Tested-by: Daniel Wheeler Reviewed-by: Anthony Koo

[PATCH AUTOSEL 5.15 14/16] drm/amd/display: Added power down for DCN10

From: "Lai, Derek" [ Upstream commit d97e631af2db84c8c9d63abf68d487d0bb559e4c ] [Why] The change of setting a timer callback on boot for 10 seconds is still working, just lacked power down for DCN10. [How] Added power down for DCN10. Tested-by: Daniel Wheeler Reviewed-by: Anthony Koo

[PATCH AUTOSEL 5.15 13/16] drm/amd/display: fix B0 TMDS deepcolor no dislay issue

From: Charlene Liu [ Upstream commit 2eb82577a16d4c8eb31e4ed520649850bb95b223 ] [why] B0 PHY C map to F, D map to G driver use logic instance, dmub does the remap. Driver still need use the right PHY instance to access right HW. [how] use phyical instance when program PHY register. [note]

[PATCH AUTOSEL 5.15 11/16] drm/amdgpu: put SMU into proper state on runpm suspending for BOCO capable platform

From: Evan Quan [ Upstream commit 7be3be2b027c12e84833b3dc9597d3bb7e4c5464 ] By setting mp1_state as PP_MP1_STATE_UNLOAD, MP1 will do some proper cleanups and put itself into a state ready for PNP. That can workaround some random resuming failure observed on BOCO capable platforms.

[PATCH AUTOSEL 5.15 10/16] drm/amdgpu: always reset the asic in suspend (v2)

From: Alex Deucher [ Upstream commit daf8de0874ab5b74b38a38726fdd3d07ef98a7ee ] If the platform suspend happens to fail and the power rail is not turned off, the GPU will be in an unknown state on resume, so reset the asic so that it will be in a known good state on resume even if the platform

[PATCH AUTOSEL 5.15 09/16] drm/amd/pm: skip setting gfx cgpg in the s0ix suspend-resume

From: Prike Liang [ Upstream commit 8c45096c60d6ce6341c374636100ed1b2c1c33a1 ] In the s0ix entry need retain gfx in the gfxoff state,so here need't set gfx cgpg in the S0ix suspend-resume process. Moreover move the S0ix check into SMU12 can simplify the code condition check. Bug:

[PATCH AUTOSEL 5.15 03/16] drm/amd/pm: Fix xgmi link control on aldebaran

From: Lijo Lazar [ Upstream commit 19e66d512e4182a0461530fa3159638e0f55d97e ] Fix the message argument. 0: Allow power down 1: Disallow power down Signed-off-by: Lijo Lazar Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin ---

[PATCH AUTOSEL 5.15 02/16] drm/amdgpu: fix dropped backing store handling in amdgpu_dma_buf_move_notify

From: Christian König [ Upstream commit fc74881c28d314b10efac016ef49df4ff40b8b97 ] bo->tbo.resource can now be NULL. Signed-off-by: Christian König Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1811 Acked-by: Alex Deucher Link:

[PATCH 1/2] drm/amdgpu: explicitly check for s0ix when evicting resources

This codepath should be running in both s0ix and s3, but only does currently because s3 and s0ix are both set in the s0ix case. Signed-off-by: Mario Limonciello --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 2/2] drm/amdgpu: don't set s3 and s0ix at the same time

This makes it clearer which codepaths are in use specifically in one state or the other. Signed-off-by: Mario Limonciello --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Re: [PATCH] radeon: add a force flush to delay work when radeon suspend

Am 25.12.21 um 03:56 schrieb 周雪梅: Although radeon card fence and wait for gpu to finish processing current batch rings, there is still a corner case that radeon lockup work queue may not be fully flushed, and meanwhile the radeon_suspend_kms() function has called pci_set_power_state() to put

Re: [RFC v2 8/8] drm/amd/virt: Drop concurrent GPU reset protection for SRIOV

Please don't. This patch is vital to the cleanup of the reset procedure. If SRIOV doesn't work with that we need to change SRIOV and not the driver. Christian. Am 30.12.21 um 19:45 schrieb Andrey Grodzovsky: Sure, I guess i can drop this patch then. Andrey On 2021-12-24 4:57 a.m., JingWen