Am 17.02.22 um 08:54 schrieb Somalapuram, Amaranath:
On 2/16/2022 8:26 PM, Christian König wrote:
Am 16.02.22 um 14:11 schrieb Somalapuram, Amaranath:
On 2/16/2022 3:41 PM, Christian König wrote:
Am 16.02.22 um 10:49 schrieb Somalapuram Amaranath:
List of register populated for dump col
Workstation application ANSA/META get this error dmesg:
[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)
This is caused by:
1. create a 256MB buffer in invisible VRAM
2. CPU map the buffer and access it causes vm_fault and try to move
it to visible VRAM
3. force visible VR
The GPU reset function of raven2 is not maintained or tested, so it should be
very unstable.
Now the amdgpu_asic_reset function is added to amdgpu_pmops_suspend, which
causes the S3 test of raven2 to fail, so the asic_reset of raven2 is ignored
here.
Signed-off-by: Chen Gong
---
drivers/gpu/drm
Am 17.02.22 um 10:04 schrieb Qiang Yu:
Workstation application ANSA/META get this error dmesg:
[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)
This is caused by:
1. create a 256MB buffer in invisible VRAM
2. CPU map the buffer and access it causes vm_fault and try to move
On Thu, Feb 17, 2022 at 5:15 PM Christian König
wrote:
>
> Am 17.02.22 um 10:04 schrieb Qiang Yu:
> > Workstation application ANSA/META get this error dmesg:
> > [drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)
> >
> > This is caused by:
> > 1. create a 256MB buffer in invisi
On 2/17/2022 1:30 PM, Christian König wrote:
Am 17.02.22 um 08:54 schrieb Somalapuram, Amaranath:
On 2/16/2022 8:26 PM, Christian König wrote:
Am 16.02.22 um 14:11 schrieb Somalapuram, Amaranath:
On 2/16/2022 3:41 PM, Christian König wrote:
Am 16.02.22 um 10:49 schrieb Somalapuram Am
Am 17.02.22 um 10:40 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 5:15 PM Christian König
wrote:
Am 17.02.22 um 10:04 schrieb Qiang Yu:
Workstation application ANSA/META get this error dmesg:
[drm:amdgpu_gem_va_ioctl [amdgpu]] *ERROR* Couldn't update BO_VA (-16)
This is caused by:
1. create a 25
Am 17.02.22 um 10:44 schrieb Lazar, Lijo:
On 2/17/2022 1:30 PM, Christian König wrote:
Am 17.02.22 um 08:54 schrieb Somalapuram, Amaranath:
On 2/16/2022 8:26 PM, Christian König wrote:
Am 16.02.22 um 14:11 schrieb Somalapuram, Amaranath:
On 2/16/2022 3:41 PM, Christian König wrote:
A
On 2/17/2022 3:18 PM, Christian König wrote:
Am 17.02.22 um 10:44 schrieb Lazar, Lijo:
On 2/17/2022 1:30 PM, Christian König wrote:
Am 17.02.22 um 08:54 schrieb Somalapuram, Amaranath:
On 2/16/2022 8:26 PM, Christian König wrote:
Am 16.02.22 um 14:11 schrieb Somalapuram, Amaranath:
Am 17.02.22 um 11:01 schrieb Lazar, Lijo:
On 2/17/2022 3:18 PM, Christian König wrote:
Am 17.02.22 um 10:44 schrieb Lazar, Lijo:
On 2/17/2022 1:30 PM, Christian König wrote:
Am 17.02.22 um 08:54 schrieb Somalapuram, Amaranath:
On 2/16/2022 8:26 PM, Christian König wrote:
Am 16.02.
On 2/17/2022 3:34 PM, Christian König wrote:
Am 17.02.22 um 11:01 schrieb Lazar, Lijo:
On 2/17/2022 3:18 PM, Christian König wrote:
Am 17.02.22 um 10:44 schrieb Lazar, Lijo:
On 2/17/2022 1:30 PM, Christian König wrote:
Am 17.02.22 um 08:54 schrieb Somalapuram, Amaranath:
On 2/16
On Thu, Feb 17, 2022 at 5:46 PM Christian König
wrote:
>
> Am 17.02.22 um 10:40 schrieb Qiang Yu:
> > On Thu, Feb 17, 2022 at 5:15 PM Christian König
> > wrote:
> >> Am 17.02.22 um 10:04 schrieb Qiang Yu:
> >>> Workstation application ANSA/META get this error dmesg:
> >>> [drm:amdgpu_gem_va_ioctl
Add device pointer so scheduler's printing can use
DRM_DEV_ERROR() instead, which makes life easier under multiple GPU
scenario.
v2: amend all calls of drm_sched_init()
Signed-off-by: Jiawei Gu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 2
Am 17.02.22 um 11:13 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 5:46 PM Christian König
wrote:
Am 17.02.22 um 10:40 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 5:15 PM Christian König
wrote:
Am 17.02.22 um 10:04 schrieb Qiang Yu:
Workstation application ANSA/META get this error dmesg:
[drm:
Am 17.02.22 um 11:38 schrieb Jiawei Gu:
Add device pointer so scheduler's printing can use
DRM_DEV_ERROR() instead, which makes life easier under multiple GPU
scenario.
v2: amend all calls of drm_sched_init()
That looks better, but please send it to the dri-devel mailing list as well.
Thanks,
Am 17.02.22 um 11:09 schrieb Lazar, Lijo:
On 2/17/2022 3:34 PM, Christian König wrote:
[SNIP]
Is this passed to core memory management by a component like drm or ttm?
The dependency comes from multiple directions. But yes, both DRM core as
well as TTM have that restriction.
Addition
Add device pointer so scheduler's printing can use
DRM_DEV_ERROR() instead, which makes life easier under multiple GPU
scenario.
v2: amend all calls of drm_sched_init()
Signed-off-by: Jiawei Gu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_sched.c | 2
On Thu, Feb 17, 2022 at 6:39 PM Christian König
wrote:
>
>
>
> Am 17.02.22 um 11:13 schrieb Qiang Yu:
> > On Thu, Feb 17, 2022 at 5:46 PM Christian König
> > wrote:
> >> Am 17.02.22 um 10:40 schrieb Qiang Yu:
> >>> On Thu, Feb 17, 2022 at 5:15 PM Christian König
> >>> wrote:
> Am 17.02.22 u
[AMD Official Use Only]
umr uses the config debugfs during init anyways so adding apu status here
instead of fetching it out of DRM makes sense (for umr).
I'll send a v3.
Tom
From: Alex Deucher
Sent: Wednesday, February 16, 2022 09:36
To: StDenis, Tom
Am 17.02.22 um 11:58 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 6:39 PM Christian König
wrote:
Am 17.02.22 um 11:13 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 5:46 PM Christian König
wrote:
Am 17.02.22 um 10:40 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 5:15 PM Christian König
wrote:
Am 17
Hi Mario,
On Wed, Feb 16, 2022 at 10:50:31AM -0600, Limonciello, Mario wrote:
> On 2/16/2022 08:44, Alex Deucher wrote:
> > On Wed, Feb 16, 2022 at 9:34 AM Mika Westerberg
> > wrote:
> > >
> > > Hi all,
> > >
> > > On Tue, Feb 15, 2022 at 01:07:00PM -0600, Limonciello, Mario wrote:
> > > > On 2
Hi Cal,
Am 14.02.22 um 18:45 schrieb Cal Peake:
Hi Christian,
Thanks for the reply.
On Mon, 14 Feb 2022, Christian König wrote:
well that sounds strongly like some hardware problem. What power supply do you
have in that system?
Right now, I've got it hooked up to a Corsair VX550W. It's on
[AMD Official Use Only]
Acked-by: Alex Deucher
From: Gong, Curry
Sent: Thursday, February 17, 2022 4:07 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Gong, Curry
Subject: [PATCH] drm/amdgpu: do not enable asic reset for raven2
The GPU reset fu
List of register populated for dump collection during the GPU reset.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 112
2 files changed, 116 insertions(+)
diff --git a/drivers/gpu/
Dump the list of register values to trace event on GPU reset.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 16
2 files changed, 30 insertions(+)
diff --git a/drivers/gpu/drm
Needed by umr to detect if ip discovered ASIC is an APU or not.
(v2): Remove asic type from packet it's not strictly needed
(v3): Correct comment
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/d
[Public]
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Tom St Denis
Sent: Thursday, February 17, 2022 9:41 AM
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH] drm/amd/amdgpu: Add APU flag to gca_config debugfs data (v3)
Needed by um
From: Yifan Zhang
This patch adds support for sdma 5.2.6.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c| 11 ++-
2 files
From: Boyuan Zhang
Load VCN FW, set caps.
Signed-off-by: Boyuan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/
From: Boyuan Zhang
Enable PG and CG for VCN/JPEG
Signed-off-by: Boyuan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
Series is:
Reviewed-by: Alex Deucher
On Thu, Feb 17, 2022 at 12:44 AM Mario Limonciello
wrote:
>
> Evaluating `pcie_aspm_enabled` as part of driver probe has the implication
> that if one PCIe bridge with an AMD GPU connected doesn't support ASPM
> then none of them do. This is an invalid assum
Acked-by: Alex Deucher
On Wed, Feb 16, 2022 at 6:58 AM YueHaibing wrote:
>
> This is unused after commit 37ff945f804c ("drm/amdgpu: fix convert bad page
> retiremt")
>
> Signed-off-by: YueHaibing
> ---
> drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 7 ---
> 1 file changed, 7 deletions(-)
>
> d
Am 17.02.22 um 15:29 schrieb Somalapuram Amaranath:
List of register populated for dump collection during the GPU reset.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 112
2 fi
This reverts commit e4a10691948030fc92b11b563cf62144d8d7cb8b.
Signed-off-by: Jasdeep Dhillon
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +-
drivers/gpu/drm/amd/display/include/dal_asic_id.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/
This reverts commit e4a106919480.
Jasdeep Dhillon (1):
Revert "drm/amd/display: extend dcn201 support"
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +-
drivers/gpu/drm/amd/display/include/dal_asic_id.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--
2.25.1
On 2022-02-17 10:24, Jasdeep Dhillon wrote:
> This reverts commit e4a10691948030fc92b11b563cf62144d8d7cb8b.
>
It would be good to have a commit description here that mentions
that this is reverting the wrong device ID definition.
> Signed-off-by: Jasdeep Dhillon
Either way, this is
Reviewed-by
On 2/17/2022 8:36 PM, Christian König wrote:
Am 17.02.22 um 15:29 schrieb Somalapuram Amaranath:
List of register populated for dump collection during the GPU reset.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +
drivers/gpu/drm/amd/amdgpu/am
Am 17.02.22 um 16:32 schrieb Somalapuram, Amaranath:
On 2/17/2022 8:36 PM, Christian König wrote:
Am 17.02.22 um 15:29 schrieb Somalapuram Amaranath:
List of register populated for dump collection during the GPU reset.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amd
From: Tom Rix
Clang build fails with
amdgpu_ras.c:2416:7: error: variable 'ras_obj' is used uninitialized
whenever 'if' condition is true
if (adev->in_suspend || amdgpu_in_reset(adev)) {
^
amdgpu_ras.c:2453:6: note: uninitialized use occurs here
if
On Thu, Feb 17, 2022 at 10:26 AM Harry Wentland wrote:
>
> On 2022-02-17 10:24, Jasdeep Dhillon wrote:
> > This reverts commit e4a10691948030fc92b11b563cf62144d8d7cb8b.
> >
>
> It would be good to have a commit description here that mentions
> that this is reverting the wrong device ID definition.
Thanks for catching this.
Reviewed-by: Luben Tuikov
Regards,
Luben
On 2022-02-17 10:38, t...@redhat.com wrote:
> From: Tom Rix
>
> Clang build fails with
> amdgpu_ras.c:2416:7: error: variable 'ras_obj' is used uninitialized
> whenever 'if' condition is true
> if (adev->in_suspend || amdg
Applied. Thanks!
Alex
On Thu, Feb 17, 2022 at 10:57 AM Luben Tuikov wrote:
>
> Thanks for catching this.
>
> Reviewed-by: Luben Tuikov
>
> Regards,
> Luben
>
> On 2022-02-17 10:38, t...@redhat.com wrote:
> > From: Tom Rix
> >
> > Clang build fails with
> > amdgpu_ras.c:2416:7: error: variable
Hi Harry,
On Thu, Feb 10, 2022 at 09:38:24AM -0500, Harry Wentland wrote:
> On 2022-02-10 03:42, Maxime Ripard wrote:
> > On Mon, Feb 07, 2022 at 01:59:38PM -0500, Harry Wentland wrote:
> >> On 2022-02-07 13:57, Harry Wentland wrote:
> >>> On 2022-02-07 11:34, Maxime Ripard wrote:
> The amdgp
On 2/17/2022 03:07, Chen Gong wrote:
The GPU reset function of raven2 is not maintained or tested, so it should be
very unstable.
Now the amdgpu_asic_reset function is added to amdgpu_pmops_suspend, which
causes the S3 test of raven2 to fail, so the asic_reset of raven2 is ignored
here.
Signed-
Clang warns:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.c:267:3:
error: implicit conversion from enumeration type 'enum
mes_map_queues_extended_engine_sel_enum' to different enumeration type
'enum mes_unmap_queues_extended_engine_sel_enum'
[-Werror,-Wenum-conversion]
On Thu, Feb 17, 2022 at 11:22 AM Nathan Chancellor wrote:
>
> Clang warns:
>
> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.c:267:3:
> error: implicit conversion from enumeration type 'enum
> mes_map_queues_extended_engine_sel_enum' to different enumeration type
> 'enum mes_u
Dynamically initialize IP instance attributes. This eliminates bugs
stemming from adding new attributes to an IP instance.
Cc: Alex Deucher
Reported-by: Tom StDenis
Fixes: c10b6aa7417b0a ("drm/amdgpu: Add "harvest" to IP discovery sysfs")
Signed-off-by: Luben Tuikov
---
drivers/gpu/drm/amd/amd
From: Tom Rix
Clang build fails with
kfd_packet_manager_v9.c:267:3: error: implicit conversion
from enumeration type 'enum mes_map_queues_extended_engine_sel_enum'
to different enumeration type
'enum mes_unmap_queues_extended_engine_sel_enum'
extended_engine_sel__mes_map_queues__sdma0_to
On Thu, Feb 17, 2022 at 11:36 AM Luben Tuikov wrote:
>
> Dynamically initialize IP instance attributes. This eliminates bugs
> stemming from adding new attributes to an IP instance.
>
> Cc: Alex Deucher
> Reported-by: Tom StDenis
> Fixes: c10b6aa7417b0a ("drm/amdgpu: Add "harvest" to IP discover
From: Yifan Zhang
this patch adds support for nbio 7.3.0.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c| 4
2 files changed,
From: Yifan Zhang
this patch adds smuio support for smuio 13.0.10.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/am
From: Yifan Zhang
Enabl psp support for psp 13.0.5.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 +
drivers/gpu/drm/amd/amdgp
Nathan just sent out the same patch and I already applied it. Thanks!
Alex
On Thu, Feb 17, 2022 at 11:41 AM wrote:
>
> From: Tom Rix
>
> Clang build fails with
> kfd_packet_manager_v9.c:267:3: error: implicit conversion
> from enumeration type 'enum mes_map_queues_extended_engine_sel_enum'
>
On Thu, 17 Feb 2022, Christian König wrote:
> Ok, at least it doesn't sounds like it is the power supply.
I was able to procure an 800W PSU just to give it a try, and at first it
seemed to make a difference. The drivers would fully load, but after a
short amount of time things would become unst
[AMD Official Use Only]
This works, now I'm facing other issues. Like we call the VCN block on navi10
a "uvd 2.0.0". Originally I was only accepting exact major hits which meant my
navi10 model had no video enc/dec block once I programmed it to take the
closest match it hit UVD 4.0.0 (pre-soc
On Thu, Feb 17, 2022 at 1:25 PM StDenis, Tom wrote:
>
> [AMD Official Use Only]
>
> This works, now I'm facing other issues. Like we call the VCN block on
> navi10 a "uvd 2.0.0". Originally I was only accepting exact major hits which
> meant my navi10 model had no video enc/dec block once I pr
On Thu, Feb 17, 2022 at 2:04 PM Nick Desaulniers
wrote:
>
> On Thu, Feb 17, 2022 at 8:16 AM Alex Deucher wrote:
> >
> > Applied. Thanks!
> >
> > Alex
>
> Alex,
> Has AMD been able to set up clang builds, yet?
No. I think some individual teams do, but it's never been integrated
into our larger
[AMD Official Use Only]
Acked-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Danijel
Slivka
Sent: Thursday, February 10, 2022 8:24 PM
To: amd-gfx@lists.freedesktop.org
Cc: Slivka, Danijel
Subject: [PATCH] amdgpu/pm: Disable managing hwmon sysfs attributes for
[AMD Official Use Only]
I can do IP name substitutions but that's kinda not the point. We put headers
called "vcn_x_y_z*.h" in the source tree but call the IP block UVD.
As for SDMA ... the IP discovery has entries for SDMA0 and SDMA1 IP blocks on
my navi10...
[root@fedora umr]# cat
/sys/cla
On Thu, Feb 17, 2022 at 2:20 PM StDenis, Tom wrote:
>
> [AMD Official Use Only]
>
> I can do IP name substitutions but that's kinda not the point. We put
> headers called "vcn_x_y_z*.h" in the source tree but call the IP block UVD.
>
> As for SDMA ... the IP discovery has entries for SDMA0 and S
The 2022 X.Org Foundation elections are rapidly approaching. We will be
forwarding instructions on the nomination process to membership in the
near future.
Please note that only current members can vote in the upcoming election,
and that the deadline for new memberships or renewals to vote in the
This updates the SMU 13 support for chips that use the SMU 13.0.5.
The SMU (System Management Unit) is the power management
microcontroller on the GPU.
Yifan Zhang (3):
drm/admgpu/pm: add smu 13.0.5 driver interface headers
drm/amd/pm: update smc message sequence for smu 13.0.5
drm/amd/pm: a
From: Yifan Zhang
this patch updates smc message sequence for smu 13.0.5.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 34 ++
1 file changed, 29 insertions(+), 5 d
From: Yifan Zhang
This patch is to add smu 13.0.5 driver interface headers.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
.../inc/pmfw_if/smu13_driver_if_v13_0_5.h | 140 ++
.../pm/swsmu/inc/pmfw_if/smu_v13_0_
From: Yifan Zhang
this patch adds smu_v13_0_5_ppt implementation.
Signed-off-by: Yifan Zhang
Reviewed-by: Alex Deucher
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c |1 +
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c |4 +
drive
On Mon, Feb 14, 2022 at 12:56:58PM +0200, Mika Westerberg wrote:
> On Mon, Feb 14, 2022 at 09:52:02AM +0100, Lukas Wunner wrote:
> > On Mon, Feb 14, 2022 at 09:34:26AM +0200, Mika Westerberg wrote:
> > > On Fri, Feb 11, 2022 at 03:45:46PM -0600, Bjorn Helgaas wrote:
> > > > My expectation is that "
From: Leo Li
DC_FP_START/END is only defined for CONFIG_DRM_AMD_DC_DCN enabled
builds, and update_bw_bounding_box() is only valid for DCN ASICs.
Therefore, wrap the entire thing in the ifdef guard.
Acked-by: Alex Deucher
Signed-off-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2
Am 2022-02-16 um 07:26 schrieb Jason Gunthorpe:
The other place that needs careful audit is all the callers using
vm_normal_page() - they must all be able to accept a ZONE_DEVICE page
if we don't set pte_devmap.
How much code are we talking about here? A quick search finds 26
call-sites in 12
On 2022-02-17 16:05, sunpeng...@amd.com wrote:
> From: Leo Li
>
> DC_FP_START/END is only defined for CONFIG_DRM_AMD_DC_DCN enabled
> builds, and update_bw_bounding_box() is only valid for DCN ASICs.
>
> Therefore, wrap the entire thing in the ifdef guard.
>
> Acked-by: Alex Deucher
> Signe
Quoting Qing Wang (2022-02-14 17:55:39)
> From: Wang Qing
>
> Use the helper function time_is_{before,after}_jiffies() to improve
> code readability.
>
> Signed-off-by: Wang Qing
> ---
Applied to clk-next
The TMZ is disabled by default and enable TMZ option
for the IP discovery based asic will help on the TMZ
function verification.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/d
[AMD Official Use Only]
":" is expected behind "case CHIP_IP_DISCOVERY"
--
Best Regards
Aaron Liu
> -Original Message-
> From: amd-gfx On Behalf Of Prike
> Liang
> Sent: Friday, February 18, 2022 9:37 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Liang, Prike
> ; Hua
[Public]
Ah, it's a typo, will re-sent a new patch.
> -Original Message-
> From: Liu, Aaron
> Sent: Friday, February 18, 2022 9:56 AM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Liang, Prike
> ; Huang, Ray
> Subject: RE: [PATCH] drm/amdgpu: enable TMZ o
The TMZ is disabled by default and enable TMZ option
for the IP discovery based asic will help on the TMZ
function verification.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/d
[AMD Official Use Only]
Reviewed-by: Aaron Liu
--
Best Regards
Aaron Liu
> -Original Message-
> From: Liang, Prike
> Sent: Friday, February 18, 2022 10:08 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Liu, Aaron
> ; Huang, Ray ; Liang, Prike
>
> Subject: [PATCH] dr
On Thu, Feb 17, 2022 at 8:22 PM Christian König
wrote:
>
> Am 17.02.22 um 11:58 schrieb Qiang Yu:
> > On Thu, Feb 17, 2022 at 6:39 PM Christian König
> > wrote:
> >>
> >>
> >> Am 17.02.22 um 11:13 schrieb Qiang Yu:
> >>> On Thu, Feb 17, 2022 at 5:46 PM Christian König
> >>> wrote:
> Am 17.0
There's always miss the SMU feature enabled checked in the NPI phase,
so let validate the SMU feature enable message directly rather than
add more and more MP1 version check.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 28 ++
1 file changed, 6
[Public]
Please ignore this patch for the moment and seems need take care the RN series
for a special case.
> -Original Message-
> From: Liang, Prike
> Sent: Friday, February 18, 2022 11:55 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Quan, Evan
> ; Huang, Ray ; Lia
On 2/18/2022 9:25 AM, Prike Liang wrote:
There's always miss the SMU feature enabled checked in the NPI phase,
so let validate the SMU feature enable message directly rather than
add more and more MP1 version check.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 28
[Public]
> -Original Message-
> From: Lazar, Lijo
> Sent: Friday, February 18, 2022 12:05 PM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Quan, Evan
> ; Huang, Ray
> Subject: Re: [PATCH] drm/amd/pm: validate SMU feature enable message for
> getting featur
Based on firmware team's input, harvest table in VBIOS does
not apply well to legacy products like Navi1x, so seperate
harvest mask configuration retrieve from different places.
On legacy GPUs, scan harvest bit per IP data stuctures,
while for newer ones, still read IP harvest info from harvest
tab
This reverts commit 2f73d74ac4cd880beaa1c19fa9ef0296c3eb3b60.
No need to support modifier in virtual kms, otherwise, in SRIOV
mode, when lanuching X server, set crtc will fail due to mismatch
between primary plane modifier and framebuffer modifier.
Signed-off-by: Guchun Chen
---
drivers/gpu/drm
vkms leverages common amdgpu framebuffer creation, and
also it does not support pixel format modifier, so there
is no need to check tiling flags when initing framebuffer.
This can fix below calltrace:
amdgpu :00:08.0: GFX9+ requires FB check based on format modifier
WARNING: CPU: 0 PID: 1023 a
On 2/18/2022 9:57 AM, Liang, Prike wrote:
[Public]
-Original Message-
From: Lazar, Lijo
Sent: Friday, February 18, 2022 12:05 PM
To: Liang, Prike ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
; Huang, Ray
Subject: Re: [PATCH] drm/amd/pm: validate SMU feature en
[Public]
> -Original Message-
> From: Lazar, Lijo
> Sent: Friday, February 18, 2022 1:29 PM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Quan, Evan
> ; Huang, Ray
> Subject: Re: [PATCH] drm/amd/pm: validate SMU feature enable message for
> getting feature
There's always miss the SMU feature enabled checked in the NPI phase,
so let validate the SMU feature enable message directly rather than
add more and more MP1 version check.
Signed-off-by: Prike Liang
Signed-off-by: Lijo Lazar
---
.../amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 -
.../g
Am 17.02.22 um 19:10 schrieb Cal Peake:
On Thu, 17 Feb 2022, Christian König wrote:
Ok, at least it doesn't sounds like it is the power supply.
I was able to procure an 800W PSU just to give it a try, and at first it
seemed to make a difference. The drivers would fully load, but after a
short
Hello David Yat Sin,
The patch 42c6c48214b7: "drm/amdkfd: CRIU checkpoint and restore
queue mqds" from Jan 25, 2021, leads to the following Smatch static
checker warning:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v9.c:344
restore_mqd()
error: 'ctl_stack_size' from user
Am 18.02.22 um 04:08 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 8:22 PM Christian König
wrote:
Am 17.02.22 um 11:58 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 6:39 PM Christian König
wrote:
Am 17.02.22 um 11:13 schrieb Qiang Yu:
On Thu, Feb 17, 2022 at 5:46 PM Christian König
wrote:
Am 17.
Felix need to comment as well, but I don't think that this will work
that easily.
By changing the entry from 1 to 0 your are also changing the size of the
structure.
Regards,
Christian.
Am 18.02.22 um 04:09 schrieb cgel@gmail.com:
From: Changcheng Deng
There is a regular need in the k
90 matches
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