Am 30.03.22 um 22:51 schrieb philip yang:
On 2022-03-30 05:00, Christian König wrote:
Testing the valid bit is not enough to figure out if we
need to invalidate the TLB or not.
During eviction it is quite likely that we move a BO from VRAM to GTT and
update the page tables immediately to the
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Evan Quan
Sent: Thursday, March 31, 2022 11:33
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; StDenis, Tom
; Quan, Evan
Subject: [PATCH] drm/amdgpu: expand cg_
With this, we can support more CG flags.
Signed-off-by: Evan Quan
Acked-by: Alex Deucher
Change-Id: Iccf13c2f9c570ca6a4654291fc4876556125c3b8
--
v1->v2:
- amdgpu_debugfs_gca_config_read: add a new rev to
support CG flag upper 32 bits(Alex)
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h |
[AMD Official Use Only]
Hi Arthur,
Please drop the lock protection enforced in
amdgpu_dpm_set_powergating_by_smu(as below) and have a try.
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index c73fb73e9628..bc2b5d77c3f5 100644
--- a/drivers/gpu/drm/amd/pm
Reviewed-by: Leo Liu
On 2022-03-30 20:59, boyuan.zh...@amd.com wrote:
From: Boyuan Zhang
For VCN FW to detect ASIC type, in order to use different mailbox registers.
V2: simplify codes and fix format issue.
V3: re-order if/else condition from the smallest version.
Signed-off-by: Boyuan Zhan
[AMD Official Use Only]
Hi Paul,
I just sent out V3, which re-ordered the if/else condition as you suggested.
By the way, both V2 and V3 can be applied successfully on my local machine. In
case it still doesn't apply on your side, can I ask which branch are you using?
Thanks,
Boyuan
-Orig
From: Boyuan Zhang
For VCN FW to detect ASIC type, in order to use different mailbox registers.
V2: simplify codes and fix format issue.
V3: re-order if/else condition from the smallest version.
Signed-off-by: Boyuan Zhang
Acked-by Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 7 ++
>From [1], I realized two other calls to dcn30 code are associated with
FPU operations and are not protected by DC_FP_* macros:
* dcn30_populate_dml_writeback_from_context()
* dcn30_set_mcif_arb_params()
So, since FPU-associated code is not fully isolated in dcn30, and
dcn3.1.x reuses them, let's
Hi Matthew,
I sent this patch by accident. Please ignore it.
Regards,
Alex Sierra
> -Original Message-
> From: Matthew Wilcox
> Sent: Wednesday, March 30, 2022 4:29 PM
> To: Sierra Guiza, Alejandro (Alex)
> Cc: j...@nvidia.com; da...@redhat.com; Kuehling, Felix
> ; linux...@kvack.org; r
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: a67ba3cf9551f8c92d5ec9d7eae1aadbb9127b57 Add linux-next specific
files for 20220330
Error/Warning reports:
https://lore.kernel.org/llvm/202203030117.mehb12te-...@intel.com
https
On Wed, Mar 30, 2022 at 04:24:20PM -0500, Alex Sierra wrote:
> From: Philip Yang
>
> SVMAPISupported property added to HSA_CAPABILITY, the value match
> HSA_CAPABILITY defined in Thunk spec:
>
> SVMAPISupported: it will not be supported on older kernels that don't
> have HMM or on systems with G
Please ignore this patch.
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Sierra
> Sent: Wednesday, March 30, 2022 4:24 PM
> To: j...@nvidia.com
> Cc: rcampb...@nvidia.com; wi...@infradead.org; da...@redhat.com;
> Kuehling, Felix ; apop...@nvidia.com; amd-
> g...@lists.freedeskto
The objective is to test device migration mechanism in pages marked
as COW, for private and coherent device type. In case of writing to
COW private page(s), a page fault will migrate pages back to system
memory first. Then, these pages will be duplicated. In case of COW
device coherent type, pages
Test device pages with get_user_pages and get_user_pages_fast.
The motivation is to test device coherent type pages in the gup and
gup fast paths, after vm_normal_pages was split into LRU and non-LRU
handled.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
---
tools/testing/selftests/vm/hmm
With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
device-managed anonymous pages that are not LRU pages. Although they
behave like normal pages for purposes of mapping in CPU page, and for
COW. They do not support LRU lists, NUMA migration or THP. The
difference between new vm_normal_l
With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
device-managed anonymous pages that are not LRU pages. Although they
behave like normal pages for purposes of mapping in CPU page, and for
COW. They do not support LRU lists, NUMA migration or THP. The
difference between new vm_normal_l
From: Philip Yang
SVMAPISupported property added to HSA_CAPABILITY, the value match
HSA_CAPABILITY defined in Thunk spec:
SVMAPISupported: it will not be supported on older kernels that don't
have HMM or on systems with GFXv8 or older GPUs without support for
48-bit virtual addresses.
CoherentH
On 2022-03-30 05:00, Christian König
wrote:
Testing the valid bit is not enough to figure out if we
need to invalidate the TLB or not.
During eviction it is quite likely that we move a BO from VRAM to GTT and
update the page tables immediately to the new GTT
On 30/03/22 2:42 pm, Christian König wrote:
> Am 30.03.22 um 11:20 schrieb Arunpravin Paneer Selvam:
>>
>> On 30/03/22 2:37 pm, Christian König wrote:
>>> Am 30.03.22 um 11:04 schrieb Arunpravin Paneer Selvam:
Round up the size value to the min_page_size and trim the last block to
the
On Wed, 30 Mar 2022, Felix Kuehling wrote:
>
> Am 2022-03-30 um 03:51 schrieb Lee Jones:
> > This ensures userspace cannot prematurely clean-up the client before
> > it is fully initialised which has been proven to cause issues in the
> > past.
> >
> > Cc: Felix Kuehling
> > Cc: Alex Deucher
>
Am 2022-03-30 um 03:51 schrieb Lee Jones:
This ensures userspace cannot prematurely clean-up the client before
it is fully initialised which has been proven to cause issues in the
past.
Cc: Felix Kuehling
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel
This ensures userspace cannot prematurely clean-up the client before
it is fully initialised which has been proven to cause issues in the
past.
Cc: Felix Kuehling
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: amd-gfx@lists.freedesktop.org
Cc:
On 3/30/2022 6:59 PM, Kent Russell wrote:
Since unique_id is only supported in PMFW 0x3A5300 and higher, we will
only be able to use it inside Smu_Metrics_V3_t, which requires PMFW
0x3A4900 and higher. Remove the unique_id/serial_number references from
the v1 and v2 tables to avoid any confusi
On 2022-03-30 08:30, Rodrigo Siqueira Jordao wrote:
>
>
> On 2022-03-29 16:18, Melissa Wen wrote:
>> "Pre-multiplied" is the default pixel blend mode for KMS/DRM, as
>> documented in supported_modes of drm_plane_create_blend_mode_property():
>> https://cgit.freedesktop.org/drm/drm-misc/tree/dr
On 03/30, Rodrigo Siqueira Jordao wrote:
>
>
> On 2022-03-26 16:24, Melissa Wen wrote:
> > From FPU documentation, developers must not use DC_FP_START/END in dml
> > files, but invoke it when calling FPU-associated functions (isolated in
> > dml folder). Therefore, the first patch renames dcn10_
On 03/30, VURDIGERENATARAJ, CHANDAN wrote:
> Hi Paul,
>
> >Am 29.03.22 um 10:29 schrieb CHANDAN VURDIGERE NATARAJ:
> >
> >Is it common to spell your name all uppercase? If not, please use Chandan
> >nVurdigere Nataraj.
> >
> >> [WHY]
> >
> >The [] already emphasize the word, so Why could be used.
Since unique_id is only supported in PMFW 0x3A5300 and higher, we will
only be able to use it inside Smu_Metrics_V3_t, which requires PMFW
0x3A4900 and higher. Remove the unique_id/serial_number references from
the v1 and v2 tables to avoid any confusion, and return 0 if metrics_v1
or metrics_v2 ar
On 2022-03-26 16:24, Melissa Wen wrote:
From FPU documentation, developers must not use DC_FP_START/END in dml
files, but invoke it when calling FPU-associated functions (isolated in
dml folder). Therefore, the first patch renames dcn10_validate_bandwidth
in dml/calcs to dcn_ for generalizati
On 2022-03-29 16:18, Melissa Wen wrote:
"Pre-multiplied" is the default pixel blend mode for KMS/DRM, as
documented in supported_modes of drm_plane_create_blend_mode_property():
https://cgit.freedesktop.org/drm/drm-misc/tree/drivers/gpu/drm/drm_blend.c
In this mode, both 'pixel alpha' and 'pl
On Tue, Mar 29, 2022 at 12:25:55PM -0400, Marek Olšák wrote:
> I don't know what iris does, but I would guess that the same problems as
> with AMD GPUs apply, making GPUs resets very fragile.
iris_batch_check_for_reset -> replace_kernel_ctx -> iris_lost_context_state
is I think the main call chai
Am 30.03.22 um 11:20 schrieb Arunpravin Paneer Selvam:
On 30/03/22 2:37 pm, Christian König wrote:
Am 30.03.22 um 11:04 schrieb Arunpravin Paneer Selvam:
Round up the size value to the min_page_size and trim the last block to
the required size.
This solves a bug detected when size is not alig
On 30/03/22 2:37 pm, Christian König wrote:
> Am 30.03.22 um 11:04 schrieb Arunpravin Paneer Selvam:
>> Round up the size value to the min_page_size and trim the last block to
>> the required size.
>>
>> This solves a bug detected when size is not aligned with the min_page_size.
>> Unigine Heave
Am 30.03.22 um 11:04 schrieb Arunpravin Paneer Selvam:
Round up the size value to the min_page_size and trim the last block to
the required size.
This solves a bug detected when size is not aligned with the min_page_size.
Unigine Heaven has allocation requests for example required pages are 257
On 29/03/22 4:54 pm, Matthew Auld wrote:
> On Tue, 29 Mar 2022 at 12:17, Arunpravin Paneer Selvam
> wrote:
>>
>>
>>
>> On 23/03/22 1:15 pm, Christian König wrote:
>>> Am 23.03.22 um 08:34 schrieb Arunpravin Paneer Selvam:
Add a simple check to reject any size not aligned to the
min_pa
Round up the size value to the min_page_size and trim the last block to
the required size.
This solves a bug detected when size is not aligned with the min_page_size.
Unigine Heaven has allocation requests for example required pages are 257
and alignment request is 256. To allocate the left over 1
Testing the valid bit is not enough to figure out if we
need to invalidate the TLB or not.
During eviction it is quite likely that we move a BO from VRAM to GTT and
update the page tables immediately to the new GTT address.
Rework the whole function to get all the necessary parameters directly as
>Hi Chandan,
>
>This issue we found on the Zork project which uses the kernel 5.4 on. So I
>just implemented it on kernel 5.4.
>For finding out which is 3250c, I referenced the function which is implemented
>from another function.
>Below is the part where I found it.
>
>drivers/gpu/drm/amd/amdgpu
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