Applied. Thanks!
Alex
On Sun, Apr 24, 2022 at 4:15 PM Liu, Zhan wrote:
>
> [AMD Official Use Only - General]
>
> > -Original Message-
> > From: Guo Zhengkui
> > Sent: 2022/April/24, Sunday 5:06 AM
> > To: Wentland, Harry ; Li, Sun peng (Leo)
> > ; Siqueira, Rodrigo ;
> > Deucher, Alexa
[Public]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Prike Liang
Sent: Monday, April 25, 2022 2:52 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Lazar, Lijo
; Liang, Prike ; Huang, Ray
Subject: [PATCH] drm/amdgpu: keep mmhub clock gati
[Public]
> -Original Message-
> From: Demi Marie Obenour
> Sent: Sunday, April 24, 2022 7:39 PM
> To: Thorsten Leemhuis ; Greg KH
>
> Cc: amd-gfx@lists.freedesktop.org; regressi...@lists.linux.dev;
> Deucher, Alexander ; Koenig, Christian
> ; Pan, Xinhui
> Subject: Re: [REGRESSION] A
[Why]
Allow for PSR SMU optimization and PSR multiple display optimization.
[How]
Add feature flags of PSR smu optimization and PSR multiple display
optimiztaion, and set them during init sequence. By default, flags
are disabled.
Signed-off-by: David Zhang
Reviewed-by: Harry Wentland
Reviewed-b
[Public]
Reviewed-by: Roman Li
> -Original Message-
> From: Zhang, Dingchen (David)
> Sent: Monday, April 25, 2022 3:25 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Wentland, Harry ; Li, Sun peng (Leo)
> ; Lakha, Bhawanpreet
> ; Siqueira, Rodrigo
> ; Pillai, Aurabindo ;
> Zhuo, Qingqing
[Why]
Allow for PSR SMU optimization and PSR multiple display optimization.
[How]
Add feature flags of PSR smu optimization and PSR multiple display
optimiztaion, and set them during init sequence. By default, flags
are disabled.
Signed-off-by: David Zhang
---
drivers/gpu/drm/amd/include/amd_sh
On 2022-04-25 15:10, David Zhang wrote:
[Why]
Allow for PSR SMU optimization and PSR multiple display optimization.
[How]
Add feature flags of PSR smu optimization and PSR multiple display
optimiztaion, and set them during init sequence. By default, flags
are disabled.
Signed-off-by: David Zhan
[Why]
Allow for PSR SMU optimization and PSR multiple display optimization.
[How]
Add feature flags of PSR smu optimization and PSR multiple display
optimiztaion, and set them during init sequence. By default, flags
are disabled.
Signed-off-by: David Zhang
---
drivers/gpu/drm/amd/include/amd_sh
On 2022-04-25 12:11, Alex Deucher wrote:
It's not used outside of dcn31_clk_mgr.c.
Reported-by: kernel test robot
Signed-off-by: Alex Deucher
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 de
Applied, but please fix your mailer. Also, please prepend patch
titles with "drm/amdgpu".
Thanks,
Alex
On Mon, Apr 25, 2022 at 7:03 AM Haohui Mai wrote:
>
> Thanks for the prompt reviews. Here is the updated patch.
>
> Signed-off-by: Haohui Mai
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
I applied the patches, but I had to manually munge them to make them
apply since the formatting was all messed up. Please use git
send-email in the future.
Alex
On Mon, Apr 25, 2022 at 12:03 PM Christian König
wrote:
>
> Alex is usually picking up patches like this one here from the mailing lis
+ dri-devel
On Mon, Apr 25, 2022 at 3:33 AM Krylov Michael wrote:
>
> Hello!
>
> After updating my Linux kernel from version 4.19 (Debian 10 version) to
> 5.10 (packaged with Debian 11), I've noticed that the image
> displayed on my older computer, 32-bit Pentium 4 using ATI Radeon X1950
> AGP vi
On Sun, Apr 24, 2022 at 10:25 PM Evan Quan wrote:
>
> Fix the compile warning below:
> drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_dpm.c:1641
> kv_get_acp_boot_level() warn: always true condition '(table->entries[i]->clk
> >= 0) => (0-u32max >= 0)'
>
> Reported-by: kernel test robot
> CC: Ale
Applied. Thanks!
Alex
On Sat, Apr 23, 2022 at 4:02 PM Tom Rix wrote:
>
> Sparse reports these issues
> si_dpm.c:332:26: warning: symbol 'cac_weights_pitcairn' was not declared.
> Should it be static?
> si_dpm.c:1088:26: warning: symbol 'cac_weights_oland' was not declared.
> Should it be stat
On Sat, Apr 23, 2022 at 9:44 AM Tom Rix wrote:
>
> Sparse reports these issues
> cik_blit_shaders.c:31:11: warning: symbol 'cik_default_state' was not
> declared. Should it be static?
> cik_blit_shaders.c:246:11: warning: symbol 'cik_default_size' was not
> declared. Should it be static?
>
> cik
On Fri, Apr 22, 2022 at 9:29 PM Randy Dunlap wrote:
>
> Fix kernel-doc warnings for a comment that should not use
> kernel-doc notation:
>
> dmub_psr.c:235: warning: This comment starts with '/**', but isn't a
> kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
> * Set PSR power o
Am 2022-04-25 um 11:29 schrieb Felix Kuehling:
Am 2022-04-23 um 13:54 schrieb Christian König:
Am 23.04.22 um 04:24 schrieb Alex Sierra:
This is not a kernel error. These logs are caused by VM faults that
could not be handled. Typically, generated by user mode applications.
Well it's still a
It's not used outside of dcn31_clk_mgr.c.
Reported-by: kernel test robot
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
Alex is usually picking up patches like this one here from the mailing list.
Feel free to add a Reviewed-by: Christian König
to the series.
Thanks for the help,
Christian.
Am 25.04.22 um 14:44 schrieb Haohui Mai:
Your prompt reviews are highly appreciated. Thanks.
A little bit off-topic --
Am 2022-04-23 um 13:54 schrieb Christian König:
Am 23.04.22 um 04:24 schrieb Alex Sierra:
This is not a kernel error. These logs are caused by VM faults that
could not be handled. Typically, generated by user mode applications.
Well it's still a hardware fault which should be logged as an erro
Am 2022-04-19 um 20:47 schrieb Philip Yang:
To avoid unnecessary unmap SVM range from GPUs if range is not mapped on
GPUs when migrating the range. This flag will also be used to flush TLB
when updating the existing mapping on GPUs.
It is protected by prange->migrate_mutex and mmap read lock in
Am 2022-04-22 um 18:05 schrieb Felix Kuehling:
On 2022-04-22 10:06, Philip Yang wrote:
Change SVM range mapping flags or access attributes don't trigger
migration, if range is already mapped on GPUs we should update GPU
mapping and pass flush_tlb flag true to amdgpu vm.
Change SVM range preferr
[Public]
Hi all,
This week this patchset was tested on the following systems:
HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p
60hz, 4k 60hz (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI),
1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
Leno
Your prompt reviews are highly appreciated. Thanks.
A little bit off-topic -- I'm not too familiar with the whole process.
Just wondering, what else needs to be done in order to ensure the
patches get picked up in the next available merge window?
Thanks,
Haohui
On Mon, Apr 25, 2022 at 8:41 PM Ha
This patch fixes the issue where the driver miscomputes the 64-bit
values of the wptr of the SDMA doorbell when initializing the
hardware. SDMA engines v4 and later on have full 64-bit registers for
wptr thus they should be set properly.
Older generation hardwares like CIK / SI have only 16 / 20 /
Am 25.04.22 um 14:19 schrieb Haohui Mai:
Dropped the changes of older generations.
Signed-off-by: Haohui Mai
Please update the commit messages to include all the background we just
discussed.
With that done the series is Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/sd
Sounds good to me.
Updated the patch for the CIK / SI hardware. I kept the clamping code
to be safe.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 5 ++---
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8
drivers/gpu/
Dropped the changes of older generations.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 8
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 8
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/driv
Am 25.04.22 um 13:49 schrieb Haohui Mai:
I kept the original clamping for CIK / SI in this patch.
I don't really care much about them. Keep it as you like, it's only for
the older hw generations anyway.
Regards,
Christian.
Please let me know if you want to remove them.
Signed-off-by: Hao
Am 25.04.22 um 13:47 schrieb Haohui Mai:
Updated the commit messages based on the previous discussion.
Please drop all the changes for pre SDMA v4 hardware (e.g. the ones with
only a 32bit register), so that we only have the changes for the 64bit
hw versions in here.
Apart from that looks g
I kept the original clamping for CIK / SI in this patch.
Please let me know if you want to remove them.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 5 ++---
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8
drivers/g
Updated the commit messages based on the previous discussion.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++--
driv
Am 25.04.22 um 13:14 schrieb Haohui Mai:
Sorry for the confusion. I misread the code, but it still seems to me
it is a valid issue. What the patch tries to do is to fix the
following pattern:
- WREG32(sdma_v5_2_get_reg_offset(adev, i,
mmSDMA0_GFX_RB_WPTR), lower_32_bits(rin
Sorry for the confusion. I misread the code, but it still seems to me
it is a valid issue. What the patch tries to do is to fix the
following pattern:
- WREG32(sdma_v5_2_get_reg_offset(adev, i,
mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr) << 2);
- WRE
Thanks for the prompt reviews. Here is the updated patch.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 9426e252d8aa.
Am 25.04.22 um 11:15 schrieb Haohui Mai:
Computing the address of the doorbell should be done before instead of after
separating the 64-bit address into the higher and lower half. The
current code sets the MMIO registers incorrectly if the address of the
doorbell is above 1G.
That doesn't make
Am 25.04.22 um 10:56 schrieb Haohui Mai:
The gfx_v10_0_ring_test_ib() function uses 20 bytes instead of 16
bytes during the test. The patch sets the size of the allocation to be
4-byte larger to match the actual usage.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +
Computing the address of the doorbell should be done before instead of after
separating the 64-bit address into the higher and lower half. The
current code sets the MMIO registers incorrectly if the address of the
doorbell is above 1G.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/cik
The gfx_v10_0_ring_test_ib() function uses 20 bytes instead of 16
bytes during the test. The patch sets the size of the allocation to be
4-byte larger to match the actual usage.
Signed-off-by: Haohui Mai
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Two Qubes OS users reported that their AMD GPU systems did not work on
5.17.4, while 5.16.18 worked fine. Details can be found on
https://github.com/QubesOS/qubes-issues/issues/7462. The initial report
listed the GPU as “Advanced Micro Devices, Inc. [AMD/ATI] Renoir
[1002:1636} (rev d3) (prog-if
#regzbot introduced: v5.17.3..v5.17.4
(as per
https://github.com/QubesOS/qubes-issues/issues/7462#issuecomment-1107679532)
--
Sincerely,
Demi Marie Obenour (she/her/hers)
Invisible Things Lab
signature.asc
Description: PGP signature
Two Qubes OS users reported that their AMD GPU systems did not work on
5.17.4, while 5.16.18 worked fine. Details can be found on
https://github.com/QubesOS/qubes-issues/issues/7462. The initial report
listed the GPU as “Advanced Micro Devices, Inc. [AMD/ATI] Renoir
[1002:1636} (rev d3) (prog-if
Fix the following coccicheck warning:
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c:98:8-10:
WARNING: possible condition with no effect (if == else)
Signed-off-by: Guo Zhengkui
---
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_hwseq.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/d
On Sun, Apr 24, 2022 at 11:02:43AM +0200, Thorsten Leemhuis wrote:
> CCing the amdgpu maintainers
Also CCing Marek Marczykowski-Górecki as Qubes OS Project Lead.
> On 24.04.22 08:12, Greg KH wrote:
> > On Sat, Apr 23, 2022 at 12:06:33PM -0400, Demi Marie Obenour wrote:
> >> Two Qubes OS users rep
Hello!
After updating my Linux kernel from version 4.19 (Debian 10 version) to
5.10 (packaged with Debian 11), I've noticed that the image
displayed on my older computer, 32-bit Pentium 4 using ATI Radeon X1950
AGP video card is severely corrupted in the graphical (Xorg and Wayland)
mode: all kin
On Sun, Apr 24, 2022 at 11:02:43AM +0200, Thorsten Leemhuis wrote:
> CCing the amdgpu maintainers
>
> On 24.04.22 08:12, Greg KH wrote:
> > On Sat, Apr 23, 2022 at 12:06:33PM -0400, Demi Marie Obenour wrote:
> >> Two Qubes OS users reported that their AMD GPU systems did not work on
> >> 5.17.4, w
Fix kernel-doc warnings for a comment that should not use
kernel-doc notation:
dmub_psr.c:235: warning: This comment starts with '/**', but isn't a kernel-doc
comment. Refer Documentation/doc-guide/kernel-doc.rst
* Set PSR power optimization flags.
dmub_psr.c:235: warning: missing initial short
On Sat, Apr 23, 2022 at 12:06:33PM -0400, Demi Marie Obenour wrote:
> Two Qubes OS users reported that their AMD GPU systems did not work on
> 5.17.4, while 5.16.18 worked fine. Details can be found on
> https://github.com/QubesOS/qubes-issues/issues/7462. The initial report
> listed the GPU as “
Sparse reports these issues
si_dpm.c:332:26: warning: symbol 'cac_weights_pitcairn' was not declared.
Should it be static?
si_dpm.c:1088:26: warning: symbol 'cac_weights_oland' was not declared. Should
it be static?
Both of these variables are only used in si_dpm.c. Single file variables
should
Sparse reports these issues
cik_blit_shaders.c:31:11: warning: symbol 'cik_default_state' was not declared.
Should it be static?
cik_blit_shaders.c:246:11: warning: symbol 'cik_default_size' was not declared.
Should it be static?
cik_default_state and cik_default_size are only used in cik.c. Sin
CCing the amdgpu maintainers
On 24.04.22 08:12, Greg KH wrote:
> On Sat, Apr 23, 2022 at 12:06:33PM -0400, Demi Marie Obenour wrote:
>> Two Qubes OS users reported that their AMD GPU systems did not work on
>> 5.17.4, while 5.16.18 worked fine. Details can be found on
>> https://github.com/QubesO
On Sun, Apr 24, 2022 at 11:52:05AM -0400, Demi Marie Obenour wrote:
> On Sun, Apr 24, 2022 at 11:02:43AM +0200, Thorsten Leemhuis wrote:
> > CCing the amdgpu maintainers
>
> Also CCing Marek Marczykowski-Górecki as Qubes OS Project Lead.
For real this time (whoops!).
--
Sincerely,
Demi Marie Ob
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