Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Wednesday, May 25, 2022 10:09 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: convert
sienna_cichlid_get_default_config_table_settings()
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Wednesday, May 25, 2022 10:09 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: simplify amdgpu_device_asic_has_dc_support()
Drop extra
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Wednesday, May 25, 2022 11:26 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: add beige goby PCI ID
Add a beige goby PCI ID.
> -Original Message-
> From: Stanley.Yang
> Sent: Tuesday, May 24, 2022 10:31 PM
> To: amd-gfx@lists.freedesktop.org; Zhang, Hawking
> ; Zhou1, Tao ; Quan, Evan
> ; Lazar, Lijo
> Cc: Yang, Stanley
> Subject: [PATCH Review v2 2/2] drm/amdgpu: print umc correctable error
> address
>
>
Add a beige goby PCI ID.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 0bc6b2369e65..02731e28f18d 100644
---
[AMD Official Use Only - General]
[AMD Official Use Only - General]
发件人: Lazar, Lijo
日期: 星期三, 2022年5月25日 上午12:03
收件人: Yang, Stanley , amd-gfx@lists.freedesktop.org
, Zhang, Hawking , Zhou1,
Tao , Quan, Evan
主题: Re: [PATCH Review v2 2/2] drm/amdgpu: print umc correctable error address
On
Drop extra cases in the default case.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 26 --
1 file changed, 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index
Use IP version rather than asic type.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
This is the same as the default case, so drop the extra
logic.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 20
1 file changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
Check IP version rather than asic type.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index 6cd1fb2eb913..34c610b9157d
Drop all of the extra cases in the default case.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 --
1 file changed, 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index
LVDS support was implemented in DC a while ago. Just DAC
support is left to do.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Rather than asic type.
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c| 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
This is already static, in our local branch, from this commit:
commit 6852e61a0917a2
Author: Evan Quan
Date: Thu May 19 17:28:12 2022 +0800
drm/amdgpu: suppress some compile warnings
Suppress two compile warnings about "no previous prototype".
Reported-by: kernel test
new ioctl cmd added to query zone device type. This will be
used once the test_hmm adds zone device coherent type.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair Poppple
Signed-off-by: Christoph Hellwig
---
lib/test_hmm.c | 23 +--
The objective is to test device migration mechanism in pages marked
as COW, for private and coherent device type. In case of writing to
COW private page(s), a page fault will migrate pages back to system
memory first. Then, these pages will be duplicated. In case of COW
device coherent type, pages
From: Alistair Popple
Currently any attempts to pin a device coherent page will fail. This is
because device coherent pages need to be managed by a device driver, and
pinning them would prevent a driver from migrating them off the device.
However this is no reason to fail pinning of these
The intention is to test hmm device coherent type under different get
user pages paths. Also, test gup with FOLL_LONGTERM flag set in
device coherent pages. These pages should get migrated back to system
memory.
Signed-off-by: Alex Sierra
Reviewed-by: Alistair Popple
---
In order to configure device coherent in test_hmm, two module parameters
should be passed, which correspond to the SP start address of each
device (2) spm_addr_dev0 & spm_addr_dev1. If no parameters are passed,
private device type is configured.
Signed-off-by: Alex Sierra
Acked-by: Felix
Device Coherent type uses device memory that is coherently accesible by
the CPU. This could be shown as SP (special purpose) memory range
at the BIOS-e820 memory enumeration. If no SP memory is supported in
system, this could be faked by setting CONFIG_EFI_FAKE_MEMMAP.
Currently, test_hmm only
This case is used to migrate pages from device memory, back to system
memory. Device coherent type memory is cache coherent from device and CPU
point of view.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair Poppple
Signed-off-by: Christoph Hellwig
---
Add two more parameters to set spm_addr_dev0 & spm_addr_dev1
addresses. These two parameters configure the start SP
addresses for each device in test_hmm driver.
Consequently, this configures zone device type as coherent.
Signed-off-by: Alex Sierra
Acked-by: Felix Kuehling
Reviewed-by: Alistair
Test cases such as migrate_fault and migrate_multiple, were modified to
explicit migrate from device to sys memory without the need of page
faults, when using device coherent type.
Snapshot test case updated to read memory device type first and based
on that, get the proper returned results
When CPU is connected throug XGMI, it has coherent
access to VRAM resource. In this case that resource
is taken from a table in the device gmc aperture base.
This resource is used along with the device type, which could
be DEVICE_PRIVATE or DEVICE_COHERENT to create the device
page map region.
With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
device-managed anonymous pages that are not LRU pages. Although they
behave like normal pages for purposes of mapping in CPU page, and for
COW. They do not support LRU lists, NUMA migration or THP.
We also introduced a FOLL_LRU flag
From: Alistair Popple
migrate_vma_setup() checks that a valid vma is passed so that the page
tables can be walked to find the pfns associated with a given address
range. However in some cases the pfns are already known, such as when
migrating device coherent pages during pin_user_pages() meaning
Device memory that is cache coherent from device and CPU point of view.
This is used on platforms that have an advanced system bus (like CAPI
or CXL). Any page of a process can be migrated to such memory. However,
no one should be allowed to pin such memory so that it can always be
evicted.
This is our MEMORY_DEVICE_COHERENT patch series rebased and updated
for current 5.18.0
Changes since the last version:
- Fixed problems with migration during long-term pinning in
get_user_pages
- Open coded vm_normal_lru_pages as suggested in previous code review
- Update hmm_gup_test with more
On 5/23/2022 7:02 AM, Alistair Popple wrote:
Technically I think this patch should be earlier in the series. As I
understand it patch 1 allows DEVICE_COHERENT pages to be inserted in the
page tables and therefore makes it possible for page table walkers to
see non-LRU pages.
Patch will
The supported EOTFs are defined in eotf_supported in drm_edid
but userspace has no way of knowing what is and isn't supported
when creating an HDR_OUTPUT_METADATA and will only know
something is wrong when the atomic commit fails.
Since it is expected that userspace reads the EDID to understand
From: Martin Leung
why:
lut pipeline will be hooked up differently in some asics
need to add new interfaces
how:
add them
Reviewed-by: Krunoslav Kovac
Acked-by: Jasdeep Dhillon
Signed-off-by: Martin Leung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +
From: Aric Cyr
This version brings along following fixes:
* Changes to DP LT fallback behavior to more closely match the DP standard
* Added new interfaces for lut pipeline
* Restore ref_dtblck value when clk struct is cleared in init_clocks
* Fixes DMUB outbox trace in S4
* Fixes lingering DIO
From: Ilya
[Why]
It's possible for some fallback scenarios to result in infinite looping
during link training.
[How]
This change modifies DP LT fallback behavior to more closely match the
DP standard. Keep track of the link rate during the EQ_FAIL fallback,
and use it as the maximum link rate
From: Alvin
[Description]
ref_dtbclk value is assigned in clk_mgr_construct,
but the clks struct is cleared in init_clocks.
Make sure to restore the value or we will get
0 value for ref_dtbclk in DCN31.
Reviewed-by: Chris Park
Acked-by: Jasdeep Dhillon
Signed-off-by: Alvin Lee
---
From: Cruise Hung
[Why]
DMUB Outbox0 read/write pointer not sync after resumed from S4.
And that caused old traces were sent to outbox.
[How]
Disable DMUB Outbox0 interrupt
and clear DMUB Outbox0 read/write pointer when resumes from S4.
And then enable Outbox0 interrupt before starts DMCUB.
From: Nicholas Kazlauskas
[Why]
When enabling an HPO stream for the first time after having previously
enabled a DIO stream there may be lingering DIO FIFO errors even though
the DIO is no longer enabled.
These can cause display clock change to hang if we don't apply the
OTG disable workaround
From: hengzhou
[WHY]
Very low rate to cause memory access issue while resetting
DMCUB after the halt command was sent to it.
The process of stopping fw of DMCUB may be timeout, that means
it is not in idle state, such as the window frames may still be
kept in cache, so reset by force will cause
From: Martin Leung
why and how:
This reverts commit 8e848b1b4ee585cbe25808b4458a74e739586034.
Was causing a black screen with certain blocks
Reviewed-by: George Shen
Acked-by: Jasdeep Dhillon
Signed-off-by: Martin Leung
---
.../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 8 +++-
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Changes to DP LT fallback behavior to more closely match the DP standard
* Added new interfaces for lut pipeline
* Restore ref_dtblck value when clk struct is cleared in init_clocks
* Fixes DMUB outbox trace in
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
*Changes to DP LT fallback behavior to more closely match the DP standard
*Added new interfaces for lut pipeline
*Restore ref_dtblck value when clk struct is cleared in init_clocks
*Fixes DMUB outbox trace in S4
(snip)
#ifdef CONFIG_DEV_COREDUMP
tmp_adev->reset_context_vram_lost =
vram_lost;
tmp_adev->reset_context_task_info.pid = 0;
if (reset_context->job &&
reset_context->job->vm)
tmp_adev->reset_context_task_info =
On 5/24/2022 8:00 PM, Stanley.Yang wrote:
Changed from V1:
remove unnecessary same row physical address calculation
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 ++
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 52 ++-
On 5/24/2022 8:34 PM, Sharma, Shashank wrote:
On 5/24/2022 3:18 PM, Somalapuram, Amaranath wrote:
On 5/24/2022 6:20 PM, Sharma, Shashank wrote:
On 5/24/2022 2:10 PM, Somalapuram, Amaranath wrote:
On 5/24/2022 3:23 PM, Sharma, Shashank wrote:
On 5/24/2022 8:42 AM, Somalapuram,
On 5/24/2022 3:18 PM, Somalapuram, Amaranath wrote:
On 5/24/2022 6:20 PM, Sharma, Shashank wrote:
On 5/24/2022 2:10 PM, Somalapuram, Amaranath wrote:
On 5/24/2022 3:23 PM, Sharma, Shashank wrote:
On 5/24/2022 8:42 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:52 PM, Sharma,
Changed from V1:
remove unnecessary same row physical address calculation
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 ++
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 52 ++-
.../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c| 1 +
SMU add a new variable mca_ceumc_addr to record
umc correctable error address in EccInfo table,
driver side add EccInfo_V2_t to support this feature
Changed from V1:
remove ecc_table_v2 and unnecessary table id, define union struct
include
EccInfo_t and EccInfo_V2_t.
On 5/24/2022 6:49 PM, Alex Deucher wrote:
On Tue, May 24, 2022 at 8:36 AM Lijo Lazar wrote:
When powerplay is not enabled, return AUTO as default level.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
On Tue, May 24, 2022 at 8:36 AM Lijo Lazar wrote:
>
> When powerplay is not enabled, return AUTO as default level.
>
> Signed-off-by: Lijo Lazar
> ---
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
>
On 5/24/2022 6:20 PM, Sharma, Shashank wrote:
On 5/24/2022 2:10 PM, Somalapuram, Amaranath wrote:
On 5/24/2022 3:23 PM, Sharma, Shashank wrote:
On 5/24/2022 8:42 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:52 PM, Sharma, Shashank wrote:
On 5/20/2022 3:49 PM, Somalapuram
Hey all, I'm adding a bunch of people to the cover letter, sorry for the
noise.
I've been putting a lot of effort lately into cleaning up our EDID
parsing. It's been long overdue. Here, we finally leverage all that prep
work to implement the HDMI Forum HF-EEODB extension. In short, HF-EEODB
lets
This symbol is not used outside of amdgpu_discovery.c, so marks it static.
Fixes the following w1 warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1364:5: warning: no
previous prototype for ‘amdgpu_discovery_get_mall_info’
[-Wmissing-prototypes].
Reported-by: Abaci Robot
Signed-off-by:
On 5/24/2022 2:10 PM, Somalapuram, Amaranath wrote:
On 5/24/2022 3:23 PM, Sharma, Shashank wrote:
On 5/24/2022 8:42 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:52 PM, Sharma, Shashank wrote:
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Added device coredump information:
-
When powerplay is not enabled, return AUTO as default level.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index 5472f9936feb..d1bf073adf54
On 5/24/2022 3:23 PM, Sharma, Shashank wrote:
On 5/24/2022 8:42 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:52 PM, Sharma, Shashank wrote:
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Added device coredump information:
- Kernel version
- Module
- Time
- VRAM status
- Guilty
On 5/24/2022 3:25 PM, Sharma, Shashank wrote:
On 5/24/2022 8:12 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:36 PM, Sharma, Shashank wrote:
Hey Amar,
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Allocate memory for register value and use the same values for
devcoredump.
On 5/24/2022 8:12 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:36 PM, Sharma, Shashank wrote:
Hey Amar,
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Allocate memory for register value and use the same values for
devcoredump.
Remove dump_stack reset register dumps.
On 5/24/2022 8:42 AM, Somalapuram, Amaranath wrote:
On 5/20/2022 7:52 PM, Sharma, Shashank wrote:
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Added device coredump information:
- Kernel version
- Module
- Time
- VRAM status
- Guilty process name and PID
- GPU register dumps
To fit the latest 78.39.0 PMFW.
Signed-off-by: Evan Quan
Reviewed-by: Hawking Zhang
Change-Id: Ie8280606729fa8b80a0abf1bc94f16c4b06191d4
--
v1->v2:
- coding style fixes(Hawking)
---
.../drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 6 ++
The feature is ready with latest 78.39.0 PMFW.
Signed-off-by: Evan Quan
Reviewed-by: Hawking Zhang
Change-Id: I99096e23ed7ebcd5aaada84b7f11ad9e3d3cd8b8
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
There is some problem with average frequency reading. Thus, we
switch to the target frequency reading instead.
Signed-off-by: Evan Quan
Reviewed-by: Hawking Zhang
Change-Id: I50fd370bbca68159cb1a4f69b05232f907af2bb9
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 +-
1 file
Hi,
On 5/24/22 01:25, Daniel Dadap wrote:
> On 5/20/22 16:41, Daniel Dadap wrote:
>>
>> On 5/17/22 10:23, Hans de Goede wrote:
>>> On x86/ACPI boards the acpi_video driver will usually initializing before
>>> the kms driver (except i915). This causes /sys/class/backlight/acpi_video0
>>> to show
On 5/20/2022 7:52 PM, Sharma, Shashank wrote:
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Added device coredump information:
- Kernel version
- Module
- Time
- VRAM status
- Guilty process name and PID
- GPU register dumps
Signed-off-by: Somalapuram Amaranath
---
On 5/20/2022 7:36 PM, Sharma, Shashank wrote:
Hey Amar,
On 5/20/2022 3:49 PM, Somalapuram Amaranath wrote:
Allocate memory for register value and use the same values for
devcoredump.
Remove dump_stack reset register dumps.
Signed-off-by: Somalapuram Amaranath
---
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