[AMD Official Use Only - General]
Reviewed-by: Leo Liu
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: May 26, 2022 4:39 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: update VCN codec support for Yellow Carp
Supports AV1.
Supports AV1. Mesa already has support for this and
doesn't rely on the kernel caps for yellow carp, so
this was already working from an application perspective.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2002
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1
Hi Dave, Daniel,
This is an additional pull on top of the one I send a few minutes ago.
It adds a minor UAPI change and updates the fdinfo format to match
the generic drm fdinfo format. They are pretty small, but if you'd prefer,
I can wait until next cycle.
The following changes since commit
Hi Dave, Daniel,
Fixes for 5.19. The size is largely due to updates to new IPs which
were added in this cycle.
The following changes since commit c4955d9cd2fc56c43e78c908dad4e2cac7cc9073:
Merge tag 'drm-intel-next-fixes-2022-05-24' of
git://anongit.freedesktop.org/drm/drm-intel into drm-next
From: Xiaojian Du
This patch will add CSDMA reg offsets for NBIO v7.7.0
Signed-off-by: Xiaojian Du
Acked-by: Roman Li
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
.../drm/amd/include/asic_reg/nbio/nbio_7_7_0_offset.h | 4
From: Xiaojian Du
This patch will fix sdma doorbell issue on SDMA v6.0 and NBIO v7.7.0.
NBIO v7.7.0 uses a new reg function -- Common SDMA to allow a common
doorbell range for all SDMA queues, this is different to the old
NBIO version. This patch will add configuration for CSDMA and enable
SDMA
From: Huang Rui
GC v11_0_1 asic needs to issue the EnableGfxImu message after start IMU.
Signed-off-by: Huang Rui
Reviewed-by: Tim Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c| 14 ++
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
From: Huang Rui
APU required to issue the enable GFX IMU message after IMU reset.
Signed-off-by: Huang Rui
Reviewed-by: Tim Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 +-
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c | 7 ---
2 files changed, 9
Use the per asic offsets so the we don't have to have
asic specific logic in the common code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 77 +++---
1 file changed, 7 insertions(+), 70 deletions(-)
diff --git
So we can eventaully use them in the common smu code for
accessing the SMU mailboxes without needing a lot of
per asic logic in the common code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 4
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h | 2 ++
From: Huang Rui
Update MP v13_0_4 register macro for SMU message
v2: squash in missed case (Alex)
Signed-off-by: Huang Rui
Reviewed-by: Tim Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 20
1 file changed, 20 insertions(+)
diff --git
From: Huang Rui
This adds mmhub v3_0_1 ip block support
v2: rebase (Alex)
Signed-off-by: Huang Rui
Reviewed-by: Tim Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 3 +-
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 +
Enable the AGP aperture on chips with GMC v11.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c | 7 ---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 1 +
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c | 6 +++---
4
From: Roman Li
[Why]
Wrong fb offset results in dmub f/w errors and white screen.
[drm:dc_dmub_srv_wait_idle [amdgpu]] *ERROR* Error waiting for DMUB idle:
status=3
[How]
Read aper_base from mmhub because GC is off by default
v2: use BAR for passthrough (Alex)
Signed-off-by: Roman Li
Set the default reset method to mode2 for SMU IP v13.0.4
Signed-off-by: Tim Huang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index
On Thu, May 19, 2022 at 11:05 PM Huang Rui wrote:
>
> Switch to use the callback function to poll the reset status on IMU.
> Because it will have different sequency on other ASICs.
>
> Signed-off-by: Huang Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h | 1 +
>
On 5/24/2022 11:11 PM, Alistair Popple wrote:
Alex Sierra writes:
With DEVICE_COHERENT, we'll soon have vm_normal_pages() return
device-managed anonymous pages that are not LRU pages. Although they
behave like normal pages for purposes of mapping in CPU page, and for
COW. They do not
On Thu, May 26, 2022 at 03:28:25PM +0100, Matthew Wilcox wrote:
> On Thu, May 26, 2022 at 11:48:32AM +0300, Dan Carpenter wrote:
> > On Thu, May 26, 2022 at 02:16:34AM +0100, Matthew Wilcox wrote:
> > > Bizarre this started showing up now. The recent patch was:
> > >
> > > - info->alloced
Series is: Acked-by: Alex Deucher
On Thu, May 19, 2022 at 11:05 PM Huang Rui wrote:
>
> Switch to use the callback function to poll the reset status on IMU.
> Because it will have different sequency on other ASICs.
>
> Signed-off-by: Huang Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_imu.h |
On Thu, May 26, 2022 at 11:48:32AM +0300, Dan Carpenter wrote:
> On Thu, May 26, 2022 at 02:16:34AM +0100, Matthew Wilcox wrote:
> > Bizarre this started showing up now. The recent patch was:
> >
> > - info->alloced += compound_nr(page);
> > - inode->i_blocks += BLOCKS_PER_PAGE <<
Applied. Thanks!
Alex
On Thu, May 26, 2022 at 5:29 AM <1064094...@qq.com> wrote:
>
> From: pengfuyuan
>
> Fix spelling typo in comments.
>
> Reported-by: k2ci
> Signed-off-by: pengfuyuan
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
>
From: pengfuyuan
Fix spelling typo in comments.
Reported-by: k2ci
Signed-off-by: pengfuyuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/mes_api_def.h | 2 +-
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
On Wed, May 25, 2022 at 11:35 PM kernel test robot wrote:
> .__mulsi3.o.cmd: No such file or directory
> Makefile:686: arch/h8300/Makefile: No such file or directory
> Makefile:765: arch/h8300/Makefile: No such file or directory
> arch/Kconfig:10: can't open file "arch/h8300/Kconfig"
Please stop
[AMD Official Use Only - General]
From: amd-gfx on behalf of Somalapuram
Amaranath
Sent: Thursday, May 26, 2022 5:48 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Somalapuram, Amaranath
; Koenig, Christian ;
Sharma, Shashank
Subject:
On 5/26/2022 11:48 AM, Somalapuram Amaranath wrote:
Added device coredump information:
- Kernel version
- Module
- Time
- VRAM status
- Guilty process name and PID
- GPU register dumps
v1 -> v2: Variable name change
v1 -> v2: NULL check
v1 -> v2: Code alignment
v1 -> v2: Adding dummy
Hey Amar,
On 5/26/2022 11:48 AM, Somalapuram Amaranath wrote:
Allocate memory for register value and use the same values for devcoredump.
v1 -> V2: Change krealloc_array() to kmalloc_array()
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
Added device coredump information:
- Kernel version
- Module
- Time
- VRAM status
- Guilty process name and PID
- GPU register dumps
v1 -> v2: Variable name change
v1 -> v2: NULL check
v1 -> v2: Code alignment
v1 -> v2: Adding dummy amdgpu_devcoredump_free
v1 -> v2: memset reset_task_info to zero
Allocate memory for register value and use the same values for devcoredump.
v1 -> V2: Change krealloc_array() to kmalloc_array()
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 7 +++
On Thu, May 26, 2022 at 02:16:34AM +0100, Matthew Wilcox wrote:
> Bizarre this started showing up now. The recent patch was:
>
> - info->alloced += compound_nr(page);
> - inode->i_blocks += BLOCKS_PER_PAGE << compound_order(page);
> + info->alloced += folio_nr_pages(folio);
> +
On Wed, May 25, 2022 at 02:50:56PM -0700, Andrew Morton wrote:
> On Thu, 26 May 2022 05:35:20 +0800 kernel test robot wrote:
>
> > tree/branch:
> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
> > branch HEAD: 8cb8311e95e3bb58bd84d6350365f14a718faa6d Add
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