[Public]
Reviewed-by: Tim Huang
Best Regards,
Tim Huang
-Original Message-
From: Zhang, Yifan
Sent: Wednesday, October 26, 2022 11:14 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Huang, Tim
; Du, Xiaojian ; Liu, Aaron
; Zhang, Yifan
Subject: [PATCH] drm/amdgpu: fo
For some GPUs with more CUs, the original sibling_map[32]
in struct crat_subtype_cache is not enough
to save the cache information when create the VCRAT table,
so skip filling the struct crat_subtype_cache info instead
fill struct kfd_cache_properties directly to fix this problem.
v3:
- Drop p
The kfd_topology_device->cache_count is not used by
other fucntions, so remove it.
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 -
drivers/gpu/drm/amd/amdkfd/kfd_topology.h | 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
b/dr
Change ttm_resource structure from num_pages to size_t size in bytes.
v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
v1 -> v2: change bo->resource->size to bo->base.size at some places
v1 -> v2: remove the local variable
v1 -> v2: cleanup cmp_size_smaller_first()
v2 -> v3: adding missing
Am 27.10.22 um 11:12 schrieb Somalapuram Amaranath:
Change ttm_resource structure from num_pages to size_t size in bytes.
v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
v1 -> v2: change bo->resource->size to bo->base.size at some places
v1 -> v2: remove the local variable
v1 -> v2: clea
On 10/27/22 01:30, Christian König wrote:
Am 26.10.22 um 21:03 schrieb Mario Limonciello:
If a system does not have swap and memory is under 100% usage,
amdgpu will fail to evict resources. Currently the suspend
carries on proceeding to reset the GPU:
```
[drm] evicting device resources failed
On Thu, Oct 27, 2022 at 12:37 PM Hans de Goede wrote:
>
> Hi,
>
> On 10/27/22 11:52, Matthew Garrett wrote:
> > On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
> >
> >> The *only* behavior which actually is new in 6.1 is the native GPU
> >> drivers now doing the equivalent of:
> >>
v1: Support gfx ras feature enablement for gfx v11_0_3.
v2: Update function name and error message.
Signed-off-by: Candice Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/amd
On Thu, Oct 27, 2022 at 2:17 PM Hans de Goede wrote:
>
> Hi,
>
> On 10/27/22 14:09, Rafael J. Wysocki wrote:
> > On Thu, Oct 27, 2022 at 12:37 PM Hans de Goede wrote:
> >>
> >> Hi,
> >>
> >> On 10/27/22 11:52, Matthew Garrett wrote:
> >>> On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wr
On Thu, Oct 27, 2022 at 1:42 AM Chen, Guchun wrote:
>
> Hello Alex,
>
> Regarding below patch, I guess we need to pick "8eb402f16d5b drm/amdgpu: Fix
> uninitialized warning in mmhub_v2_0_get_clockgating()" together, otherwise,
> build will possibly fail. Is it true?
>
I squashed that fix into t
Hi,
On 10/27/22 11:52, Matthew Garrett wrote:
> On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
>
>> The *only* behavior which actually is new in 6.1 is the native GPU
>> drivers now doing the equivalent of:
>>
>> if (acpi_video_get_backlight_type() != acpi_backlight_native)
>
Remove include directives in which header is already included via
another header (atombios.h -> atom.h). Remove unused constants and
macros.
Signed-off-by: Paulo Miguel Almeida
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 1 -
2
Hi,
On 10/27/22 14:09, Rafael J. Wysocki wrote:
> On Thu, Oct 27, 2022 at 12:37 PM Hans de Goede wrote:
>>
>> Hi,
>>
>> On 10/27/22 11:52, Matthew Garrett wrote:
>>> On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
>>>
The *only* behavior which actually is new in 6.1 is the nat
On Thu, Oct 27, 2022 at 11:39:38AM +0200, Hans de Goede wrote:
> The *only* behavior which actually is new in 6.1 is the native GPU
> drivers now doing the equivalent of:
>
> if (acpi_video_get_backlight_type() != acpi_backlight_native)
> return;
>
> In their backlight regist
Hi,
On 10/26/22 22:49, Matthew Garrett wrote:
> On Wed, Oct 26, 2022 at 11:59:28AM +0200, Hans de Goede wrote:
>
>> Ok, so this is a local customization to what is already a custom BIOS
>> for a custom motherboard. There is a lot of custom in that sentence and
>> TBH at some point things might be
On Thu, Oct 27, 2022, at 02:25, Ao Zhong wrote:
> After moving all FPU code to the DML folder, we can enable DCN support
> for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
> code in the DML folder that needs to use hardware FPU, and add a control
> mechanism for ARM Neon.
>
> S
Hi Matthew,
On 10/27/22 11:11, Matthew Garrett wrote:
> On Thu, Oct 27, 2022 at 10:51:45AM +0200, Hans de Goede wrote:
>
>> In their backlight register paths and this has been present since
>> circa 2015.
>>
>> So both before and after my 6.1 refactor vendor is only preferred
>> on devices which
On Thu, Oct 27, 2022 at 10:51:45AM +0200, Hans de Goede wrote:
> In their backlight register paths and this has been present since
> circa 2015.
>
> So both before and after my 6.1 refactor vendor is only preferred
> on devices which don't implement the ACPI video bus control method.
Sorry, yes,
Am 27.10.22 um 12:52 schrieb Arnd Bergmann:
On Thu, Oct 27, 2022, at 02:25, Ao Zhong wrote:
After moving all FPU code to the DML folder, we can enable DCN support
for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
code in the DML folder that needs to use hardware FPU, and add
On Thu, Oct 27, 2022 at 2:31 AM Christian König
wrote:
>
> Am 26.10.22 um 21:03 schrieb Mario Limonciello:
> > If a system does not have swap and memory is under 100% usage,
> > amdgpu will fail to evict resources. Currently the suspend
> > carries on proceeding to reset the GPU:
> >
> > ```
> >
Patch is:
Reviewed-by: Alex Deucher
On Thu, Oct 27, 2022 at 9:39 AM Alex Deucher wrote:
>
> On Thu, Oct 27, 2022 at 2:31 AM Christian König
> wrote:
> >
> > Am 26.10.22 um 21:03 schrieb Mario Limonciello:
> > > If a system does not have swap and memory is under 100% usage,
> > > amdgpu will fai
Am Do., 27. Okt. 2022 um 12:52 Uhr schrieb Arnd Bergmann :
>
> On Thu, Oct 27, 2022, at 02:25, Ao Zhong wrote:
> > After moving all FPU code to the DML folder, we can enable DCN support
> > for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
> > code in the DML folder that needs t
[Public]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Graham Sider
Sent: Wednesday, October 26, 2022 4:10 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kasiviswanathan, Harish ; Sider, Graham
Subject: [PATCH] drm/amdgpu: disable GFXOFF during compute for GFX
On Thu, Oct 27, 2022, at 15:38, Ao Zhong wrote:
> Am Do., 27. Okt. 2022 um 12:52 Uhr schrieb Arnd Bergmann :
>
>> Why do you need separate $(dml_rcflags) and $(dml_rcflags_arm64)
>> rather than adding -mgeneral-regs-only to $(dml_rcflags) directly?
>
> I don't know if $(dml_rcflags) has any other u
OK, I'll replace $(dml_rcflags_arm64) with $(dml_rcflags).
Am Do., 27. Okt. 2022 um 15:45 Uhr schrieb Arnd Bergmann :
>
> On Thu, Oct 27, 2022, at 15:38, Ao Zhong wrote:
> > Am Do., 27. Okt. 2022 um 12:52 Uhr schrieb Arnd Bergmann :
> >
> >> Why do you need separate $(dml_rcflags) and $(dml_rcflag
Hi Ao/Arnd/Stephen/Nathan,
Ao,
Thanks a lot for this new patch.
Since you have an ARM64 + AMD GPU, could you also run a couple of tests
in your setup? If so, this is a good set of tests imho:
1. Check plug and unplug displays (let says 5x)
2. Change resolutions
3. (most wanted test) Could yo
Am 26.10.22 um 21:03 schrieb Mario Limonciello:
If a system does not have swap and memory is under 100% usage,
amdgpu will fail to evict resources. Currently the suspend
carries on proceeding to reset the GPU:
```
[drm] evicting device resources failed
[drm:amdgpu_device_ip_suspend_phase2 [amdg
Hello everyone,
Recently I got a SBSA ARM64 workstation, and try to use it as my daily
drive machine after installing an AMD RX6400 graphics card.
Since the newer AMD GPUs require DCN (Display Core Next) support to work
properly, DCN is not supported on ARM64 platforms. Because some code in
DCN n
After moving all FPU code to the DML folder, we can enable DCN support
for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
code in the DML folder that needs to use hardware FPU, and add a control
mechanism for ARM Neon.
Signed-off-by: Ao Zhong
---
drivers/gpu/drm/amd/display/Kc
Am 2022-10-25 um 23:13 schrieb Yifan Zhang:
If discovery is set to 2 in module parameters explicitly, the
intention is to use the discovery file in FW rather than the one in
BIOS, usually because the latter is incorrect. This patch to force
read discovery file if set discovery=2.
Signed-off-by:
Hi Rodrigo,
On Thu, Oct 27, 2022 at 10:29:33AM -0400, Rodrigo Siqueira wrote:
> Nathan/Stephen,
>
> Maybe I'm wrong, but I think you have access to some sort of CI that tests
> multiple builds with different compiles and configs, right? Is it possible
> to check this patch + amd-staging-drm-next
On 10/27/22 11:22, Nathan Chancellor wrote:
Hi Rodrigo,
On Thu, Oct 27, 2022 at 10:29:33AM -0400, Rodrigo Siqueira wrote:
Nathan/Stephen,
Maybe I'm wrong, but I think you have access to some sort of CI that tests
multiple builds with different compiles and configs, right? Is it possible
to
On 10/24/22 06:04, Christian König wrote:
Am 21.10.22 um 18:34 schrieb Hamza Mahfooz:
Unfortunately, printk() doesn't currently support the printing of %f
entries. So, print statements that contain "%f" should be removed.
However, since DC is used on other OSes that can still benefit from the
On 10/21/22 05:18, Jani Nikula wrote:
> On Thu, 20 Oct 2022, Ville Syrjälä wrote:
>> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote:
>>> On Sun, Sep 11, 2022 at 11:28:43PM -0600, Jim Cromie wrote:
hi Greg, Dan, Jason, DRM-folk,
heres follow-up to V6:
rebased on dr
On Thu, Oct 27, 2022, at 16:45, Ao Zhong wrote:
> After moving all FPU code to the DML folder, we can enable DCN support
> for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
> code in the DML folder that needs to use hardware FPU, and add a control
> mechanism for ARM Neon.
>
> S
Hi Ao,
Could you share a link that describe your workstation?
Thanks
On 10/26/22 17:17, Ao Zhong wrote:
Hi Rodrigo,
Thanks for your review! This is my first time submitting a patch to the kernel.
I'm not very good at using these tools yet. 😂
Recently I got a Huawei Qingyun W510 (擎云 W510) AR
On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
>
>
>
> On 10/21/22 05:18, Jani Nikula wrote:
> > On Thu, 20 Oct 2022, Ville Syrjälä wrote:
> >> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote:
> >>> On Sun, Sep 11, 2022 at 11:28:43PM -0600, Jim Cromie wrote:
> hi Greg, Dan, Jason
On Thu, Oct 27, 2022 at 09:37:52AM -0600, jim.cro...@gmail.com wrote:
> On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
> >
> >
> >
> > On 10/21/22 05:18, Jani Nikula wrote:
> > > On Thu, 20 Oct 2022, Ville Syrjälä wrote:
> > >> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote:
> > >>>
[AMD Official Use Only - General]
Acked-by: Harish Kasiviswanathan
-Original Message-
From: Sider, Graham
Sent: Wednesday, October 26, 2022 5:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Kasiviswanathan, Harish
; Cornwall, Jay ; Sider,
Graham
Subject: [PATCH] drm/am
[Public]
Reviewed-by: Harish Kasiviswanathan
From: Deucher, Alexander
Sent: Thursday, October 27, 2022 9:56 AM
To: Sider, Graham ; amd-gfx@lists.freedesktop.org
Cc: Kasiviswanathan, Harish
Subject: Re: [PATCH] drm/amdgpu: disable GFXOFF during compute for GFX11
[Public]
Acked-by: Alex Deuc
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: ecc4eeb2208ab537a3f3744984cd7f30ac971db8 Add linux-next specific
files for 20221027
Warning reports:
https://lore.kernel.org/linux-mm/202210090954.ptr6m6rj-...@intel.com
https
From: Colin Lee
Newer generations of hardware encode the PDE
and PTE bitfields differently. This patch
refactors this decoding and printing.
gfx11 hardware introduces TFS addressing relative
to PDE0 which this patch also enables.
Signed-off-by: Tom St Denis
---
src/app/server.c| 2 +-
Ping?
On Tue, Oct 11, 2022 at 5:28 PM Alex Deucher wrote:
>
> From: Hawking Zhang
>
> To allow invoking ip specific callbacks
>
> Signed-off-by: Hawking Zhang
> Reviewed-by: Le Ma
> Signed-off-by: Alex Deucher
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 4 +--
> drivers/gpu/drm/
On Thu, Oct 27, 2022 at 2:19 AM Luben Tuikov wrote:
>
> Update GPU Scheduler maintainer email.
>
> Cc: Alex Deucher
> Cc: Christian König
> Cc: Daniel Vetter
> Cc: Dave Airlie
> Cc: AMD Graphics
> Cc: Direct Rendering Infrastructure - Development
>
> Signed-off-by: Luben Tuikov
> Acked-by:
Applied the series. Thanks!
Alex
On Wed, Oct 26, 2022 at 3:02 AM Jiapeng Chong
wrote:
>
> No functional modification involved.
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dmub_srv.c:615: warning:
> expecting prototype for setup_subvp_dmub_command(). Prototype was for
> populate_subvp_cmd_
On Tue, Oct 25, 2022 at 3:25 AM Thomas Zimmermann wrote:
>
> Hi
>
> Am 24.10.22 um 18:48 schrieb Alex Deucher:
> > On Mon, Oct 24, 2022 at 3:33 AM Thomas Zimmermann
> > wrote:
> >>
> >> Hi
> >>
> >> Am 24.10.22 um 08:20 schrieb Quan, Evan:
> >>> [AMD Official Use Only - General]
> >>>
> >>> Revi
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Investigate tool reported FCLK P-state deviations
* Fix null pointer issues found in emulation
* Add DSC delay factor workaround
* Round up DST_after_scaler to nearest int
* Use forced DSC bpp
From: Dillon Varone
[WHY]
DPG must be returned to initialized state when pipe is disabled.
[HOW]
Reinit DPG on unused pipes when exiting dynamic ODM.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: Dillon Varone
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 23 ++
From: Eric Bernstein
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
b/drivers/gpu/drm/amd
From: Alvin Lee
[Description]
Driver doesn't support ODM + MPO
Reviewed-by: Dillon Varone
Acked-by: Alex Hung
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwse
From: Charlene Liu
[why]
This is to update SW DML implementation.
Reviewed-by: Dmytro Laktyushkin
Reviewed-by: Ariel Bernstein
Acked-by: Alex Hung
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c | 3 ++-
.../gpu/drm/amd/display/dc/dml/dcn314/di
From: Dillon Varone
[WHY?]
Validation can fail for configurations that were previously supported, by only
changing parameters such as the DET allocations, which is currently unexpected.
[HOW?]
Add a check that validation passes after applying pipe split related changes.
Reviewed-by: Alvin Lee
From: Taimur Hassan
[Why]
This check is not needed, and can cause CRC mismatch.
[How]
Remove check and early exit from divider update.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Taimur Hassan
---
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_dccg.c | 2 +-
1 file cha
From: Iswara Nagulendran
[HOW&WHY]
Checking if both DSC and FEC supported from sink and
source before going with TPS3 pattern during link
training.
Reviewed-by: Anthony Koo
Acked-by: Alex Hung
Signed-off-by: Iswara Nagulendran
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 6 +-
1 f
From: Martin Leung
[why and how]
This line was originally removed for a compliance issue, but then
reverted as it caused a fringe underflow case.
However, the addition of this line caused a underflow regression
when subVP is on, and it needs to be removed again. We plan to
fix subvp underflow an
From: Leo Chen
[Why & How] There are cases when we may need to override the hardcoded
TPS4 test pattern. Added parameters and config option to be able to
allow this.
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Leo Chen
---
drivers/gpu/drm/amd/display/dc/dc.h
From: Anthony Koo
- Add flag as a status read back that indicates back to back
flips detected during psr.
Reviewed-by: Aric Cyr
Acked-by: Alex Hung
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/dri
From: Alvin Lee
[Description]
- For SubVP transitioning into MPO, we want to
use a minimal transition to prevent transient
underflow
- Transitioning a phantom pipe directly into a
"real" pipe can result in underflow due to the
HUBP still having it's "phantom" programming
when HUBP is un
From: George Shen
[Why]
DCN32 DSC delay calculation had an unintentional integer division,
resulting in a mismatch against the DML spreadsheet.
[How]
Cast numerator to double before performing the division.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: George Shen
---
.../gpu/dr
From: George Shen
[Why]
DSC config is calculated separately from DML calculations.
DML should use these separately calculated DSC params. The issue is
that the calculated bpp is not properly propagated into DML.
[How]
Correctly used forced_bpp value in DML.
Reviewed-by: Alvin Lee
Acked-by: Ale
From: George Shen
[Why]
The DST_after_scaler value that DML spreadsheet outputs is
generally the driver value round up to the nearest int.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: George Shen
---
.../gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c | 4 ++--
1 file
From: George Shen
[Why]
Certain 4K high refresh rate modes requiring DSC are exhibiting top
of screen underflow corruption. Increasing the DSC delay by a factor
of 6 percent stops the underflow for most use cases.
[How]
Multiply DSC delay requirement in DML by a factor.
Add debug option to make
From: Charlene Liu
[why]
fix null point issues found in emulation
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/displ
From: Nevenko Stupar
[Why]
Fix for some of the tool reported modes for FCLK
P-state deviations and UCLK P-state deviations that
are coming from DSC terms and/or Scaling terms
causing MinActiveFCLKChangeLatencySupported
and MaxActiveDRAMClockChangeLatencySupported
incorrectly calculated in DML for
From: Aric Cyr
DC version 3.2.210 brings along the following:
- Investigate tool reported FCLK P-state deviations
- Fix null pointer issues found in emulation
- Add DSC delay factor workaround
- Round up DST_after_scaler to nearest int
- Use forced DSC bpp in DML
- Fix DCN32 DSC delay calculatio
Am 2022-10-27 um 14:01 schrieb Alex Deucher:
Ping?
The patch already has a R-b from Ma Le. Anyway, the patch is
Acked-by: Felix Kuehling
On Tue, Oct 11, 2022 at 5:28 PM Alex Deucher wrote:
From: Hawking Zhang
To allow invoking ip specific callbacks
Signed-off-by: Hawking Zhang
Review
On Thu, Oct 27, 2022 at 9:59 AM Ville Syrjälä
wrote:
>
> On Thu, Oct 27, 2022 at 09:37:52AM -0600, jim.cro...@gmail.com wrote:
> > On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
> > >
> > >
> > >
> > > On 10/21/22 05:18, Jani Nikula wrote:
> > > > On Thu, 20 Oct 2022, Ville Syrjälä
> > > >
On Thu, Oct 27, 2022 at 01:55:39PM -0600, jim.cro...@gmail.com wrote:
> On Thu, Oct 27, 2022 at 9:59 AM Ville Syrjälä
> wrote:
> >
> > On Thu, Oct 27, 2022 at 09:37:52AM -0600, jim.cro...@gmail.com wrote:
> > > On Thu, Oct 27, 2022 at 9:08 AM Jason Baron wrote:
> > > >
> > > >
> > > >
> > > > On
Newer generations of hardware encode the PDE and PTE
bitfields differently. This patch refactors this decoding
and printing.
gfx11 hardware introduces TFS addressing relative
to PDE0 which this patch also enables.
v2:
* Add PTE software field and PDE mtype field
* Include MC offse
There isn't much information on the internet for Qingyun W510 as this
is not a retail machine. But I'm happy to provide any details about
this machine.
The Qingyun W510 is powered by Huawei's server SoC Kunpeng 920, it's
SBSA compatible.
Information about Kunpeng 920 can be found here.
Link: https
Here are some lshw information:
hacc-arm64-pc
description: Desktop Computer
product: HUAWEIPGU-WBY0 (C233)
vendor: HUAWEI
version: D1060
serial:
width: 64 bits
capabilities: smbios-3.2.0 dmi-3.2.0 smp cp15_barrier setend swp
tagged_addr_disabled
configuration: chas
After moving all FPU code to the DML folder, we can enable DCN support
for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
code in the DML folder that needs to use hardware FPU, and add a control
mechanism for ARM Neon.
Signed-off-by: Ao Zhong
---
drivers/gpu/drm/amd/display/Kc
Here is the output from kms_flip:
IGT-Version: 1.26-NO-GIT (aarch64) (Linux: 6.0.5-gentoo-arm64 aarch64)
Using monotonic timestamps
Starting subtest: nonblocking-read
Subtest nonblocking-read: SUCCESS (0.000s)
Starting subtest: wf_vblank-ts-check
Starting dynamic subtest: A-DP1
3440x1440 50 3440
On Thu, Oct 27, 2022, at 21:52, Ao Zhong wrote:
> After moving all FPU code to the DML folder, we can enable DCN support
> for the ARM64 platform. Remove the -mgeneral-regs-only CFLAG from the
> code in the DML folder that needs to use hardware FPU, and add a control
> mechanism for ARM Neon.
>
> S
Hello everyone,
Recently I got a SBSA ARM64 workstation, and try to use it as my daily
drive machine after installing an AMD RX6400 graphics card.
Since the newer AMD GPUs require DCN (Display Core Next) support to work
properly, DCN is not supported on ARM64 platforms. Because some code in
DCN n
Hi Rodrigo,
I have done these tests.
CPU: Kunpeng 920 3211k x24 TSV110 Core
GPU: AMD RX 6400
Monitor on DP: Mi Curved Gaming Monitor 34" (support FreeSync and 3440x1440 at
144Hz on DP)
Monitor on HDMI: a cheap 1080P HDMI capture card (ID: 534d:2109)
Distro: Gentoo with Linux 6.0.5 kernel
De
Hello.
I have tested it on a Phytium D2000 platform with RX 5500 XT.
Distro: Arch Linux ARM
Kernel: Linux 6.0.5-1-phytium aarch64 (patched,
https://github.com/saeziae/pkgbuild-linux-phytium )
Plug and unplug: OK on all ports.
Resolutions tested: 3840x2160@60Hz, 2560x1440@60Hz, 1920*1080@60
Here are some lshw information
hacc-arm64-pc
description: Desktop Computer
product: HUAWEIPGU-WBY0 (C233)
vendor: HUAWEI
version: D1060
serial:
width: 64 bits
capabilities: smbios-3.2.0 dmi-3.2.0 smp cp15_barrier setend swp
tagged_addr_disabled
configuration: chass
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