[AMD Official Use Only - General]
Hi @Koenig, Christian,
Removed the code format style warning base on the checkpatch.pl script. Please
help me review the new patch below, thanks!
Kind regards,
Esther
-Original Message-
From: Tong Liu01
Sent: 2022年11月8日星期二 上午10:47
To: amd-gfx@lists.f
[AMD Official Use Only - General]
Looks good to me, this patch is Reviewed-by: Likun Gao
mailto:likun@amd.com>>
Regards,
Likun
From: Patel, Krunalkumar Mukeshkumar
Sent: Tuesday, November 8, 2022 11:46 AM
To: Deucher, Alexander ; Pan, Xinhui
; Koenig, Christian ; Gao, Likun
; Zhang, Hawk
[AMD Official Use Only - General]
+Likun, Hawking
Hi,
Can you please help with the review of the patch?
Thanks and regards
Krunal
From: Patel, Krunalkumar Mukeshkumar
Sent: Monday, November 7, 2022 1:35:01 PM
To: Deucher, Alexander ; Pan, Xinhui
; Koenig, Chri
Move TMR region from top of FB to 2MB for FFBM, so we need to reserve TMR
region firstly to make sure TMR can be allocated at 2MB
Signed-off-by: Tong Liu01
---
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 106 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 50 +
d
[AMD Official Use Only - General]
a typo issue in commit message: "msu",
and one comment inline.
Reviewed-by: Yang Wang
Best Regards
Kevin
发件人: amd-gfx 代表 Kenneth Feng
发送时间: 2022年11月8日星期二 上午8:36
收件人: amd-gfx@lists.freedesktop.org
抄送: Feng, Kenneth
主题: [PATCH
enable mode1 reset and prioritize debug port on msu_v13_0_10
as a more reliable message processing
v2 - move mode1 reset callback to smu_v13_0_0_ppt.c
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/soc21.c| 1 +
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 4 ++
...
From: Ville Syrjälä
Initialize on-stack modes with drm_mode_init() to guarantee
no stack garbage in the list head, or that we aren't copying
over another mode's list head.
Based on the following cocci script, with manual fixups:
@decl@
identifier M;
expression E;
@@
- struct drm_display_mode M =
Am 07.11.22 um 04:32 schrieb Tong Liu01:
Move TMR region from top of FB to 2MB for FFBM, so we need to reserve TMR region
firstly to make sure TMR can be allocated at 2MB
At few coding style things below, but looks good to me from the
technically side.
Please use the checkpatch.pl script, it
Abstract RAS I2C EEPROM addresses from chip names, and set their macro
definition names to the address they set, not the chip they attach
to. Since most chips either use I2C EEPROM address 0 or 4h for the RAS
table start offset, this leaves with only two macro definitions as opposed
to five, an
On Mon, 17 Oct 2022 at 19:25, Dmitry Osipenko
wrote:
>
> Move dma_buf_mmap() function to the dynamic locking specification by
> taking the reservation lock. Neither of the today's drivers take the
> reservation lock within the mmap() callback, hence it's safe to enforce
> the locking.
>
> Acked-by
Remove redundant EEPROM_I2C_MADDR_54H address, since we already have it
represented (ARCTURUS), and since we don't include the I2C device type
identifier in EEPROM memory addresses, i.e. that high up in the device
abstraction--we only use EEPROM memory addresses, as memory is continuously
represent
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: d8e87774068af213ab5b058b1b114dc397b577aa Add linux-next specific
files for 20221107
Error/Warning reports:
https://lore.kernel.org/linux-mm/202210090954.ptr6m6rj-...@intel.com
https
Correct descriptions of two last fields of enum pipe_split_policy, updating
comments with proper field names.
Signed-off-by: Carlos Bilbao
---
drivers/gpu/drm/amd/display/dc/dc.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/d
Am 2022-11-07 um 02:08 schrieb Ma Jun:
Fix the memory overrun issue caused by wrong array size.
Signed-off-by: Ma Jun
Reported-by: coverity-bot
Addresses-Coverity-ID: 1527133 ("Memory - corruptions")
Fixes: 624693863 ("drm/amdkfd: Fix the warning of
array-index-out-of-bounds")
Reviewed-
One-element arrays are deprecated, and we are replacing them with
flexible array members instead. So, replace one-element array with
flexible-array member in structs _ATOM_GPIO_PIN_ASSIGNMENT,
_ATOM_DISPLAY_OBJECT_PATH, _ATOM_DISPLAY_OBJECT_PATH_TABLE,
_ATOM_OBJECT_TABLE and refactor the rest of th
[AMD Official Use Only - General]
Hi @Koenig, Christian & @Wang, Yang(Kevin),
Refined patch based on your comments, please help review new patch below,
thanks!
Kind regards,
Esther
-Original Message-
From: Tong Liu01
Sent: 2022年11月7日星期一 上午11:33
To: amd-gfx@lists.freedesktop.org
Cc: A
Hello there,
Static analyser cppcheck says:
linux-6.1-rc4/drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c:626:27:
style: Array index 'i' is used before limits check. [arrayIndexThenCheck]
Source code is
if (dcfclk_sta_targets[i] < optimal_dcfclk_for_uclk[j] && i <
num_dc
From: shenyanfeng
add return-value check of ftell to improve robustness(and avoid abnormal
behavior)
Signed-off-by: SPeak
Signed-off-by: shenyanfeng
---
Receive "Undelivered Mail Returned to Sender", so send again
drivers/gpu/drm/radeon/mkregtable.c | 5 +++--
1 file changed, 3 insertion
On 11/7/2022 2:19 PM, Guchun Chen wrote:
Still avoid intermittent failure.
Signed-off-by: Guchun Chen
Reviewed-by: Lijo Lazar
Thanks,
Lijo
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/d
[AMD Official Use Only - General]
Acked-by: Evan Quan
> -Original Message-
> From: Chen, Guchun
> Sent: Monday, November 7, 2022 4:50 PM
> To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> ; Zhang, Hawking
> ; Lazar, Lijo ; Quan, Evan
>
> Cc: Chen, Guchun
> Subject: [PATCH] drm/
[AMD Official Use Only - General]
Reviewed-by: Evan Quan
> -Original Message-
> From: Jain, Harsh
> Sent: Monday, November 7, 2022 4:43 PM
> To: Deucher, Alexander ; Quan, Evan
>
> Cc: amd-gfx@lists.freedesktop.org; Jain, Harsh
> Subject: [PATCH v3] drm/amdgpu: complete gfxoff allow s
Still avoid intermittent failure.
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cic
change guarantees that gfxoff is allowed before moving further in
s2idle sequence to add more reliablity about gfxoff in amdgpu IP's
suspend flow
Signed-off-by: Harsh Jain
---
v2: replaced flush_work with direct call to amdgpu_dpm_set_powergating_by_smu
and edited title
v3: added braces for rea
With this change it will add support for clock gating for sdma 5.2.7
- Additional changes are to re-arrange the chip version sequentially.
Signed-off-by: Krunal Patel
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/
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