Compute VMs use user mode queues for command submission. They cannot use
a CS ioctl to synchronize with pending PTE updates and flush TLBs. Do
this synchronization in amdgpu_gem_va_ioctl for compute VMs.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 16 +
This will make it possible for amdgpu GEM ioctls to flush TLBs on compute
VMs.
This removes VMID-based TLB flushing and always uses PASID-based
flushing. This still works because it scans the VMID-PASID mapping
registers to find the right VMID. It's only slightly less efficient. This
is not a prod
Applied. Thanks!
Alex
On Fri, Feb 24, 2023 at 11:45 AM Tom Rix wrote:
>
> building with gcc and W=1 reports
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c:81:29: error: variable
> ‘ring’ set but not used [-Werror=unused-but-set-variable]
>81 | struct amdgpu_ring *ring;
> |
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 4d6d7ce9baaf9e67a85a53afc69a36af716f7670 Add linux-next specific
files for 20230224
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202302111601.jty4lkra-...@intel.com
https
building with gcc and W=1 reports
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c:81:29: error: variable
‘ring’ set but not used [-Werror=unused-but-set-variable]
81 | struct amdgpu_ring *ring;
| ^~~~
ring is not used so remove it.
Signed-off-by: Tom Rix
---
building with gcc and W=1 reports
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c:437:37: error: variable ‘channel_index’
set but not used [-Werror=unused-but-set-variable]
437 | uint32_t eccinfo_table_idx, channel_index;
| ^
channel_index i
Drivers can call this helper from their device suspend
> > implementation. If it
> > + * is not known if drm_kms_helper_poll_init has been called before
> > the
> > driver
> > + * should use drm_kms_helper_poll_fini_instead.
> > + * Polling is re-enabled by cal
On 2/24/23 11:55, Aurabindo Pillai wrote:
From: tiancyin
[Why]
Variable adev->crtc_irq.num_types was initialized as the value of
adev->mode_info.num_crtc at early_init stage, later at hw_init stage,
the num_crtc changed due to the display pipe harvest on some SKUs,
but the num_types was not upd
From: tiancyin
[Why]
Variable adev->crtc_irq.num_types was initialized as the value of
adev->mode_info.num_crtc at early_init stage, later at hw_init stage,
the num_crtc changed due to the display pipe harvest on some SKUs,
but the num_types was not updated accordingly, that cause below error
in
On Fri, Feb 24, 2023 at 8:31 PM Christian König
wrote:
>
> Sorry I totally missed that you attached the full dmesg to your original
> mail.
>
> Yeah, the driver did fail gracefully. But then X doesn't come up and
> then gdm just dies.
Are you sure that these messages should be present when the dr
Drivers can call this helper from their device suspend
> > implementation. If it
> > + * is not known if drm_kms_helper_poll_init has been called before
> > the
> > driver
> > + * should use drm_kms_helper_poll_fini_instead.
> > + * Polling is re-enabled by cal
Am 24.02.23 um 13:29 schrieb Christian König:
Am 24.02.23 um 09:38 schrieb Mikhail Gavrilov:
On Fri, Feb 24, 2023 at 12:13 PM Christian König
wrote:
Hi Mikhail,
this is pretty clearly a problem with the system and/or it's BIOS and
not the GPU hw or the driver.
The option pci=nocrs makes the
Hi Mikhail,
this is pretty clearly a problem with the system and/or it's BIOS and
not the GPU hw or the driver.
The option pci=nocrs makes the kernel ignore additional resource windows
the BIOS reports through ACPI. This then most likely leads to problems
with amdgpu because it can't bring u
Well STOP! This can't be pushed before we have Mesa code for this!
Christian.
Am 24.02.23 um 15:36 schrieb Dong, Ruijing:
[AMD Official Use Only - General]
If no other comment or concern, we will push it.
Thanks,
Ruijing
-Original Message-
From: amd-gfx On Behalf Of Dong, Ruijing
Se
[AMD Official Use Only - General]
If no other comment or concern, we will push it.
Thanks,
Ruijing
-Original Message-
From: amd-gfx On Behalf Of Dong, Ruijing
Sent: Thursday, February 23, 2023 10:19 AM
To: Christian König ; Wu, David
; amd-gfx@lists.freedesktop.org; Koenig, Christian
Am 24.02.23 um 09:38 schrieb Mikhail Gavrilov:
On Fri, Feb 24, 2023 at 12:13 PM Christian König
wrote:
Hi Mikhail,
this is pretty clearly a problem with the system and/or it's BIOS and
not the GPU hw or the driver.
The option pci=nocrs makes the kernel ignore additional resource windows
the B
On Fri, Feb 24, 2023 at 12:13 PM Christian König
wrote:
>
> Hi Mikhail,
>
> this is pretty clearly a problem with the system and/or it's BIOS and
> not the GPU hw or the driver.
>
> The option pci=nocrs makes the kernel ignore additional resource windows
> the BIOS reports through ACPI. This then
If some invalid workload types exposed by the power profile sysfs node,
it will be failed to set the unsuported profiles.
So we can skip to show the invalid workload type in the profiles list to
avoid that failure happen.
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0
Capped and Uncapped workload types are supported, each workload type
has different performance thresholds and pstate conditions.
* capped mode is used by power centric workload
* uncapped mode is used by perf centric workload
Signed-off-by: Perry Yuan
---
.../drm/amd/pm/swsmu/inc/pmfw_if/smu11_
Capped and uncapped workload types switching are supported on Vangogh,
User can switch the power profile and check current type with below commands.
1) switch to capped mode:
`# echo 8 > /sys/class/drm/card0/device/pp_power_profile_mode`
2) switch to uncapped mode:
`# echo 9 > /sys/class/drm/card
The patchset will enable the capped and uncapped mode
This new capped power mode has limit DRAM Thresholds
and conditions in DF-PState Algorithm based on the workload type set
from driver.
The uncapped mode will reset to normal performance level which has no
such power limitations.
Perf Centri
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