Reviewed-by: Guchun Chen
> -Original Message-
> From: amd-gfx On Behalf Of Lijo
> Lazar
> Sent: Wednesday, April 5, 2023 5:46 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; kernel test robot
> ; Zhang, Hawking
> Subject: [PATCH] drm/amdgpu: Fix warnings
>
> Fix
On 4/5/2023 06:29, Liu, Aaron wrote:
GFX is in gfxoff mode during s0ix so we shouldn't need to
actually execute kfd_iommu_suspend/kfd_iommu_resume operation.
Signed-off-by: Aaron Liu
---
Probably should add to this patch:
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449
On 2023-04-04 17:59, Mukul Joshi wrote:
Update the invalid PTE flag setting to ensure, in addition
to transitioning the retry fault to a no-retry fault, it
also causes the wavefront to enter the trap handler. With the
current setting, it only transitions to a no-retry fault.
Signed-off-by:
[Public]
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
>
> Sent: Wednesday, April 5, 2023 10:24
> To: Koenig, Christian ; Deucher, Alexander
> ; Limonciello, Mario
> ; Russell, Kent
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>
> Subject: [PATCH v3]
On 2023-04-05 06:06, Shashank Sharma wrote:
>
> On 04/04/2023 22:58, Luben Tuikov wrote:
>> On 2023-04-04 12:36, Shashank Sharma wrote:
>>> On 04/04/2023 18:30, Luben Tuikov wrote:
On 2023-03-29 12:04, Shashank Sharma wrote:
> From: Shashank Sharma
>
> This patch adds new
Reviewed-by: Luben Tuikov
Regards,
Luben
On 2023-04-05 05:45, Lijo Lazar wrote:
> Fix below warning due to incompatible types in conditional operator
>
> ../pm/swsmu/smu13/smu_v13_0_6_ppt.c:315:17: sparse: sparse: incompatible
> types in conditional expression (different base types):
>
>
On 2023-04-05 11:31, Shane Xiao wrote:
For DMA-MAP userptr on other GPUs, the dma address array
will be populated in amdgpu_ttm_backend_bind.
Remove the redundant call from the driver.
v2:
update the comment
Thanks. You already have my R-b. :)
Signed-off-by: Shane Xiao
Reviewed-by:
On 2023-04-05 11:31, Shane Xiao wrote:
For SG BO to DMA-map userptrs on other GPUs, the SG BO need inherit
MTYPEs in PTEs from original BO.
If we set the flags, the device can be coherent with the CPUs and other GPUs.
v2:
1. Drop unnecessary flags check
2. Remove local variable align
On 2023-04-05 11:31, Shane Xiao wrote:
For userptr bo with iommu on, multiple GPUs use same system
memory dma mapping address when both adev and bo_adev are in
identity mode or in the same iommu group.
If RAM direct map to one GPU, other GPUs can share the original
BO in order to reduce dma
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 8417c8f5007bf4567ccffda850a3157c7d905f67 Add linux-next specific
files for 20230405
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202303161521.jbgbafjj-...@intel.com
Error
On 4/3/23 09:10, Igor Artemiev wrote:
The adev->dm.dc pointer can be NULL and dereferenced in amdgpu_dm_fini()
without checking.
Add a NULL pointer check before calling dc_dmub_srv_destroy().
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Fixes: 9a71c7d31734
Enable SDMA queue empty context switching. SDMA context switch due to
quantum programming no longer done here (as of sdma v6), so re-name
sdma_v6_0_ctx_switch_enable to sdma_v6_0_ctxempty_int_enable to reflect
this.
Also program SDMAx_QUEUEx_SCHEDULE_CNTL for context switch due to
quantum in KFD.
For userptr bo with iommu on, multiple GPUs use same system
memory dma mapping address when both adev and bo_adev are in
identity mode or in the same iommu group.
If RAM direct map to one GPU, other GPUs can share the original
BO in order to reduce dma address array usage when RAM can
direct map
For DMA-MAP userptr on other GPUs, the dma address array
will be populated in amdgpu_ttm_backend_bind.
Remove the redundant call from the driver.
v2:
update the comment
Signed-off-by: Shane Xiao
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 ---
1
For SG BO to DMA-map userptrs on other GPUs, the SG BO need inherit
MTYPEs in PTEs from original BO.
If we set the flags, the device can be coherent with the CPUs and other GPUs.
v2:
1. Drop unnecessary flags check
2. Remove local variable align
Signed-off-by: Shane Xiao
---
[AMD Official Use Only - General]
Thanks a lot Christian, Mario, & Kent, much appreciate for your help, sent v3
for review : https://patchwork.freedesktop.org/patch/531116/
-Original Message-
From: Koenig, Christian
Sent: Wednesday, April 5, 2023 7:47 PM
To: Limonciello, Mario ;
The driver doesn't resubmit jobs on hangs any more, hence drop
the hang limit parameter - amdgpu_job_hang_limit, wherever it is used.
Suggested-by: Christian König
Cc: Alex Deucher
Cc: Mario Limonciello
Cc: Kent Russell
Signed-off-by: Srinivasan Shanmugam
---
Removing the global job_hang_limit variable and replacing the only place
where its used with 0 would probably be a good idea also.
Christian.
Am 05.04.23 um 16:13 schrieb Mario Limonciello:
Also the changelog should be below the cutlist (---).
On 4/5/23 09:12, Russell, Kent wrote:
[AMD
Also the changelog should be below the cutlist (---).
On 4/5/23 09:12, Russell, Kent wrote:
[AMD Official Use Only - General]
Probably worth changing the commit message and headline now that you're
removing the parameter instead of just fixing the code style.
Kent
-Original
[AMD Official Use Only - General]
Probably worth changing the commit message and headline now that you're
removing the parameter instead of just fixing the code style.
Kent
> -Original Message-
> From: amd-gfx On Behalf Of
> Srinivasan Shanmugam
> Sent: Wednesday, April 5, 2023 9:24
Fix coding style errors reported by checkpatch, specifically:
ERROR: space prohibited before that ',' (ctx:WxV)
+module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444);
^
ERROR: space required after that ',' (ctx:WxV)
GFX is in gfxoff mode during s0ix so we shouldn't need to
actually execute kfd_iommu_suspend/kfd_iommu_resume operation.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git
Hi!
On Tue, Apr 04, 2023 at 08:28:47PM +1000, Michael Ellerman wrote:
> The amdgpu driver builds some of its code with hard-float enabled,
> whereas the rest of the kernel is built with soft-float.
>
> When building with 64-bit long double, if soft-float and hard-float
> objects are linked
Segher Boessenkool writes:
> On Tue, Apr 04, 2023 at 08:28:47PM +1000, Michael Ellerman wrote:
>> The amdgpu driver builds some of its code with hard-float enabled,
>> whereas the rest of the kernel is built with soft-float.
>>
>> When building with 64-bit long double, if soft-float and
The amdgpu driver builds some of its code with hard-float enabled,
whereas the rest of the kernel is built with soft-float.
When building with 64-bit long double, if soft-float and hard-float
objects are linked together, the build fails due to incompatible ABI
tags.
In the past there have been
Am 05.04.23 um 06:19 schrieb Srinivasan Shanmugam:
Fix coding style errors reported by checkpatch, specifically:
ERROR: space prohibited before that ',' (ctx:WxV)
+module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444);
On 04/04/2023 22:58, Luben Tuikov wrote:
On 2023-04-04 12:36, Shashank Sharma wrote:
On 04/04/2023 18:30, Luben Tuikov wrote:
On 2023-03-29 12:04, Shashank Sharma wrote:
From: Shashank Sharma
This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As
Fix below warning due to incompatible types in conditional operator
../pm/swsmu/smu13/smu_v13_0_6_ppt.c:315:17: sparse: sparse: incompatible
types in conditional expression (different base types):
Signed-off-by: Lijo Lazar
Reported-by: kernel test robot
Link:
On Wed, 5 Apr 2023 at 11:11, Tvrtko Ursulin
wrote:
>
>
> On 05/04/2023 09:28, Daniel Vetter wrote:
> > On Tue, 4 Apr 2023 at 12:45, Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> Hi,
> >>
> >> On 03/04/2023 20:40, Joshua Ashton wrote:
> >>> Hello all!
> >>>
> >>> I would like to propose a new API for
On 05/04/2023 09:28, Daniel Vetter wrote:
On Tue, 4 Apr 2023 at 12:45, Tvrtko Ursulin
wrote:
Hi,
On 03/04/2023 20:40, Joshua Ashton wrote:
Hello all!
I would like to propose a new API for allowing processes to control
the priority of GPU queues similar to RLIMIT_NICE/RLIMIT_RTPRIO.
The
On Tue, 4 Apr 2023 at 12:45, Tvrtko Ursulin
wrote:
>
>
> Hi,
>
> On 03/04/2023 20:40, Joshua Ashton wrote:
> > Hello all!
> >
> > I would like to propose a new API for allowing processes to control
> > the priority of GPU queues similar to RLIMIT_NICE/RLIMIT_RTPRIO.
> >
> > The main reason for
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