[AMD Official Use Only - General]
Thanks,
Lijo
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Monday, June 19, 2023 6:12 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Kasiviswanathan, Harish
; Zhang, Hawking
Subject: [PATCH] drm/amd/pm: Provide energy
Hi,
A nouveau developer(Lyude) from redhat send me a R-B,
Thanks for the developers of nouveau project.
Please allow me add a link[1] here.
[1]
https://lore.kernel.org/all/0afadc69f99a36bc9d03ecf54ff25859dbc10e28.ca...@redhat.com/
On 2023/6/13 11:01, Sui Jingfeng wrote:
From: Sui
Hi
On 2023/6/22 06:11, Lyude Paul wrote:
For the nouveau bits:
Reviewed-by: Lyude Paul
Thanks a lot
On Tue, 2023-06-13 at 03:25 +0800, Sui Jingfeng wrote:
From: Sui Jingfeng
The vga_is_firmware_default() function is arch-dependent, it's probably
wrong if we simply remove the arch guard.
On 6/21/23 17:57, Hamza Mahfooz wrote:
Currently, it is possible for us to access memory that we shouldn't.
Since, we acquire (possibly dangling) pointers to dirty rectangles
before doing a bounds check to make sure we can actually accommodate the
number of dirty rectangles userspace has
For the nouveau bits:
Reviewed-by: Lyude Paul
On Tue, 2023-06-13 at 03:25 +0800, Sui Jingfeng wrote:
> From: Sui Jingfeng
>
> The vga_is_firmware_default() function is arch-dependent, it's probably
> wrong if we simply remove the arch guard. As the VRAM BAR which contains
> firmware
Currently, it is possible for us to access memory that we shouldn't.
Since, we acquire (possibly dangling) pointers to dirty rectangles
before doing a bounds check to make sure we can actually accommodate the
number of dirty rectangles userspace has requested to fill. This issue
is especially
From: Simon Ser
Up until now, amdgpu was silently degrading to vsync when
user-space requested an async flip but the hardware didn't support
it.
The hardware doesn't support immediate flips when the update changes
the FB pitch, the DCC state, the rotation, enables or disables CRTCs
or planes,
Hi,
This fix was developed with the "Add support for atomic async page-flips"
patchset, it's not dependent on the new feature but it wasn't applied by
the time so I'm resending it now.
Extracted from:
https://lore.kernel.org/dri-devel/20220929184307.258331-3-cont...@emersion.fr/
Simon Ser (1):
Am 2023-06-20 um 22:11 schrieb Ramesh Errabolu:
Call KFD api to get Dmabuf instead of calling GEM Prime API
Signed-off-by: Ramesh Errabolu
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
So if we go down this path of CONFIG_WBRF and CONFIG_WBRF_ACPI, another
question would be where should the new "wbrf.c" be stored? The ACPI only
version most certainly made sense in drivers/acpi/wbrf.c, but a generic
version that only has an ACPI implementation right now not so much.
On
On 6/21/2023 12:26 PM, Andrew Lunn wrote:
I think what you're asking for is another layer of indirection
like CONFIG_WBRF in addition to CONFIG_ACPI_WBRF.
Producers would call functions like wbrf_supported_producer()
where the source file is not guarded behind CONFIG_ACPI_WBRF,
but instead by
On 6/21/2023 11:52 AM, Andrew Lunn wrote:
On Wed, Jun 21, 2023 at 11:15:00AM -0500, Limonciello, Mario wrote:
On 6/21/2023 10:39 AM, Johannes Berg wrote:
On Wed, 2023-06-21 at 17:36 +0200, Andrew Lunn wrote:
On Wed, Jun 21, 2023 at 01:45:56PM +0800, Evan Quan wrote:
From: Mario Limonciello
On 6/20/23 20:51, Srinivasan Shanmugam wrote:
Conform to Linux kernel coding style.
Reported by checkpatch:
WARNING: else is not generally useful after a break or return
Expressions under 'else' branch in function 'dm_crtc_get_scanoutpos' are
executed whenever the expression in 'if' is
On 6/21/2023 11:31 AM, Andrew Lunn wrote:
I think there is enough details for this to happen. It's done
so that either the AML can natively behave as a consumer or a
driver can behave as a consumer.
+/**
+ * APIs needed by drivers/subsystems for contributing frequencies:
+ * During probe,
Em 21/06/2023 04:40, Christian König escreveu:
Am 21.06.23 um 02:57 schrieb André Almeida:
Implement get_reset ioctl for amdgpu
Well that pretty much won't work since the jobs are destroyed much later
than the contexts.
Why does this prevents the code to work? If the context is detroyed,
Em 21/06/2023 05:09, Pekka Paalanen escreveu:
On Tue, 20 Jun 2023 21:57:17 -0300
André Almeida wrote:
Create a new DRM ioctl operation to get the numbers of resets for a
given context. The numbers reflect just the resets that happened after
the context was created, and not since the machine
Em 21/06/2023 04:58, Pekka Paalanen escreveu:
On Tue, 20 Jun 2023 21:57:16 -0300
André Almeida wrote:
Create a section that specifies how to deal with DRM device resets for
kernel and userspace drivers.
Signed-off-by: André Almeida
Hi André,
nice to see this! I ended up giving lots of
On 6/21/2023 11:14 AM, Andrew Lunn wrote:
Do only ACPI based systems have:
interference of relatively high-powered harmonics of the (G-)DDR
memory clocks with local radio module frequency bands used by
Wifi 6/6e/7."
Could Device Tree based systems not experience this problem?
On 6/21/2023 10:39 AM, Johannes Berg wrote:
On Wed, 2023-06-21 at 17:36 +0200, Andrew Lunn wrote:
On Wed, Jun 21, 2023 at 01:45:56PM +0800, Evan Quan wrote:
From: Mario Limonciello
Due to electrical and mechanical constraints in certain platform designs
there may be likely interference of
On 6/19/23 06:02, Srinivasan Shanmugam wrote:
Else is not necessary after return statements, hence remove it.
Reported by checkpatch:
WARNING: else is not generally useful after a break or return
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:9776:
return
Please, remove the word "Fix" from the commit tittle before merge it.
On 6/17/23 09:56, Srinivasan Shanmugam wrote:
Fix the following errors & warnings reported by checkpatch:
ERROR: space required before the open brace '{'
ERROR: space required before the open parenthesis '('
ERROR: that open
On 6/17/23 09:56, Srinivasan Shanmugam wrote:
Fix the following errors & warnings reported by checkpatch:
ERROR: space required before the open brace '{'
ERROR: space required before the open parenthesis '('
ERROR: that open brace { should be on the previous line
ERROR: space prohibited
On Wed, 2023-06-21 at 13:45 +0800, Evan Quan wrote:
> To support AMD's WBRF interference mitigation mechanism, Wifi adapters
> utilized in the system must register the frequencies in use(or unregister
> those frequencies no longer used) via the dedicated APCI calls. So that,
> other drivers
Don't assume that only the driver would be accessing LNKCTL. ASPM
policy changes can trigger write to LNKCTL outside of driver's control.
And in the case of upstream bridge, the driver does not even own the
device it's changing the registers for.
Use RMW capability accessors which do proper
From: Melissa Wen
DRM color function to create modes for lut3d mode property from an array
of drm_color_lut3d_mode modes supported by the HW and advertise to
userspace. Userspace can get the description of a specific mode in the
enum list from its blob data.
Signed-off-by: Melissa Wen
---
From: Laurent Pinchart
To prepare for CLU support, expend the CMM API exposed to the DU driver
to separate the LUT table pointer from the LUT update decision. This
will be required, as we will need to update the LUT and CLU
independently.
Signed-off-by: Laurent Pinchart
Reviewed-by: Kieran
use "__packed" is clearer amd better than “pragma pack()”.
Signed-off-by: Su Hui
---
As Dan Carpenter mentioned:
'"Mark the associated types properly packed individually, rather than
use the disgusting "pragma pack()" that should never be used."
From: Alex Hung
A struct is defined for 3D LUT modes to be supported by hardware.
The elements includes lut_size, lut_stride, bit_depth, color_format
and flags.
Note: A patchset "IGT tests for pre-blending 3D LUT interfaces" for this
proposal is sent to IGT mailing list.
Signed-off-by: Alex
From: Melissa Wen
Shaper LUT is used to shape the content after blending, i.e.,
de-linearize or normalize space before applying a 3D LUT color
correction. In the next patch, we add 3D LUT property to DRM color
management after this shaper LUT and before the current gamma LUT.
Signed-off-by:
From: Melissa Wen
If the driver supports user 3D LUT then it calls a drm function to
attach 3D LUT related properties according to HW caps.
Signed-off-by: Melissa Wen
---
drivers/gpu/drm/drm_color_mgmt.c | 35
include/drm/drm_color_mgmt.h | 3 +++
2 files
Don't assume that only the driver would be accessing LNKCTL. ASPM
policy changes can trigger write to LNKCTL outside of driver's control.
And in the case of upstream bridge, the driver does not even own the
device it's changing the registers for.
Use RMW capability accessors which do proper
On 2023/6/20 15:37, Dan Carpenter wrote:
On Tue, Jun 20, 2023 at 12:59:19PM +0800, Su Hui wrote:
Smatch error:
gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:316:49: error:
static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
static assertion failed: "amd_sriov_msg_vf2pf_info
From: Melissa Wen
Add 3D LUT for gammar correction using a 3D lookup table. The position
in the color correction pipeline where 3D LUT is applied depends on hw
design, being after CTM or gamma. If just after CTM, a shaper lut must
be set to shape the content for a non-linear space. That details
From: Kieran Bingham
Link the DRM 3D-CLU configuration to the CMM setup configuration.
Signed-off-by: Kieran Bingham
Signed-off-by: Laurent Pinchart
Reviewed-by: Kieran Bingham
Signed-off-by: Jacopo Mondi
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 23 ++-
1 file
On 2023/6/21 14:11, Dan Carpenter wrote:
When there was a #pragma then Sparse just turned off. The Sparse
warnings are places where people forgot to put the __user in their casts
or didn't annotate endianness correctly. It's not a "bug" to forget
to annotate endianness or user pointers.
Hello, this series is based on the RFC sent by Melssa Wen:
"[RFC PATCH v2 00/18] Add DRM CRTC 3D LUT interface"
https://lore.kernel.org/dri-devel/20230109143846.1966301-1-m...@igalia.com/
that introduces CRTC properties to control 3D LUT operations.
The R-Car DU peripheral has a post-blending
Enable the 3D LUT in rcar_du_crtc by first creating a property for
the supported 3d lut modes and by calling the drm_crtc_enable_lut3d()
helper.
Signed-off-by: Jacopo Mondi
---
drivers/gpu/drm/rcar-du/rcar_cmm.h | 14 ++
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 23
On Thu, 27 Apr 2023 15:43:28 +0800 xiao sheng wen(肖盛文）
wrote:
> Package: firmware-amd-graphics
> Version: 20230310-1~exp1
> Severity: normal
> X-Debbugs-Cc: atzli...@sina.com
>
> Hi,
>
> When I upgrade to kernel 5.10.0-22-arm64, there are following error
> infos:
>
> W: Possible missing
Comparisons of 'table' and 'vddc_sclk_table' with NULL are useless
since 'table' and 'vddc_sclk_table' are initialized by an addresses
and cannot be NULL.
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Igor Artemiev
---
drivers/gpu/drm/radeon/kv_dpm.c | 22
From: Kieran Bingham
The CMM module provides a three-dimensional cubic look up table that
converts three-color-component data into desired three color components
by use of a lookup table.
While the 1D-LUT can only control each of three color components
separately, the 3D-CLU can be used for
On Tue, Jun 20, 2023 at 12:59:19PM +0800, Su Hui wrote:
> Smatch error:
> gpu/drm/amd/amdgpu/amdgv_sriovmsg.h:316:49: error:
> static assertion failed: "amd_sriov_msg_pf2vf_info must be 1 KB"
> static assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
>
I doubt that moving the
atch link:
https://lore.kernel.org/r/20230620085543.576733-1-suhui%40nfschina.com
patch subject: [PATCH] drm/amd/amdgpu: Use “__packed“ instead of "pragma pack()"
config: mips-randconfig-m031-20230620
(https://download.01.org/0day-ci/archive/20230621/202306210527.oxvd2jlz-...@intel.com/co
On Tue, Jun 20, 2023 at 10:37:59AM +0300, Dan Carpenter wrote:
> "Mark the associated types properly packed individually, rather than
> use the disgusting "pragma pack()" that should never be used."
>
>
Can we change the flags if needed. E.g. see what
amdgpu_bo_pin_restricted does:
if (!(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS))
bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
amdgpu_bo_placement_from_domain(bo, domain);
This shouldn't really change
Am 21.06.23 um 17:06 schrieb André Almeida:
Em 21/06/2023 04:42, Christian König escreveu:
Am 21.06.23 um 02:57 schrieb André Almeida:
Hi,
This is a new version of the documentation for DRM device resets. As
I dived
more in the subject, I started to believe that part of the problem
was the
Em 21/06/2023 04:42, Christian König escreveu:
Am 21.06.23 um 02:57 schrieb André Almeida:
Hi,
This is a new version of the documentation for DRM device resets. As I
dived
more in the subject, I started to believe that part of the problem was
the lack
of a DRM API to get reset information
Am 21.06.23 um 16:35 schrieb Pierre-Eric Pelloux-Prayer:
This allows tools to distinguish between VRAM and visible VRAM.
Use the opportunity to fix locking before accessing bo.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 33
This allows tools to distinguish between VRAM and visible VRAM.
Use the opportunity to fix locking before accessing bo.
Signed-off-by: Pierre-Eric Pelloux-Prayer
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 33 ++
1 file changed, 21 insertions(+), 12 deletions(-)
diff
On 6/21/2023 5:22 AM, Johannes Berg wrote:
On Wed, 2023-06-21 at 13:45 +0800, Evan Quan wrote:
To support AMD's WBRF interference mitigation mechanism, Wifi adapters
utilized in the system must register the frequencies in use(or unregister
those frequencies no longer used) via the dedicated
Am 19.06.23 um 13:06 schrieb Thomas Hellström (Intel):
On 6/19/23 11:48, Christian König wrote:
Hi,
Am 19.06.23 um 11:33 schrieb Thomas Hellström (Intel):
[SNIP]
Sometimes you want to just drop the contended lock after the above
relaxation. (Eviction would be one example), and not add as
Expose unique id of GFX v9.4.3 ASICs as device attribute.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 386ccf11e657..9ec51f50fc52 100644
---
Am 21.06.23 um 14:44 schrieb Shashank Sharma:
This patch:
- creates a doorbell page for graphics driver usages.
- adds a few new varlables in adev->doorbell structure to
keep track of kernel's doorbell-bo.
- removes the adev->doorbell.ptr variable, replaces it with
kernel-doorbell-bo's
On 21/06/2023 14:08, Christian König wrote:
Am 20.06.23 um 19:16 schrieb Shashank Sharma:
This patch:
- Removes the existing doorbell management code, and its variables
from the doorbell_init function, it will be done in doorbell
manager now.
- uses the doorbell page created for MES
This patch:
- Removes the existing doorbell management code, and its variables
from the doorbell_init function, it will be done in doorbell
manager now.
- uses the doorbell page created for MES kernel level needs (doorbells
for MES self tests)
- current MES code was allocating MES doorbells
This patch:
- creates a doorbell page for graphics driver usages.
- adds a few new varlables in adev->doorbell structure to
keep track of kernel's doorbell-bo.
- removes the adev->doorbell.ptr variable, replaces it with
kernel-doorbell-bo's cpu address.
V2: - Create doorbell BO directly, no
Am 20.06.23 um 19:16 schrieb Shashank Sharma:
This patch:
- Removes the existing doorbell management code, and its variables
from the doorbell_init function, it will be done in doorbell
manager now.
- uses the doorbell page created for MES kernel level needs (doorbells
for MES self
On Wed, Jun 21, 2023 at 12:47 PM Zhu, Jiadong wrote:
>
> [AMD Official Use Only - General]
>
> Hi,
>
> It is fixed on
> https://patchwork.freedesktop.org/patch/542647/?series=119384=2
>
> Could you make sure if this patch is included.
>
I confirm this patch fixes the issue.
But this patch is
On Wed, 21 Jun 2023 10:10:22 +0200
Jacopo Mondi wrote:
> Hello, this series is based on the RFC sent by Melssa Wen:
> "[RFC PATCH v2 00/18] Add DRM CRTC 3D LUT interface"
> https://lore.kernel.org/dri-devel/20230109143846.1966301-1-m...@igalia.com/
> that introduces CRTC properties to control 3D
If a same GPU VM is shared by kfd and graphic operations, we must align
the vm update mode to sdma, or cpu kmap will fail and cause null pointer
issue.
Signed-off-by: YuBiao Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 +
1 file changed, 5 insertions(+)
diff --git
[AMD Official Use Only - General]
Reviewed-by: Emily Deng
>-Original Message-
>From: amd-gfx On Behalf Of Horace
>Chen
>Sent: Tuesday, June 20, 2023 9:30 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Andrey Grodzovsky ; Xiao, Jack
>; Xu, Feifei ; Chen, Horace
>; Chang, HaiJun ;
>Deucher,
On 21/06/2023 11:13, Christian König wrote:
Am 21.06.23 um 11:10 schrieb Shashank Sharma:
Hey Christian,
On 21/06/2023 10:32, Christian König wrote:
Am 20.06.23 um 19:16 schrieb Shashank Sharma:
This patch:
- creates a doorbell page for graphics driver usages.
- adds a few new varlables
[AMD Official Use Only - General]
Ping.
Best wishes
Emily Deng
>-Original Message-
>From: Emily Deng
>Sent: Wednesday, June 21, 2023 9:30 AM
>To: amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily
>Subject: [PATCH] drm/amdgpu/vcn: Need to unpause dpg before stop dpg
>
>Need to
Am 21.06.23 um 11:10 schrieb Shashank Sharma:
Hey Christian,
On 21/06/2023 10:32, Christian König wrote:
Am 20.06.23 um 19:16 schrieb Shashank Sharma:
This patch:
- creates a doorbell page for graphics driver usages.
- adds a few new varlables in adev->doorbell structure to
keep track
Hey Christian,
On 21/06/2023 10:32, Christian König wrote:
Am 20.06.23 um 19:16 schrieb Shashank Sharma:
This patch:
- creates a doorbell page for graphics driver usages.
- adds a few new varlables in adev->doorbell structure to
keep track of kernel's doorbell-bo.
- removes the
Am 20.06.23 um 19:16 schrieb Shashank Sharma:
This patch:
- creates a doorbell page for graphics driver usages.
- adds a few new varlables in adev->doorbell structure to
keep track of kernel's doorbell-bo.
- removes the adev->doorbell.ptr variable, replaces it with
kernel-doorbell-bo's cpu
On Tue, 20 Jun 2023 21:57:17 -0300
André Almeida wrote:
> Create a new DRM ioctl operation to get the numbers of resets for a
> given context. The numbers reflect just the resets that happened after
> the context was created, and not since the machine was booted.
>
> Create a debugfs interface
On Tue, 20 Jun 2023 21:57:16 -0300
André Almeida wrote:
> Create a section that specifies how to deal with DRM device resets for
> kernel and userspace drivers.
>
> Signed-off-by: André Almeida
Hi André,
nice to see this! I ended up giving lots of grammar comments, but I'm
not a native
[AMD Official Use Only - General]
Hi,
It is fixed on
https://patchwork.freedesktop.org/patch/542647/?series=119384=2
Could you make sure if this patch is included.
Thanks,
Jiadong
-Original Message-
From: amd-gfx On Behalf Of Mikhail
Gavrilov
Sent: Wednesday, June 21, 2023 3:38 PM
Am 21.06.23 um 02:57 schrieb André Almeida:
Hi,
This is a new version of the documentation for DRM device resets. As I dived
more in the subject, I started to believe that part of the problem was the lack
of a DRM API to get reset information from the driver. With an API, we can
better
Am 21.06.23 um 02:57 schrieb André Almeida:
Implement get_reset ioctl for amdgpu
Well that pretty much won't work since the jobs are destroyed much later
than the contexts.
Christian.
Signed-off-by: André Almeida
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 ++-
On Tue, 20 Jun 2023, André Almeida wrote:
> Implement get_reset ioctl for i915.
>
> Signed-off-by: André Almeida
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c| 18 ++
> drivers/gpu/drm/i915/gem/i915_gem_context.h| 2 ++
>
Hi,
after commit 5b711e7f9c73e5ff44d6ac865711d9a05c2a0360 I see KASAN
sanitizer bug message at every boot:
Backtrace:
[ 18.600551]
==
[ 18.600558] BUG: KASAN: slab-out-of-bounds in
amdgpu_sw_ring_ib_mark_offset+0x2c1/0x2e0
Hi,
On 2023/6/16 22:34, Alex Deucher wrote:
On Fri, Jun 16, 2023 at 10:22 AM Sui Jingfeng wrote:
On 2023/6/16 21:41, Alex Deucher wrote:
On Fri, Jun 16, 2023 at 3:11 AM Sui Jingfeng wrote:
Hi,
On 2023/6/16 05:11, Alex Deucher wrote:
On Wed, Jun 14, 2023 at 6:50 AM Sui Jingfeng wrote:
The feature mask bit was not correctly cleared. Without that, the L2H
and H2L interrupts cannot be enabled.
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_thermal.c | 4 +++-
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c | 4 +++-
2 files changed, 6
To acquire the voltage and current info from gpu_metrics interface,
but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible,
add new gpu_metrics_v2_4 structure.
Reviewed-by: Mario Limonciello
Acked-by: Evan Quan
Signed-off-by: Wenyou Yang
---
75 matches
Mail list logo
