Re: [RESEND v3 4/5] drm/amdgpu: Move coredump code to amdgpu_reset file

2023-08-13 Thread kernel test robot
Hi André, kernel test robot noticed the following build warnings: [auto build test WARNING on drm-misc/drm-misc-next] [also build test WARNING on drm/drm-next drm-exynos/exynos-drm-next drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.5-rc5 next-20230809]

[PATCH AUTOSEL 5.10 19/25] drm/amd/display: Exit idle optimizations before attempt to access PHY

2023-08-13 Thread Sasha Levin
From: Leo Chen [ Upstream commit de612738e9771bd66aeb20044486c457c512f684 ] [Why & How] DMUB may hang when powering down pixel clocks due to no dprefclk. It is fixed by exiting idle optimization before the attempt to access PHY. Reviewed-by: Nicholas Kazlauskas Acked-by: Alex Hung

[PATCH AUTOSEL 5.15 25/31] drm/amd/display: Exit idle optimizations before attempt to access PHY

2023-08-13 Thread Sasha Levin
From: Leo Chen [ Upstream commit de612738e9771bd66aeb20044486c457c512f684 ] [Why & How] DMUB may hang when powering down pixel clocks due to no dprefclk. It is fixed by exiting idle optimization before the attempt to access PHY. Reviewed-by: Nicholas Kazlauskas Acked-by: Alex Hung

[PATCH AUTOSEL 6.1 39/47] drm/amd/display: Exit idle optimizations before attempt to access PHY

2023-08-13 Thread Sasha Levin
From: Leo Chen [ Upstream commit de612738e9771bd66aeb20044486c457c512f684 ] [Why & How] DMUB may hang when powering down pixel clocks due to no dprefclk. It is fixed by exiting idle optimization before the attempt to access PHY. Reviewed-by: Nicholas Kazlauskas Acked-by: Alex Hung

[PATCH AUTOSEL 6.1 38/47] drm/amd/display: Guard DCN31 PHYD32CLK logic against chip family

2023-08-13 Thread Sasha Levin
From: George Shen [ Upstream commit 25b054c3c89cb6a7106a7982f0f70e83d0797dab ] [Why] Current yellow carp B0 PHYD32CLK logic is incorrectly applied to other ASICs. [How] Add guard to check chip family is yellow carp before applying logic. Reviewed-by: Hansen Dsouza Acked-by: Alex Hung

[PATCH AUTOSEL 6.1 37/47] drm/amd/smu: use AverageGfxclkFrequency* to replace previous GFX Curr Clock

2023-08-13 Thread Sasha Levin
From: Jane Jian [ Upstream commit 4a37c55b859a69f429bfa7fab4fc43ee470b60ed ] Report current GFX clock also from average clock value as the original CurrClock data is not valid/accurate any more as per FW team Signed-off-by: Jane Jian Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher

[PATCH AUTOSEL 6.4 43/54] drm/amd/display: Guard DCN31 PHYD32CLK logic against chip family

2023-08-13 Thread Sasha Levin
From: George Shen [ Upstream commit 25b054c3c89cb6a7106a7982f0f70e83d0797dab ] [Why] Current yellow carp B0 PHYD32CLK logic is incorrectly applied to other ASICs. [How] Add guard to check chip family is yellow carp before applying logic. Reviewed-by: Hansen Dsouza Acked-by: Alex Hung

[PATCH AUTOSEL 6.4 44/54] drm/amd/display: Exit idle optimizations before attempt to access PHY

2023-08-13 Thread Sasha Levin
From: Leo Chen [ Upstream commit de612738e9771bd66aeb20044486c457c512f684 ] [Why & How] DMUB may hang when powering down pixel clocks due to no dprefclk. It is fixed by exiting idle optimization before the attempt to access PHY. Reviewed-by: Nicholas Kazlauskas Acked-by: Alex Hung

[PATCH AUTOSEL 6.4 42/54] drm/amd/smu: use AverageGfxclkFrequency* to replace previous GFX Curr Clock

2023-08-13 Thread Sasha Levin
From: Jane Jian [ Upstream commit 4a37c55b859a69f429bfa7fab4fc43ee470b60ed ] Report current GFX clock also from average clock value as the original CurrClock data is not valid/accurate any more as per FW team Signed-off-by: Jane Jian Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher

[PATCH] drm/amd/display: Replace ternary operator with min() in 'dm_helpers_parse_edid_caps'

2023-08-13 Thread Srinivasan Shanmugam
Fixes the following coccicheck: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c:120:41-42: WARNING opportunity for min() Cc: Harry Wentland Cc: Rodrigo Siqueira Cc: Aurabindo Pillai Cc: Alex Deucher Signed-off-by: Srinivasan Shanmugam ---

[PATCH] drm/amd/display: Fix unnecessary conversion to bool in 'amdgpu_dm_setup_replay'

2023-08-13 Thread Srinivasan Shanmugam
Fixes the following coccicheck: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c:94:102-107: WARNING: conversion to bool not needed here drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_replay.c:102:72-77: WARNING: conversion to bool not needed here Cc: Bhawanpreet Lakha Cc: Harry