[Public]
> -Original Message-
> From: Imre Deak
> Sent: Saturday, September 9, 2023 3:18 AM
> To: Lin, Wayne
> Cc: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org;
> ly...@redhat.com; jani.nik...@intel.com; ville.syrj...@linux.intel.com;
> Wentland, Harry ; Zuo, Jerry
>
>
Am 08.09.23 um 21:30 schrieb Felix Kuehling:
On 2023-09-05 02:04, Christian König wrote:
Move the SDMA workaround necessary for Navi 1x into a higher layer.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 48 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h |
When amdgpu_device_suspend() is called processes should be frozen
already. In other words KFD queues etc... should already be idle.
So when the eviction fails here we missed something previously and that
in turn can cause tons amount of problems.
So ignoring those errors is most likely not a
From: Michel Dänzer
It was only checking planes which had any state changes in the same
commit. However, it also needs to check other enabled planes.
Not doing this meant that a commit might spuriously "succeed", resulting
in the cursor plane displaying with incorrect scaling. See
https://gitlab
On 09/11/ , Alex Deucher wrote:
> Implement support for remapping the HDP aperture registers for
> NBIO 7.11.
>
> Signed-off-by: Alex Deucher
The series is.
Reviewed-by: Lang Yu
> ---
> drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a
On Tue, Sep 12, 2023 at 07:26:29AM +, Lin, Wayne wrote:
> [Public]
> [...]
> >
> > I'd like to be sure that the payload is removed with the size it was added
> > with
> > in the previous commit and as I wrote above not depend for this on the new
> > payload state with a mixture of old/current/
There are cases where HSA is not initialized when adding queues and
the ADD_QUEUE API should clear the MES process context instead of
SET_SHADER_DEBUGGER.
The only time ADD_QUEUE.skip_process_ctx_clear is required is for
debugger use cases and a debugged process is always runtime enabled
when addi
[Public]
+ Eric
> -Original Message-
> From: Kim, Jonathan
> Sent: Tuesday, September 12, 2023 8:17 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Ji, Ruili ; Guo, Shikai ;
> jinhuierichu...@amd.com; Kuehling, Felix ; Kim,
> Jonathan ; Guo, Shikai ;
> Kim, Jonathan
> Subject: [PATCH] drm/
On Sun, Sep 10, 2023 at 03:43:01PM -0500, Bryan Jennings wrote:
> This is also causing log spam on 5.15. It was included in 5.15.128 as
> commit 4921792e04f2125b5eadef9dbe9417a8354c7eff. I encountered this and
> found https://gitlab.freedesktop.org/drm/amd/-/issues/2820 while researching
> the pr
On 2023-09-12 3:49, Christian König wrote:
Am 08.09.23 um 21:30 schrieb Felix Kuehling:
On 2023-09-05 02:04, Christian König wrote:
Move the SDMA workaround necessary for Navi 1x into a higher layer.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 48 +++
On 9/5/2023 8:20 PM, Alex Deucher wrote:
On Mon, Sep 4, 2023 at 9:20 AM Lijo Lazar wrote:
pp_dpm_*clk nodes also could show the frequencies when a clock is in
'sleep' state. Add documentation related to that.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 10
On Tue, Sep 12, 2023 at 11:06 AM Lazar, Lijo wrote:
>
>
>
> On 9/5/2023 8:20 PM, Alex Deucher wrote:
> > On Mon, Sep 4, 2023 at 9:20 AM Lijo Lazar wrote:
> >>
> >> pp_dpm_*clk nodes also could show the frequencies when a clock is in
> >> 'sleep' state. Add documentation related to that.
> >>
> >>
On 2023-09-11 21:11, Felix Kuehling
wrote:
On
2023-09-11 15:55, Philip Yang wrote:
Otherwise GPU may access the stale mapping
and generate IOMMU
IO_PAGE_FAULT.
Move this to inside p->mutex to prev
Otherwise GPU may access the stale mapping and generate IOMMU
IO_PAGE_FAULT.
Move this to inside p->mutex to prevent multiple threads mapping and
unmapping concurrently race condition.
After kfd_mem_dmaunmap_attachment is removed from unmap_bo_from_gpuvm,
kfd_mem_dmaunmap_attachment is called if
From: Joshua Ashton
Implements the 'content type' property for HDMI connectors.
Verified by checking the avi infoframe on a connected TV.
This also simplifies a lot of the code in that area as well, there were
a lot of temp variables doing very little and unnecessary logic
that was quite confusi
Hi,
The first version of this series from Joshua [1] was accepted, but never
merged upstream.
During this time, Guilherme reported issues when performing GPU reset
that point to this work, and I identified the need to mark CRTC state for
reset when the property differs between states.
In this v2
From: Joshua Ashton
This was never filled in and thus never truly used.
Checking the EDID for content_type support is not required for sending
the avi infoframe packet.
v2:
- rebase to amd-staging-drm-next
Reviewed-by: Melissa Wen
Reviewed-by: Harry Wentland
Signed-off-by: Joshua Ashton
Sig
On Tue, Sep 12, 2023 at 12:02 PM Melissa Wen wrote:
>
> From: Joshua Ashton
>
> Implements the 'content type' property for HDMI connectors.
> Verified by checking the avi infoframe on a connected TV.
>
> This also simplifies a lot of the code in that area as well, there were
> a lot of temp varia
Add missing IP discovery info.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index a74ea53899f6..512eb3d8eaf1 100644
--- a/drivers/g
On 2023-09-12 11:29, Philip Yang wrote:
Otherwise GPU may access the stale mapping and generate IOMMU
IO_PAGE_FAULT.
Move this to inside p->mutex to prevent multiple threads mapping and
unmapping concurrently race condition.
After kfd_mem_dmaunmap_attachment is removed from unmap_bo_from_gpuvm,
On 2023-09-12 8:17, Jonathan Kim wrote:
There are cases where HSA is not initialized when adding queues
This statement doesn't make sense to me. If HSA is not initialized, it
means user mode hasn't opened the KFD device. So it can't create queues.
What do you really mean here?
Regards,
Fe
On 2023-09-11 22:52, Lang Yu wrote:
On 09/11/ , Harish Kasiviswanathan wrote:
Heavy-weight TLB flush is required after unmap on all GPUs for
correctness and security.
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 3 +--
1 file changed, 1 insertion(+), 2 de
[Public]
> -Original Message-
> From: Kuehling, Felix
> Sent: Tuesday, September 12, 2023 8:36 PM
> To: Kim, Jonathan ; amd-gfx@lists.freedesktop.org
> Cc: Ji, Ruili ; Guo, Shikai ;
> jinhuierichu...@amd.com
> Subject: Re: [PATCH] drm/amdkfd: fix add queue process context clear for hsa
>
On 2023-09-12 20:53, Kim, Jonathan wrote:
[Public]
-Original Message-
From: Kuehling, Felix
Sent: Tuesday, September 12, 2023 8:36 PM
To: Kim, Jonathan ; amd-gfx@lists.freedesktop.org
Cc: Ji, Ruili ; Guo, Shikai ;
jinhuierichu...@amd.com
Subject: Re: [PATCH] drm/amdkfd: fix add queue p
[Public]
> -Original Message-
> From: Kuehling, Felix
> Sent: Tuesday, September 12, 2023 9:01 PM
> To: Kim, Jonathan ; amd-gfx@lists.freedesktop.org
> Cc: Ji, Ruili ; Guo, Shikai ; Huang,
> JinHuiEric
> Subject: Re: [PATCH] drm/amdkfd: fix add queue process context clear for hsa
> non-i
There are cases where HSA runtime is not enabled through the
AMDKFD_IOC_RUNTIME_ENABLE call when adding queues and the MES ADD_QUEUE
API should clear the MES process context instead of SET_SHADER_DEBUGGER.
Such examples are legacy HSA runtime builds that do not support the
current exception handlin
[AMD Official Use Only - General]
I notice that only user space process are frozen on my side. kthread and
workqueue keeps running. Maybe some kernel configs are not enabled.
I made one module which just prints something like i++ with mutex lock both in
workqueue and kthread. I paste some logs
Include subrevision and variant fileds also to IP version.
Signed-off-by: Lijo Lazar
Reviewed-by: Alex Deucher
---
v2:
Use major/min/rev format in drm_amdgpu_info_hw_ip discovery version
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 18 -
drivers/gpu/drm/amd/amdgpu/am
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