Sharing code with other OSes is confusing and raises some questions.
This patch introduces some explanation about our upstream process with
the shared code.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgp
Introduce OPP as part of the kernel documentation.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 12
drivers/gpu/drm/amd/display/dc/inc/hw/opp.h | 16 +
This commit adds a contribution list for display under the kernel
documentation with some first suggestions. It also drops an old TODO
list from the display folder.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
.../amdgpu/disp
This commit adds a kernel-doc entry for the MPC block. Since it enabled
the kernel-doc to parse some of the documentation in the mpc.h file,
fixing some of the comments was required.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
--
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 12
.../gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h | 10 ++
2 files changed, 22 insertions(+)
diff
Create the HUBP documentation page and add the doc references to extract
the HUBP code documentation.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
.../gpu/amdgpu/display/dcn-blocks.rst | 18 ++
Docume
This commit introduces basic DPP information and the struct scan for
code documentation.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
.../gpu/amdgpu/display/dcn-blocks.rst | 12 +
drivers/gpu/drm/amd/display/d
This patchset improves how the AMDGPU display documentation is
organized, expands the kerne-doc to extract information from the source,
and adds more context about DC workflow. Finally, at the end of this
series, we also introduce a contribution session for those interested in
contributing with the
Enable the documentation to extract code documentation from dchubbub.h
file.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 12
drivers/gpu/drm/amd/display/dc/inc/
On 2023-10-20 17:53, Xiaogang.Chen
wrote:
From: Xiaogang Chen
After partial migration to recover GPU page fault this patch does GPU vm
space mapping for same page range that got migrated intead of mapping all
pages of svm range in which the page fault happe
From: Xiaogang Chen
After partial migration to recover GPU page fault this patch does GPU vm
space mapping for same page range that got migrated intead of mapping all
pages of svm range in which the page fault happened.
Signed-off-by: Xiaogang Chen
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 29
On 10/20/23 15:38, Harry Wentland wrote:
On 2023-10-20 17:26, Rodrigo Siqueira wrote:
The first commit of this series just sets the variable using_dml2 to
false for all ASICs that do not require it. The second commit adds a fix
to the DC sequence that calls a DML2 operation in ASICs that does
On 2023-10-20 17:26, Rodrigo Siqueira wrote:
> The first commit of this series just sets the variable using_dml2 to
> false for all ASICs that do not require it. The second commit adds a fix
> to the DC sequence that calls a DML2 operation in ASICs that does not
> use it.
>
> Cc: Vitaly Prosyak
>
When DML2 was introduced, it targeted only new DCN versions. For
controlling which ASIC should use this new version of DML, it was
introduced the using_dml2 attribute. To avoid ambiguities, this commit
explicitly sets using_dml2 to false in all ASICs that do not support
DML2.
Cc: Vitaly Prosyak
C
When DML 2 was introduced, it changed part of the generic sequence of
DC, which caused issues on previous DCNs with DMUB support. This commit
ensures the new sequence only works for new DCNs from 3.5 and above.
Changes since V1:
- Harry: Use the attribute using_dml2 instead of check the DCN versio
The first commit of this series just sets the variable using_dml2 to
false for all ASICs that do not require it. The second commit adds a fix
to the DC sequence that calls a DML2 operation in ASICs that does not
use it.
Cc: Vitaly Prosyak
Cc: Roman Li
Cc: Qingqing Zhuo
Cc: Daniel Wheeler
Cc: A
Hi Dave, Sima,
More updates for 6.7. Mostly bug fixes.
The following changes since commit 27442758e9b4e083bef3f164a1739475c01f3202:
Merge tag 'amd-drm-next-6.7-2023-10-13' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2023-10-18 16:08:07
+1000)
are available in the Git repos
On 2023-10-20 09:10, Christian König wrote:
No, the wait forever is what is expected and perfectly valid user
experience.
Waiting with a timeout on the other hand sounds like a really bad idea
to me.
Every wait with a timeout needs a justification, e.g. for example that
userspace explicit
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 2030579113a1b1b5bfd7ff24c0852847836d8fd1 Add linux-next specific
files for 20231020
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202309212121.cul1ptra-...@intel.com
https
On 2023-10-20 08:33, Christian König wrote:
Looks like the KFD still needs this.
Signed-off-by: Christian König
Fixes: 8abc1eb2987a ("drm/amdkfd: switch over to using drm_exec v3")
To fix the immediate problem, this patch is
Acked-by: Felix Kuehling
As I understand it, this reserves a fenc
[Public]
Hi all,
I verified that this fix solved both a GPU init error and a
hubbub2_get_dchub_ref_freq warning when re-enabling the amdgpu module.
Tested-by: Daniel Wheeler
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
---
On 2023-10-20 12:42, Rodrigo Siqueira wrote:
> When DML 2 was introduced, it changed part of the generic sequence of
> DC, which caused issues on previous DCNs with DMUB support. This commit
> ensures the new sequence only works for new DCNs from 3.5 and above.
>
> Cc: Vitaly Prosyak
> Cc: Rom
On 2023-10-20 14:06, Stylon Wang wrote:
> Many of the DC files have either incomplete or incorrect copyright
> notice. This patchset aims to address this and also make lives
> less difficult for those doing backport/upstream activities.
>
Series is
Reviewed-by: Harry Wentland
Harry
> Stylon
[Why & How]
Fix incomplete copyright notice in DC code.
Signed-off-by: Stylon Wang
---
.../drm/amd/display/dc/dcn303/dcn303_dccg.h | 18 ++
.../drm/amd/display/dc/dcn303/dcn303_init.c | 18 ++
.../drm/amd/display/dc/dcn303/dcn303_init.h | 18
[Why & How]
Fix incomplete copyright notice in DML2 code.
Signed-off-by: Stylon Wang
---
drivers/gpu/drm/amd/display/dc/dml2/Makefile | 4 +++-
drivers/gpu/drm/amd/display/dc/dml2/cmntypes.h| 2 ++
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 2
[Why & How]
Add missing/incomplete copyright notice in DMUB files
Signed-off-by: Stylon Wang
---
.../drm/amd/display/dmub/src/dmub_dcn303.c| 19 +++
.../drm/amd/display/dmub/src/dmub_dcn303.h| 19 +++
2 files changed, 38 insertions(+)
diff --git a/drivers
Many of the DC files have either incomplete or incorrect copyright
notice. This patchset aims to address this and also make lives
less difficult for those doing backport/upstream activities.
Stylon Wang (3):
drm/amd/display: Add missing copyright notice in DMUB
drm/amd/display: Fix copyright n
When DML 2 was introduced, it changed part of the generic sequence of
DC, which caused issues on previous DCNs with DMUB support. This commit
ensures the new sequence only works for new DCNs from 3.5 and above.
Cc: Vitaly Prosyak
Cc: Roman Li
Cc: Qingqing Zhuo
Cc: Daniel Wheeler
Cc: Alex Deuch
On Tue, Oct 17, 2023 at 9:22 PM Luben Tuikov wrote:
>
> Remove a redundant call to amdgpu_ctx_priority_is_valid() from
> amdgpu_ctx_priority_permit(), which is called from amdgpu_ctx_init() which is
> called from amdgpu_ctx_alloc() which is called from amdgpu_ctx_ioctl(), where
> we've called amdg
[Public]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Christian
König
Sent: Friday, October 20, 2023 8:33 AM
To: Shi, Leslie ; Kuehling, Felix
; amd-gfx@lists.freedesktop.org
Cc: Koenig, Christian
Subject: [PATCH] drm/amdkfd: reserve a fence slot while
PCI domain/segment information of xccs is available through ACPI DSM
methods. Consider that also while looking for devices.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 40 +---
1 file changed, 22 insertions(+), 18 deletions(-)
diff --git a/driver
Per the xgmi ta implementation, KGD needs to fill in node_ids
in concern into the shared command output buffer rather than the
command input buffer.
Input buffer is not used for GET_PEER_LINKS command execution.
In this way, xgmi ta can reuse the node info in the output buffer
just filled in and
XGMI TA will set the capability flag to indicate whether the port_num
info is supported or not. KGD checks the flag and accordingly picks up
the right buffer format and send the right command to TA to retrieve
the info.
v2: simplify the code by reusing the same statement (lijo)
Signed-off-by: Shi
Update the header file to the v20.00.00.13
v1: rename TA_COMMAND_XGMI__GET_GET_TOPOLOGY_INFO to
TA_COMMAND_XGMI__GET_TOPOLOGY_INFO
And also rename struct ta_xgmi_cmd_get_peer_link_info_output to
ta_xgmi_cmd_get_peer_link_info accordingly
v2: add structs to support xgmi GET_EXTEND_PEER_LINK comma
From: Xiaogang Chen
After partial migration to recover GPU page fault this patch does GPU vm
space mapping for same page range that got migrated instead of mapping all
pages of svm range in which the page fault happened.
Signed-off-by: Xiaogang Chen
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 27
Hello Qingqing Zhuo,
The patch 7966f319c66d: "drm/amd/display: Introduce DML2" from Jul
28, 2023 (linux-next), leads to the following Smatch static checker
warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml2_wrapper.c:77
map_hw_resources()
error: buffer overflow
'dml2->v20.scratch.dml_t
Hello Qingqing Zhuo,
The patch 7966f319c66d: "drm/amd/display: Introduce DML2" from Jul
28, 2023 (linux-next), leads to the following Smatch static checker
warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/display_mode_core.c:2748
TruncToValidBPP()
warn: inconsistent indenti
On Fri, Oct 20, 2023 at 4:32 AM Kenneth Feng wrote:
>
> fix the high voltage and temperature issue after the driver is unloaded on
> smu 13.0.0,
> smu 13.0.7 and smu 13.0.10
>
> Signed-off-by: Kenneth Feng
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 36 +++
> drivers
No, the wait forever is what is expected and perfectly valid user
experience.
Waiting with a timeout on the other hand sounds like a really bad idea
to me.
Every wait with a timeout needs a justification, e.g. for example that
userspace explicitly specified it. And I absolutely don't see tha
Looks like the KFD still needs this.
Signed-off-by: Christian König
Fixes: 8abc1eb2987a ("drm/amdkfd: switch over to using drm_exec v3")
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdk
Am 17.10.23 um 16:36 schrieb Stanley.Yang:
This is workaround, kiq ring test failed in suspend stage when do ras
recovery for gfx v9_4_3.
Any idea why that failed? Problems like this usually point to an
incorrect init or in this case re-init procedure and are actually what
the ring test shoul
[AMD Official Use Only - General]
Reviewed-by: Stanley.Yang
Regards,
Stanley
> -Original Message-
> From: amd-gfx On Behalf Of Tao
> Zhou
> Sent: Friday, October 20, 2023 6:26 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao
> Subject: [PATCH] drm/amdgpu: enable RAS poison mode
Enable it by default on APU platform.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 95c181cd1fea..a41cab0a2f9c 1006
Issue: Dead heappen during gpu recover, the call sequence as below:
amdgpu_device_gpu_recover->amdgpu_amdkfd_pre_reset->flush_delayed_work->
amdgpu_amdkfd_gpuvm_restore_process_bos->amdgpu_sync_wait
It is because the amdgpu_sync_wait is waiting for the bad job's fence, and
never return, so the re
Add error handling for amdgpu_sync_wait.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 6 +-
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_am
[AMD Official Use Only - General]
Reviewed-by: Asad Kamal
Thanks & Regards
Asad
-Original Message-
From: Zhang, Hawking
Sent: Friday, October 20, 2023 12:36 PM
To: Lazar, Lijo ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Kamal, Asad
; Ma, Le
Subject: RE: [PATCH] drm/amdgp
[AMD Official Use Only - General]
Ok, will send this as the first.
Emily Deng
Best Wishes
>-Original Message-
>From: Christian König
>Sent: Friday, October 20, 2023 3:30 PM
>To: Deng, Emily ; amd-gfx@lists.freedesktop.org
>Subject: Re: [PATCH 2/2] drm/amdgpu: handle the return for sync
[AMD Official Use Only - General]
Hi Christian,
The issue is running a compute hang with a quark and trigger a compute job
timeout. For compute, the timeout setting is 60s, but for gfx and sdma, it is
10s.
So, get the timeout from the sched is reasonable for different sched.
And if wait
fix the high voltage and temperature issue after the driver is unloaded on smu
13.0.0,
smu 13.0.7 and smu 13.0.10
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 36 +++
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c| 4 +--
drivers/gpu/drm/amd/p
Am 20.10.23 um 08:13 schrieb Emily Deng:
You need a patch description and this patch here needs to come first and
not second.
Christian.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 6
Am 20.10.23 um 08:13 schrieb Emily Deng:
Issue: Dead heappen during gpu recover, the call sequence as below:
amdgpu_device_gpu_recover->amdgpu_amdkfd_pre_reset->flush_delayed_work->
amdgpu_amdkfd_gpuvm_restore_process_bos->amdgpu_sync_wait
It is because the amdgpu_sync_wait is waiting for the b
[AMD Official Use Only - General]
Acked-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Friday, October 20, 2023 15:02
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Kamal, Asad ; Ma, Le
Subject: [PATCH] drm/amdgpu: Add a rea
[AMD Official Use Only - General]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Wang, Yang(Kevin)
Sent: Friday, October 20, 2023 15:00
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Zhou1, Tao ; Li,
Candice ; Chai, Thomas ; Wang,
Yang(Kevin)
Issue a read to confirm the register write before ringing doorbell. With
multiple XCCs there is chance for race condition.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/
refine ras error kernel log to avoid user-ridden ambiguity.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 116 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 5 +-
2 files changed, 82 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/
the origin function might return the wrong node.
Fixes: d479ef0d5fbd ("drm/amdgpu: add ras_err_info to identify RAS error
source")
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd
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