[AMD Official Use Only - General]
> The vmf_insert_pfn_prot could cause unnecessary double faults
> on a device pfn. Because currently the vmf_insert_pfn_prot does
> not make the pfn writable so the pte entry is normally
> read-only or dirty catching.
> >>>
[AMD Official Use Only - General]
>-Original Message-
>From: Kuehling, Felix
>Sent: Thursday, January 25, 2024 5:41 AM
>To: Yu, Lang ; amd-gfx@lists.freedesktop.org
>Cc: Francis, David
>Subject: Re: [PATCH v2] drm/amdkfd: reserve the BO before validating it
>
>On 2024-01-22 4:08, Lang
[AMD Official Use Only - General]
> From: Alex Deucher
> Sent: Thursday, January 25, 2024 11:24 PM
> To: Liang, Prike
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> ; Sharma, Deepak
>
> Subject: Re: [PATCH 1/2] drm/amdgpu: skip to program GFXDEC registers for
> PM abort case
>
> On
[AMD Official Use Only - General]
Acked-by: Feifei Xu
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Friday, January 19, 2024 3:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: update documentation on new chips
These have
On Wed, Jan 24, 2024 at 11:11 PM Prike Liang wrote:
>
> In the pm abort case the gfx power rail not turn off from FCH side and
> this will lead to the gfx reinitialized failed base on the unknown gfx
> HW status, so let's reset the gpu to a known good power state.
>
> Signed-off-by: Prike Liang
The TBA and TMA, along with an unused IB allocation, reside at low
addresses in the VM address space. A stray VM fault which hits these
pages must be serviced by making their page table entries invalid.
The scheduler depends upon these pages being resident and fails,
preventing a debugger from
Hi Dave, Sima,
Fixes for 6.8.
The following changes since commit b16702be210bb49256f8a32df2c310383134dd57:
Merge tag 'exynos-drm-fixes-for-v6.8-rc2' of
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-fixes
(2024-01-25 14:22:15 +1000)
are available in the Git
Ping?
On Thu, Jan 18, 2024 at 3:47 PM Alex Deucher wrote:
>
> These have been released now, so add them to the documentation.
>
> Signed-off-by: Alex Deucher
> ---
> Documentation/gpu/amdgpu/dgpu-asic-info-table.csv | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
[AMD Official Use Only - General]
Reviewed-by: Aurabindo Pillai
--
Regards,
Jay
From: Siqueira, Rodrigo
Sent: Thursday, January 25, 2024 1:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Siqueira, Rodrigo ; Lei, Jun ;
Pillai, Aurabindo ; Mahfooz, Hamza
;
On 2024-01-25 08:15, Lazar, Lijo wrote:
On 1/25/2024 1:37 PM, Le Ma wrote:
This patch is to eliminate interrupt warning below:
"[drm] Fence fallback timer expired on ring sdma0.0".
An early vm pt clearing job is sent to SDMA ahead of interrupt enabled,
introduced by patch below:
-
On 1/23/24 09:19, Hamza Mahfooz wrote:
On 1/22/24 16:24, Rodrigo Siqueira wrote:
This patchset improves how the AMDGPU display documentation is
organized, expands the kernel-doc to extract information from the
source, and adds more context about DC workflow. Finally, at the end of
this
Cc: Jun Lei
Cc: Aurabindo Pillai
Cc: Hamza Mahfooz
Cc: Harry Wentland
Cc: Alex Deucher
Signed-off-by: Rodrigo Siqueira
---
.../include/asic_reg/dcn/dcn_3_1_6_offset.h | 4 ++
.../include/asic_reg/dcn/dcn_3_1_6_sh_mask.h | 10 +++
.../include/asic_reg/dcn/dcn_3_5_0_offset.h | 24
[AMD Official Use Only - General]
Reviewed-by: Anthony Koo
Thanks,
Anthony
-Original Message-
From: SHANMUGAM, SRINIVASAN
Sent: Thursday, January 25, 2024 10:55 AM
To: Siqueira, Rodrigo ; Pillai, Aurabindo
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
; Wyatt Wood ; Koo,
From: Ma Jun
Fix the warning info below during mode1 reset.
[ +0.04] Call Trace:
[ +0.04]
[ +0.06] ? show_regs+0x6e/0x80
[ +0.11] ? __flush_work.isra.0+0x2e8/0x390
[ +0.05] ? __warn+0x91/0x150
[ +0.09] ? __flush_work.isra.0+0x2e8/0x390
[ +0.06] ?
The 'stream' pointer is used in dcn10_set_output_transfer_func() before
the check if 'stream' is NULL.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c:1892
dcn10_set_output_transfer_func() warn: variable dereferenced before check
'stream' (see line 1875)
On Thu, Jan 25, 2024 at 10:22 AM Alex Deucher wrote:
>
> On Wed, Jan 24, 2024 at 9:39 PM Liang, Prike wrote:
> >
> > [AMD Official Use Only - General]
> >
> > Hi, Alex
> > > -Original Message-
> > > From: Alex Deucher
> > > Sent: Wednesday, January 24, 2024 11:59 PM
> > > To: Liang,
On Wed, Jan 24, 2024 at 10:46 PM Prike Liang wrote:
>
> In the PM abort cases, the gfx power rail doesn't turn off so
> some GFXDEC registers/CSB can't reset to default vaule. In order
> to avoid unexpected problem now need skip to program GFXDEC registers
> and bypass issue CSB packet for PM
On Wed, Jan 24, 2024 at 9:39 PM Liang, Prike wrote:
>
> [AMD Official Use Only - General]
>
> Hi, Alex
> > -Original Message-
> > From: Alex Deucher
> > Sent: Wednesday, January 24, 2024 11:59 PM
> > To: Liang, Prike
> > Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
> > ;
Add a function to support defragmentation.
Signed-off-by: Arunpravin Paneer Selvam
Suggested-by: Matthew Auld
---
drivers/gpu/drm/drm_buddy.c | 48 -
1 file changed, 37 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_buddy.c
Add clear page support in vram memory region.
v1:(Christian)
- Dont handle clear page as TTM flag since when moving the BO back
in from GTT again we don't need that.
- Make a specialized version of amdgpu_fill_buffer() which only
clears the VRAM areas which are not already cleared
-
- Add tracking clear page feature.
- Driver should enable the DRM_BUDDY_CLEARED flag if it
successfully clears the blocks in the free path. On the otherhand,
DRM buddy marks each block as cleared.
- Track the available cleared pages size
- If driver requests cleared memory we prefer cleared
Am 24.01.24 um 12:04 schrieb Alistair Popple:
"Zhou, Xianrong" writes:
[AMD Official Use Only - General]
The vmf_insert_pfn_prot could cause unnecessary double faults on a
device pfn. Because currently the vmf_insert_pfn_prot does not
make the pfn writable so the pte entry is normally
On 1/25/2024 1:37 PM, Le Ma wrote:
> This patch is to eliminate interrupt warning below:
>
> "[drm] Fence fallback timer expired on ring sdma0.0".
>
> An early vm pt clearing job is sent to SDMA ahead of interrupt enabled,
> introduced by patch below:
>
> - drm/amdkfd: Export DMABufs
On 1/25/2024 8:52 AM, Prike Liang wrote:
> In the pm abort case the gfx power rail not turn off from FCH side and
> this will lead to the gfx reinitialized failed base on the unknown gfx
> HW status, so let's reset the gpu to a known good power state.
>
>From the description, this an APU only
On Wed, Jan 24, 2024 at 11:14:40AM -0300, André Almeida wrote:
> Hi Ville,
>
> Em 19/01/2024 15:25, Ville Syrjälä escreveu:
> > On Fri, Jan 19, 2024 at 03:12:35PM -0300, André Almeida wrote:
> >> AMD GPUs can do async flips with changes on more properties than just
> >> the FB ID, so implement a
"Zhou, Xianrong" writes:
> [AMD Official Use Only - General]
>
>> > The vmf_insert_pfn_prot could cause unnecessary double faults on a
>> > device pfn. Because currently the vmf_insert_pfn_prot does not
>> > make the pfn writable so the pte entry is normally read-only or
>> >
Hi, Ma Jun,
Normally, I would reply under the quoted text, but I will adjust to your
convention.
I have just discovered that your patch causes Ubuntu 22.04 LTS GNOME XWayland
session
to block at typing password and ENTER in the graphical logon screen (tested
several times).
After that, I
On 1/25/2024 2:20 PM, Ma Jun wrote:
> Replace the hard-coded numbers with macro definition
>
> Signed-off-by: Ma Jun
Reviewed-by: Lijo Lazar
Thanks,
Lijo
> ---
> v3:
> - Add new SMU_IH_INTERRUPT_* macros for smu, keeping the original
> macro definitions in sync with pmfw (kevin)
> ---
>
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Thursday, January 25, 2024 4:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Lazar, Lijo ; Feng, Kenneth ;
Deucher, Alexander ; Wang, Yang(Kevin)
; Ma, Jun
Subject:
Replace the hard-coded numbers with macro definition
Signed-off-by: Ma Jun
---
v3:
- Add new SMU_IH_INTERRUPT_* macros for smu, keeping the original
macro definitions in sync with pmfw (kevin)
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 10 +-
This patch is to eliminate interrupt warning below:
"[drm] Fence fallback timer expired on ring sdma0.0".
An early vm pt clearing job is sent to SDMA ahead of interrupt enabled,
introduced by patch below:
- drm/amdkfd: Export DMABufs from KFD using GEM handles
And re-locating the drm
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