[AMD Official Use Only - General]
Looks good to me.
Reviewed-by: Veerabadhran Gopalakrishnan
Regards,
Veera
-Original Message-
From: Jamadar, Saleemkhan
Sent: Thursday, February 1, 2024 5:29 PM
To: Ma, Li ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Gopalakrishnan,
Veerab
[AMD Official Use Only - General]
Reviewed-by: Yifan Zhang
Best Regards,
Yifan
-Original Message-
From: Ma, Li
Sent: Thursday, February 1, 2024 7:55 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Jamadar, Saleemkhan
; Gopalakrishnan, Veerabadhran (Veera)
; Zhang, Yifan
Some laptops ship an EDID in the BIOS encoded in the _DDC method that
differs than the EDID directly on the laptop panel for $REASONS.
This is the EDID that is used by the AMD Windows driver, and so sometimes
different results are found in different operating systems.
This series adds a new DRM h
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops. Drivers can call this
helper to attempt to fetch the EDID from the BIOS's ACPI _DDC method.
Signed-off-by: Mario Limonciello
---
v1->v2:
* Split code from previous amdgpu specific help
All of the selects on ACPI_VIDEO are unnecessary when DRM does the
select for ACPI_VIDEO as it provides a helper for acpi based EDID.
Signed-off-by: Mario Limonciello
---
v2->v3:
* new patch
---
drivers/gpu/drm/amd/amdgpu/Kconfig | 7 ---
drivers/gpu/drm/gma500/Kconfig | 6 --
drive
Rather than inventing a wrapper to acpi_video_get_edid() use the
one provided by drm. This fixes two problems:
1. A memory leak that the memory provided by the ACPI call was
never freed.
2. Validation of the BIOS provided blob.
Signed-off-by: Mario Limonciello
---
v1->v2:
* New patch
---
dri
The ACPI specification allows for an EDID to be up to 512 bytes but
the _DDC EDID fetching code will only try up to 256 bytes.
Modify the code to instead start at 512 bytes and work it's way
down instead.
As _DDC is now called up to 4 times on a machine debugging messages
are noisier than necessa
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops.
Attempt to fetch this EDID if it exists and prefer it over the EDID
that is provided by the panel.
Signed-off-by: Mario Limonciello
---
v2:
* Use drm helper which will run more validat
Call the 2nd level trap handler if the cwsr handler is entered with any
one of wave_start, wave_end, or trap_after_inst exceptions.
Signed-off-by: Laurent Morichetti
Tested-by: Lancelot Six
Reviewed-by: Jay Cornwall
---
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h | 2 +-
.../drm/amd/amdkf
In certain cooperative group dispatch scenarios the default SPI resource
allocation may cause reduced per-CU workgroup occupancy. Set
COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST=1 to mitigate soft hang
scenarions.
Suggested-by: Joseph Greathouse
Signed-off-by: Rajneesh Bhardwaj
---
drivers/gpu/drm/
Hi Sima,
Em 30/01/2024 07:56, Daniel Vetter escreveu:
On Sun, Jan 28, 2024 at 06:25:15PM -0300, André Almeida wrote:
AMD GPUs can do async flips with changes on more properties than just
the FB ID, so implement a custom check_async_props for AMD planes.
Allow amdgpu to do async flips with over
Hi Pekka,
Em 29/01/2024 05:49, Pekka Paalanen escreveu:
On Sun, 28 Jan 2024 18:25:13 -0300
André Almeida wrote:
Some hardware are more flexible on what they can flip asynchronously, so
rework the plane check so drivers can implement their own check, lifting
up some of the restrictions.
Signe
Hi Dave, Sima,
Fixes for 6.8.
The following changes since commit 41bccc98fb7931d63d03f326a746ac4d429c1dd3:
Linux 6.8-rc2 (2024-01-28 17:01:12 -0800)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.8-2024-02-01
for you to fetch c
The issue arises when the array 'adev->vcn.vcn_config' is accessed
before checking if the index 'adev->vcn.num_vcn_inst' is within the
bounds of the array.
The fix involves moving the bounds check before the array access. This
ensures that 'adev->vcn.num_vcn_inst' is within the bounds of the array
Update huge page mapping, ex 2MB address and size aligned, we alloc PTB
bo, and then free the PTB bo after updating PDE0 as PTE.
If fragment size >= parent_shift, don't alloc PT bo, because we will
update PDE entry, this will improve the huge page mapping update
by removing the extra PTB bo alloc
SVM migration unmap pages from GPU and then update mapping to GPU to
recover page fault. Currently unmap clears the PDE entry for range
length >= huge page and free PTB bo, update mapping to alloc new PT bo.
There is race bug that the freed entry bo maybe still on the pt_free
list, reused when upda
[AMD Official Use Only - General]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Liu, Shaoyun
Sent: Thursday, February 1, 2024 10:58 AM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: Only create mes event log debugfs when mes is
e
[AMD Official Use Only - General]
ping
-Original Message-
From: Liu, Shaoyun
Sent: Wednesday, January 31, 2024 9:26 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu: Only create mes event log debugfs when mes is
enabled
Skip the debugfs file creation f
[AMD Official Use Only - General]
Reviewed-by: Anthony Koo
Thanks,
Anthony
-Original Message-
From: SHANMUGAM, SRINIVASAN
Sent: Thursday, February 1, 2024 4:59 AM
To: Siqueira, Rodrigo ; Pillai, Aurabindo
; Koo, Anthony
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
; Sun,
[AMD Official Use Only - General]
Reviewed-by: Anthony Koo
Thanks,
Anthony
-Original Message-
From: SHANMUGAM, SRINIVASAN
Sent: Thursday, February 1, 2024 4:57 AM
To: Siqueira, Rodrigo ; Pillai, Aurabindo
; Koo, Anthony
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
; Sun,
On Fri, 12 Jan 2024, Alex Deucher wrote:
> On Wed, Jan 10, 2024 at 12:39 PM Jani Nikula wrote:
>>
>> This will trade the W=1 warning -Wformat-overflow to
>> -Wformat-truncation. This lets us enable -Wformat-overflow subsystem
>> wide.
>>
>> Cc: Alex Deucher
>> Cc: Christian König
>> Cc: Pan, Xi
On 2024-02-01 15:18:04 [+0300], Dan Carpenter wrote:
> Hello Sebastian Andrzej Siewior,
Hi Dan,
> The patch de5e73dc6baf: "drm/amd/display: Simplify the per-CPU
> usage." from Sep 21, 2023 (linux-next), leads to the following Smatch
> static checker warning:
Did I introduce that or has it been ma
On Thu, Feb 01, 2024 at 02:53:42PM +0100, Sebastian Andrzej Siewior wrote:
> On 2024-02-01 15:18:04 [+0300], Dan Carpenter wrote:
> > Hello Sebastian Andrzej Siewior,
> Hi Dan,
>
> > The patch de5e73dc6baf: "drm/amd/display: Simplify the per-CPU
> > usage." from Sep 21, 2023 (linux-next), leads to
Hello Sebastian Andrzej Siewior,
The patch de5e73dc6baf: "drm/amd/display: Simplify the per-CPU
usage." from Sep 21, 2023 (linux-next), leads to the following Smatch
static checker warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn30/dcn30_resource.c:2385
dcn30_resource_construct() w
Am 11.01.24 um 16:58 schrieb Alex Deucher:
Missing space.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
And sorry that this took so long. I'm still trying to catch up to my mails.
Christian.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
1 file changed, 1 insertion(+),
Am 31.01.24 um 18:14 schrieb Shashank Sharma:
This patch:
- Attaches the TLB flush fence to the PT objects being freed
- Adds a new ptr in VM to save this last TLB flush fence
- Adds a new lock in VM to prevent out-of-context update of saved
TLB flush fence
- Adds a new ptr in tlb_flush str
[AMD Official Use Only - General]
Acked-By: Saleemkhan Jamadar
-Original Message-
From: Ma, Li
Sent: Thursday, February 1, 2024 5:25 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Jamadar, Saleemkhan
; Gopalakrishnan, Veerabadhran (Veera)
; Zhang, Yifan ; Ma,
Li
Subje
A supplement to commit: 45fa6f32276f7ce571227f8368cf17378b804aa1
There is an irq warning of jpeg during resume in s2idle process. No irq enabled
in jpeg 4.0.5 resume.
Signed-off-by: Li Ma
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c | 9 -
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c | 10
In "u32 otg_inst = pipe_ctx->stream_res.tg->inst;"
pipe_ctx->stream_res.tg could be NULL, it is relying on the caller to
ensure the tg is not NULL.
Fixes: 474ac4a875ca ("drm/amd/display: Implement some asic specific abm call
backs.")
Cc: Yongqiang Sun
Cc: Anthony Koo
Cc: Rodrigo Siqueira
Cc: A
'panel_cntl' structure used to control the display panel could be null,
dereferencing it could lead to a null pointer access.
Fixes the below:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn21/dcn21_hwseq.c:269
dcn21_set_backlight_level() error: we previously assumed 'panel_cntl' could be
null
In the suspend abort cases, the gfx power rail doesn't turn off so
some GFXDEC registers/CSB can't reset to default value and at this
moment reinitialize GFXDEC/CSB will result in an unexpected error.
So let skip those program sequence for the suspend abort case.
Signed-off-by: Prike Liang
---
d
In the s3 suspend abort case some type of gfx9 power
rail not turn off from FCH side and this will put the
GPU in an unknown power status, so let's reset the gpu
to a known good power state before reinitialize gpu
device.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 22 +++
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