[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Zhou1, Tao
Sent: Thursday, July 18, 2024 1:39 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Li, Candice ;
Wang, Yang(Kevin) ; Yang, Stanley
[AMD Official Use Only - AMD Internal Distribution Only]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Jane Jian
Sent: Tuesday, July 16, 2024 15:59
To: Lazar, Lijo ; Chang, HaiJun ;
Zhao, Victor
Cc: amd-gfx@lists.freedesktop.org;
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Thursday, July 18, 2024 12:34 PM
> To: Chai, Thomas ; Zhou1, Tao ;
> amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Li, Candice
> ; Wang, Yang(Kevin) ; Yang,
> Stanley
> Subje
On 7/17/2024 6:02 PM, Felix Kuehling wrote:
On 2024-06-26 11:06, Xiaogang.Chen wrote:
From: Xiaogang Chen
When user adds new vm range that has overlapping with existing svm
pranges
current kfd creats a cloned pragne and split it, then replaces
original prange
by it. That destroy original
Add ip dump for sdma_v4_0 for devcoredump for all
instances of sdma.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 80 ++
1 file changed, 80 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4
*** BLURB HERE ***
Sunil Khatri (6):
drm/amdgpu: Add sdma_v7_0 ip dump for devcoredump
drm/amdgpu: add print support for sdma_v_7_0 ip_dump
drm/amdgpu: Add sdma_v4_0 ip dump for devcoredump
drm/amdgpu: add print support for sdma_v_4_0 ip_dump
drm/amdgpu: Add sdma_v4_4_2 ip dump for devco
Add ip dump for sdma_v7_0 for devcoredump for all
instances of sdma.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 91 ++
1 file changed, 91 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7
Add print support for ip dump for sdma_v_4_4_2 in
devcoredump.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
Add ip dump for sdma_v4_4_2 for devcoredump for all
instances of sdma.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 80
1 file changed, 80 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
b/drivers/gpu/drm/amd/amdgpu/sdm
Add print support for ip dump for sdma_v_4_0 in
devcoredump.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index f
Add print support for ip dump for sdma_v_7_0 in
devcoredump.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index 3
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: amd-gfx On Behalf Of Chai, Thomas
Sent: Thursday, July 18, 2024 11:35 AM
To: Zhou1, Tao ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Li, Candice ;
Wang, Yang(
[AMD Official Use Only - AMD Internal Distribution Only]
Only set eeprom table version in the beginning of amdgpu_ras_recovery_init is
not enough,
because the table version value is set to zero read from device eeprom table in
function amdgpu_ras_eeprom_init
due to no available eeprom info in a
Fixes the below with gcc W=1:
Function parameter or struct member 'pstate_keepout' not described in
'optc1_program_timing'
Cc: Tom Chung
Cc: Rodrigo Siqueira
Cc: Roman Li
Cc: Alex Hung
Cc: Aurabindo Pillai
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Srinivasan Shanmugam
---
drive
[AMD Official Use Only - AMD Internal Distribution Only]
Can you please try moving amdgpu_ras_set_eeprom_table_version to the beginning
of amdgpu_ras_recovery_init?
In such way, we don't need to invoke this function from both
amdgpu_ras_eeprom_max_record_count and amdgpu_ras_eeprom_init
Regard
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Zhou1, Tao
Sent: Thursday, July 18, 2024 10:57 AM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Li, Candice ;
Wang, Yang(Kevin) ; Yang, Stanle
[AMD Official Use Only - AMD Internal Distribution Only]
-
Best Regards,
Thomas
-Original Message-
From: Zhou1, Tao
Sent: Thursday, July 18, 2024 10:51 AM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Li, Candice ;
Wang, Yang(Kevin) ; Yang, Stanle
The eeprom table is empty before initializing,
set eeprom table version first before initializing.
Changed from V1:
Reuse amdgpu_ras_set_eeprom_table_version function
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 3 +++
1 file changed, 3 insertions(+)
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, July 17, 2024 4:16 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Li, Candice ; Wang, Yang(Kevin)
> ; Yang, Stanley ; Chai,
> Thomas
> Subje
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, July 17, 2024 4:16 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Li, Candice ; Wang, Yang(Kevin)
> ; Yang, Stanley ; Chai,
> Thomas
> Subje
[AMD Official Use Only - AMD Internal Distribution Only]
OK
-
Best Regards,
Thomas
-Original Message-
From: Zhang, Hawking
Sent: Wednesday, July 17, 2024 9:00 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Li, Candice ; Wang,
Yang(Kevin) ; Yang, S
On 2024-06-26 11:06, Xiaogang.Chen wrote:
From: Xiaogang Chen
When user adds new vm range that has overlapping with existing svm pranges
current kfd creats a cloned pragne and split it, then replaces original prange
by it. That destroy original prange locks and the cloned prange locks do not
On 2024-07-17 16:40, Alex Deucher wrote:
Add the irq source for bad opcodes.
Signed-off-by: Alex Deucher
Looks like all the error IRQ handlers return 0, which means the
interrupts will still get forwarded to KFD (which is good). The series is
Acked-by: Felix Kuehling
---
drivers/gp
On Thu, Jul 11, 2024 at 7:40 PM Venkata Narendra Kumar Gutta
wrote:
>
> ISP I2C bus device can't be enumerated via ACPI mechanism
> since it shares the memory map with the AMDGPU.
> So use the MFD mechanism for registering the ISP I2C device
> and add the required resources.
>
> Signed-off-by: Ven
For the bad opcode case, it will cause CP/ME hang.
The firmware will prevent the ME side from hanging by raising a bad opcode
interrupt.
And the driver needs to perform a vmid reset when receiving the interrupt.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 69 ++
From: Jesse Zhang
For the bad opcode case, it will cause CP/ME hang.
The firmware will prevent the ME side from hanging by raising a bad opcode
interrupt.
And the driver needs to perform a vmid reset when receiving the interrupt.
v2: update irq naming (drop priv) (Alex)
Signed-off-by: Jesse Zh
From: Jesse Zhang
For the bad opcode case, it will cause CP/ME hang.
The firmware will prevent the ME side from hanging by raising a bad opcode
interrupt.
And the driver needs to perform a vmid reset when receiving the interrupt.
v2: update irq naming (drop priv) (Alex)
Signed-off-by: Jesse Zh
From: Jesse Zhang
For the bad opcode case, it will cause CP/ME hang.
The firmware will prevent the ME side from hanging by raising a bad opcode
interrupt.
And the driver needs to perform a vmid reset when receiving the interrupt.
v2: update irq naming (drop priv) (Alex)
Signed-off-by: Jesse Zh
For the bad opcode case, it will cause CP/ME hang.
The firmware will prevent the ME side from hanging by raising a bad opcode
interrupt.
And the driver needs to perform a vmid reset when receiving the interrupt.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 65
Add the irq source for bad opcodes.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index ddda94e49db4..86d3fa7eef90 100644
--- a/drivers
Need to handle the interrupt enables for all pipes.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 44 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 50 +++--
2 files changed, 89 insertions(+), 5 deletions(-)
diff --git a/drivers
Need to handle the interrupt enables for all pipes.
v2: fix indexing (Jessie)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 130 -
1 file changed, 106 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/driver
Need to handle the interrupt enables for all pipes.
v2: fix indexing (Jessie)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 130 +
1 file changed, 109 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/driver
Need to handle the interrupt enables for all pipes.
v2: fix indexing (Jessie)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 134 -
1 file changed, 111 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/driver
It should work the same for compute as well as gfx.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index f384be0d1800..567f9196d6a0 100644
It should work the same for compute as well as gfx.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 2957702fca0c..c4002db6e569 100644
Based on gfx9.0 implementation.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 20ea6cb01edf..2ac398184e12 100644
-
It should work the same for compute as well as gfx.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index dcef39907449..554aae995f41 100644
It should work the same for compute as well as gfx.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index d84589137df9..5fbdef04c9aa 100644
---
It should work the same for compute as well as gfx.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 2929c8972ea7..d4e38edc9353 100644
---
It should work the same for compute as well as gfx.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index b4658c7db0e1..a1963e6c5cab 100644
---
On 2024-07-15 08:34, Philip Yang wrote:
Add atomic queue_refcount to struct bo_va, return -EBUSY to fail unmap
BO from the GPU if the bo_va queue_refcount is not zero.
Create queue to increase the bo_va queue_refcount, destroy queue to
decrease the bo_va queue_refcount, to ensure the queue buffe
On 2024-07-15 08:34, Philip Yang wrote:
Queue CWSR area maybe registered to GPU as svm memory, create queue to
ensure svm mapped to GPU with KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED flag.
Add queue_refcount to struct svm_range, to track queue CWSR area usage.
Because unmap mmu notifier callback r
Sorry, I see that this patch still doesn't propagate errors returned
from kfd_queue_releasre_buffers correctly. And the later patches in the
series don't seem to fix it either. See inline.
On 2024-07-15 08:34, Philip Yang wrote:
Add helper function kfd_queue_acquire_buffers to get queue wptr_b
On 2024-07-15 08:34, Philip Yang wrote:
Add helper function kfd_queue_acquire_buffers to get queue wptr_bo
reference from queue write_ptr if it is mapped to the KFD node with
expected size.
Move wptr_bo to structure queue_properties from struct queue as queue is
allocated after queue buffers a
On 2024-07-15 08:34, Philip Yang wrote:
Pass pointer reference to amdgpu_bo_unref to clear the correct pointer,
otherwise amdgpu_bo_unref clear the local variable, the original pointer
not set to NULL, this could cause use-after-free bug.
Signed-off-by: Philip Yang
Reviewed-by: Felix Kuehli
From: Aric Cyr
Signed-off-by: Aurabindo Pillai
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 272ae1bdc57f..4077c1ddb9c1 100644
dc/{dcn401,dcn303} are unused since the files in it got moved under their
respective new components location. Hence they are no longer necessary
Fixes: fb17441f8ce4 ("drm/amd/display: Refactor DCN3X into component folder")
Signed-off-by: Aurabindo Pillai
Reviewed-by: Leo Li
---
drivers/gpu/drm/
From: Joshua Aberback
[Why]
Some interface functions are defined in both the public and private HWSS
interfaces, which can lead to confusion and runtime issues, therefore
the duplicates should be eliminated.
[How]
- power_down should only be private, because it's only used within HWSS.
- update_
From: Dillon Varone
The disable fams2 operation was reworked, but some of the old code
remained. This commit removes the disable_fams2_drr from the
dml2_stream_parameters.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Dillon Varone
Signed-off-by: Aurabindo Pillai
---
.../amd/display/dc/dml2/d
From: Rodrigo Siqueira
Remove some old comments from DCN32/321.
Signed-off-by: Rodrigo Siqueira
Reviewed-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dml/dcn321/dcn321_fpu.c | 4 ++--
2 files changed, 4 insertions(+),
From: Alex Hung
[WHAT & HOW]
Functions dp_enable_link_phy and dp_disable_link_phy can pass link_res
without initializing hpo_dp_link_enc and it is necessary to check for
null before dereferencing.
This fixes 1 FORWARD_NULL issue reported by Coverity.
Fixes: abdcd93214 ("drm/amd/display: Check l
From: Alex Hung
[WHY & HOW]
dc_link_detect returns a boolean value which can be used to print debug
messages when it fails.
This fixes 1 CHECKED_RETURN issue reported by Coverity.
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/
From: Sung Joon Kim
[why]
When switching from extended to second display only
mode, the top remote sink is not removed while the top stream
itself is released. This causes DML to think there is no
DP2 output encoder because top remote sink does not match
with the second stream and disables DTBCLK
From: Gabe Teeger
[what & why]
System hang after s4 regression points to code change here.
Removing possible NULL dereference.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Aurabindo Pillai
Signed-off-by: Gabe Teeger
---
.
From: Ilya Bakoulin
[Why/How]
Need to identify which fast updates will update more than just the
address.
Reviewed-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
Signed-off-by: Ilya Bakoulin
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 25 +++-
drivers/gpu/drm/amd/displa
To distinguish between different soc with same DCN IP, use variants
starting with alphabets
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Aurabindo Pillai
---
.../drm/amd/display/dc/dml2/dml21/dml21_translation_helper.c| 2 +-
.../amd/display/dc/dml2/dml21/in
Use more accurate names to refer to the asic architecture.
dcn3 in DML actually refers to DCN32 and DCN321, so rename it to dcn32x
dcn4 refers to any DCN4x soc., and hence rename dcn4 to dcn4x
Reviewed-by: Rodrigo Siqueira
Signed-off-by: Aurabindo Pillai
Signed-off-by: Aurabindo Pillai
---
...
From: Hansen Dsouza
[why & how]
Add source select helpers based on DCCG spec
Reviewed-by: Daniel Miess
Signed-off-by: Aurabindo Pillai
Signed-off-by: Hansen Dsouza
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 324 ++
1 file changed, 324 insertions(+)
diff --git a/driv
From: Austin Zheng
[Why]
Even if the mode is not supported dml2_check_mode_supported() would still
return true.
This causes an unsupported mode to be programmed.
[How]
Check if the mode is supported or not and return the proper result.
Reviewed-by: Chaitanya Dhere
Signed-off-by: Aurabindo Pil
From: Ryan Seto
[Why]
Visual confirm was incorrect on dual monitor SubVP setup
[How]
Adjusted p_state assignment for dual monitor SubVP setup
Signed-off-by: Ryan Seto
Reviewed-by: Chaitanya Dhere
Signed-off-by: Aurabindo Pillai
---
.../dc/dml2/dml21/dml21_translation_helper.c | 13
From: Samson Tam
[Why]
EASF coefficients are programmed to RAM and then RAM selector is toggled.
ISHARP coefficients are programmed after so they will not be in the same
RAM block
[How]
Move ISHARP programming before EASF programming
Add flag if ISHARP coefficients are updated. If so, then
f
From: Hansen Dsouza
[why & how]
Add standard RCG helpers based on DCCG spec
Reviewed-by: Daniel Miess
Reviewed-by: Muhammad Ahmed
Signed-off-by: Aurabindo Pillai
Signed-off-by: Hansen Dsouza
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 307 ++
1 file changed, 307 inse
From: Rodrigo Siqueira
In the DML math_ceil2 function, there is one ASSERT if the significance
is equal to zero. However, significance might be equal to zero
sometimes, and this is not an issue for a ceil function, but the current
ASSERT will trigger warnings in those cases. This commit removes t
From: Revalla Hari Krishna
[Why]
To refactor HPO files
[How]
Moved hpo related files to specific hpo folder and
update Makefiles.
Reviewed-by: Martin Leung
Signed-off-by: Aurabindo Pillai
Signed-off-by: Revalla Hari Krishna
---
drivers/gpu/drm/amd/display/dc/dcn30/Makefile | 2 --
driv
From: Hansen Dsouza
[why & how]
Add private data types for better RCG control
Reviewed-by: Chris Park
Reviewed-by: Yihan Zhu
Signed-off-by: Aurabindo Pillai
Signed-off-by: Hansen Dsouza
---
.../amd/display/dc/dccg/dcn35/dcn35_dccg.c| 81 +++
1 file changed, 81 insertions
From: Sung Joon Kim
[why & how]
Need to make sure plane_state is initialized
before accessing its members.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
Reviewed-by: Xi (Alex) Liu
Signed-off-by: Aurabindo Pillai
Signed-off-by: Sung Joon Kim
---
drivers/gpu/drm/amd/displ
From: Dillon Varone
[WHY&HOW]
Hardmax message will be retired for dcn4, so this removes it.
Reviewed-by: Alvin Lee
Signed-off-by: Aurabindo Pillai
Signed-off-by: Dillon Varone
---
.../dc/clk_mgr/dcn401/dcn401_clk_mgr.c| 44 ++-
drivers/gpu/drm/amd/display/dc/core/dc.c
This DC patchset brings improvements in multiple areas. In summary, we have:
* bug fixes for SubVP, DML, SPL, DCCG, and various stability fixes
* more reorganization of code into corresponding sub components
* renaming certain variables in DML to better reflect their relevance.
Cc: Daniel Wheeler
On Thu, Nov 2, 2023 at 8:06 PM Alex Deucher wrote:
>
> On Thu, Nov 2, 2023 at 3:00 PM Hamza Mahfooz wrote:
> >
> > On 11/1/23 17:36, Alex Deucher wrote:
> > > On Wed, Nov 1, 2023 at 5:01 PM Hamza Mahfooz
> > > wrote:
> > >>
> > >> Without this fix the 5120x1440@240 timing of these monitors
> >
On 2024-07-15 08:39, Christian König wrote:
Hi Felix,
yes that is a perfectly expected consequence.
The last time we talked about it the problem to solve this was that
amdgpu_vm_sdma_prepare() couldn't read the fences from a resv object
which wasn't locked.
Why only amdgpu_vm_sdma_prepare
On 7/16/2024 3:34 PM, Matthew Auld wrote:
On 16/07/2024 10:50, Paneer Selvam, Arunpravin wrote:
Hi Matthew,
On 7/10/2024 6:20 PM, Matthew Auld wrote:
On 10/07/2024 07:03, Paneer Selvam, Arunpravin wrote:
Thanks Alex.
Hi Matthew,
Any comments?
Do we not pass the required address alignmen
As far as I know, yes.
Regards,
Christian.
Am 17.07.24 um 16:38 schrieb Paneer Selvam, Arunpravin:
Hi Christian,
Can we use the below combination flags to kick in hardware workaround
while pinning BO's for this specific hw generation.
if (place->flags & TTM_PL_FLAG_CONTIGUOUS) &&
(amdgpu_ip
Hi Christian,
Can we use the below combination flags to kick in hardware workaround
while pinning BO's for this specific hw generation.
if (place->flags & TTM_PL_FLAG_CONTIGUOUS) &&
(amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(12, 0, 0) ||
amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSIO
I think we can ignore this change, as it already exists in the below
commit of asdn.
commit b90c2f233397f40c757995b9c00f8c6e380c6913
Author: Alex Hung
Date: Thu Jun 27 17:38:16 2024 -0600
drm/amd/display: Check null pointers before using them
On 7/17/2024 8:10 AM, Srinivasan Shanmugam
[AMD Official Use Only - AMD Internal Distribution Only]
+static int umc_v12_0_expand_addr_to_bad_pages(struct amdgpu_device *adev,
+ uint64_t pa_addr, uint64_t *pfns, int len)
I would call this function as lookup_bad_pages_in_a_row, or something like that.
Anyway, the seri
[AMD Official Use Only - AMD Internal Distribution Only]
Shall we reuse amdgpu_ras_set_eeprom_table_version? We need to move the
function to the beginning of amdgpu_ras_recovery_init, something like this.
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Stanley.Yang
Sent:
The eeprom table is empty before initializing,
add get eeprom table version function according
UMC HWIP version before initializing eeprom table.
Signed-off-by: Stanley.Yang
---
.../gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c| 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-
On 7/16/2024 2:17 PM, Jane Jian wrote:
> For VCN/JPEG 4.0.3, use only the local addressing scheme.
>
> - Mask bit higher than AID0 range
>
> v2
> remain the case for mmhub use master XCC
>
> Signed-off-by: Jane Jian
This patch is
Reviewed-by: Lijo Lazar
Thanks,
Lijo
> ---
> dri
Well that approach was discussed before and seemed to be to complicated.
But I totally agree that the AMDGPU_GEM_CREATE_GFX12_DCC flag is a bad
idea. This isn't anything userspace should need to specify in the first
place.
All we need is a hardware workaround which kicks in all the time while
Split into 3 parts:
1. Convert soc physical address via ras ta.
2. Expand bad pages from soc physical address.
3. Dump bad address info.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c | 116 -
1 file changed, 77 insertions(+), 39 deletions(-)
diff
Remove unused code.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 29 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 86 -
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 5 --
4 files changed, 1
1. Use pa_pfn as the radix-tree key index to log
deferred error info.
2. Use local array to store expanded bad pages.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c | 14 ++
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c |
The vkms driver has a number of DRM_UT_* debugs, make them
controllable when CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg
that the module uses them.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/vkms/vkms_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/vkms/vkms_d
Invoke DYNDBG_CLASSMAP_PARAM to hook drm.debug (__drm_debug) to the
DRM_UT_* classmap, replacing the ad-hoc wiring previously doing it.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/drm_print.c | 8 ++--
include/drm/drm_print.h | 6 --
2 files changed, 6 insertions(+), 8 deletions(-)
When a dyndbg classname is unknown to a kernel module (as before
previous patch), the callsite is un-addressable via >control queries.
The control-file displays this condition as "class unknown,"
currently. That spelling is sub-optimal/too-generic, so change it to
"class:_UNKNOWN_" to loudly anno
Invoke DRM_CLASSMAP_USE from xe_drm_client.c. When built with
CONFIG_DRM_USE_DYNAMIC_DEBUG=y, this tells dydnbg that Xe uses
has drm.debug calls.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/xe/xe_drm_client.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_drm_clie
Since commit
85f7f6c0edb8 ("dynamic_debug: process multiple debug-queries on a line")
Multi-query commands have been allowed:
modprobe drm dyndbg="class DRM_UT_CORE +p; class DRM_UT_KMS +p"
modprobe drm dyndbg=<
[ 203.902703] dyndbg: query parse failed
[ 203.902871] dyndbg: processed 2 quer
This new test-fn runs 3 module/submodule modprobe scenarios, variously
using both the generic dyndbg= modprobe arg, and the
test-module's classmap-params to manipulate the test-mod*'s pr_debugs.
In all cases, the current flag-settings are counted and tested vs
expectations.
The 3rd scenario recapi
Remove the '-v' arg from the tests in test_mod_submod().
Setting V=1 in the environment turns it back on, for all tests.
Signed-off-by: Jim Cromie
---
.../dynamic_debug/dyndbg_selftest.sh | 23 +--
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/tools/tes
In ddebug_apply_class_bitmap(), check for actual changes to the bits
before announcing them, to declutter logs.
no functional change.
Signed-off-by: Jim Cromie
---
lib/dynamic_debug.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/lib/dynamic_debug.c b/lib/dyna
Treat comma as a token terminator, just like a space. This allows a
user to avoid quoting hassles when spaces are otherwise needed:
:#> modprobe drm dyndbg=class,DRM_UT_CORE,+p\;class,DRM_UT_KMS,+p
or as a boot arg:
drm.dyndbg=class,DRM_UT_CORE,+p # todo: support multi-query here
Given the
When writing queries to >control, flags are parsed 1st, since they are
the only required field. So if the flags draw an error, then keyword
errors aren't reported. This can be mildly confusing/annoying, so
explain it instead.
This note could be moved up to just after the grammar id's the flags,
radeon has some DRM_UT_* debugs, make them controllable when
CONFIG_DRM_USE_DYNAMIC_DEBUG=y by telling dyndbg about its use of
the class'd debugs.
Signed-off-by: Jim Cromie
---
drivers/gpu/drm/radeon/radeon_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/radeon/radeon
Add mention of comma and percent delimiters into the respective
paragraphs describing their equivalents: space and newline.
Signed-off-by: Jim Cromie
---
.../admin-guide/dynamic-debug-howto.rst| 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/Documen
DECLARE_DYNDBG_CLASSMAP() has a design error; its usage fails a basic
K&R rule: "define once, refer many times".
It is used across DRM core & drivers, each use re-defines the classmap
understood by that module; and all must match for the modules to
respond together when DRM.debug categories are en
reword the classmaps-api section to better explain how it supports
DRM, and (a little bit) to steer clear of designated-inits in the
_DEFINE description.
probably just squash this back in
Signed-off-by: Jim Cromie
---
.../admin-guide/dynamic-debug-howto.rst | 64 +++
1 fil
Signed-off-by: Masatake YAMATO
---
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
index 06d787385ad4..27188dadfbcf 100644
--- a/drivers/gpu/drm/am
Add a selftest script for dynamic-debug. The config requires
CONFIG_TEST_DYNAMIC_DEBUG=m (and CONFIG_TEST_DYNAMIC_DEBUG_SUBMOD=m),
which tacitly requires either CONFIG_DYNAMIC_DEBUG=y or
CONFIG_DYNAMIC_DEBUG_CORE=y
ATM this has just basic_tests(), it modifies pr_debug flags in a few
builtins (ini
Remove the NAMED class types; these 2 classmap types accept class
names at the PARAM interface, for example:
echo +DRM_UT_CORE,-DRM_UT_KMS > /sys/module/drm/parameters/debug_names
The code works, but its only used by test-dynamic-debug, and wasn't
asked for by anyone else, so reduce test-surfac
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