[Public]
> From: Koenig, Christian
> Sent: Wednesday, April 30, 2025 7:58 PM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
>
> Subject: Re: [PATCH v3 3/5] drm/amdgpu: fix the eviction fence dereference
>
> On 4/30/25 04:40, Prike Liang wrote:
> >
[Public]
> From: Koenig, Christian
> Sent: Wednesday, April 30, 2025 7:57 PM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: Re: [PATCH v3 2/5] drm/amdgpu: don't sync the user queue eviction
> fence
>
> On 4/30/25 04:40, Prike Liang wrote:
> > Don't return
From: Philip Yang
[ Upstream commit 1b9366c601039d60546794c63fbb83ce8e53b978 ]
If waiting for gpu reset done in KFD release_work, thers is WARNING:
possible circular locking dependency detected
#2 kfd_create_process
kfd_process_mutex
flush kfd release work
#1 kfd releas
From: Tom Chung
[ Upstream commit d8c782cac5007e68e7484d420168f12d3490def6 ]
[Why & How]
The initial setting for psr_version is not correct while
create a virtual link.
The default psr_version should be DC_PSR_VERSION_UNSUPPORTED.
Reviewed-by: Roman Li
Signed-off-by: Tom Chung
Signed-off-by:
From: Charlene Liu
[ Upstream commit 23ef388a84c72b0614a6c10f866ffeac7e807719 ]
[why]
failed due to cmdtable not created.
switch atombios cmdtable as default.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Zaeem Mohamed
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deuche
From: Philip Yang
[ Upstream commit 1b9366c601039d60546794c63fbb83ce8e53b978 ]
If waiting for gpu reset done in KFD release_work, thers is WARNING:
possible circular locking dependency detected
#2 kfd_create_process
kfd_process_mutex
flush kfd release work
#1 kfd releas
From: Victor Lu
[ Upstream commit 057fef20b8401110a7bc1c2fe9d804a8a0bf0d24 ]
SRIOV VF does not have write access to AGP BAR regs.
Skip the writes to avoid a dmesg warning.
Signed-off-by: Victor Lu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu
From: Tom Chung
[ Upstream commit d8c782cac5007e68e7484d420168f12d3490def6 ]
[Why & How]
The initial setting for psr_version is not correct while
create a virtual link.
The default psr_version should be DC_PSR_VERSION_UNSUPPORTED.
Reviewed-by: Roman Li
Signed-off-by: Tom Chung
Signed-off-by:
From: Jiang Liu
[ Upstream commit e92f3f94cad24154fd3baae30c6dfb918492278d ]
Reset psp->cmd to NULL after releasing the buffer in function psp_sw_fini().
Reviewed-by: Lijo Lazar
Signed-off-by: Jiang Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/a
From: Charlene Liu
[ Upstream commit 23ef388a84c72b0614a6c10f866ffeac7e807719 ]
[why]
failed due to cmdtable not created.
switch atombios cmdtable as default.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Zaeem Mohamed
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deuche
From: Yihan Zhu
[ Upstream commit 02a940da2ccc0cc0299811379580852b405a0ea2 ]
[WHY]
If max_downscale_src_width check fails, we exit early from TAP calculation and
left a NULL
value to the scaling data structure to cause the zero divide in the DML
validation.
[HOW]
Call set default TAP calculat
From: Philip Yang
[ Upstream commit 1b9366c601039d60546794c63fbb83ce8e53b978 ]
If waiting for gpu reset done in KFD release_work, thers is WARNING:
possible circular locking dependency detected
#2 kfd_create_process
kfd_process_mutex
flush kfd release work
#1 kfd releas
From: Victor Lu
[ Upstream commit 057fef20b8401110a7bc1c2fe9d804a8a0bf0d24 ]
SRIOV VF does not have write access to AGP BAR regs.
Skip the writes to avoid a dmesg warning.
Signed-off-by: Victor Lu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu
From: Alex Deucher
[ Upstream commit 33da70bd1e115d7d73f45fb1c09f5ecc448f3f13 ]
DC supports SW i2c as well. Drop the check.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 ins
From: Shiwu Zhang
[ Upstream commit 667b96134c9e206aebe40985650bf478935cbe04 ]
Some chips have a larger VBIOS file so raise the size limit to support
the flashing tool.
Signed-off-by: Shiwu Zhang
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/
From: Tom Chung
[ Upstream commit d8c782cac5007e68e7484d420168f12d3490def6 ]
[Why & How]
The initial setting for psr_version is not correct while
create a virtual link.
The default psr_version should be DC_PSR_VERSION_UNSUPPORTED.
Reviewed-by: Roman Li
Signed-off-by: Tom Chung
Signed-off-by:
From: Jiang Liu
[ Upstream commit e92f3f94cad24154fd3baae30c6dfb918492278d ]
Reset psp->cmd to NULL after releasing the buffer in function psp_sw_fini().
Reviewed-by: Lijo Lazar
Signed-off-by: Jiang Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/a
From: Charlene Liu
[ Upstream commit 23ef388a84c72b0614a6c10f866ffeac7e807719 ]
[why]
failed due to cmdtable not created.
switch atombios cmdtable as default.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Zaeem Mohamed
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deuche
From: Yihan Zhu
[ Upstream commit 02a940da2ccc0cc0299811379580852b405a0ea2 ]
[WHY]
If max_downscale_src_width check fails, we exit early from TAP calculation and
left a NULL
value to the scaling data structure to cause the zero divide in the DML
validation.
[HOW]
Call set default TAP calculat
From: Philip Yang
[ Upstream commit 1b9366c601039d60546794c63fbb83ce8e53b978 ]
If waiting for gpu reset done in KFD release_work, thers is WARNING:
possible circular locking dependency detected
#2 kfd_create_process
kfd_process_mutex
flush kfd release work
#1 kfd releas
From: Victor Lu
[ Upstream commit 057fef20b8401110a7bc1c2fe9d804a8a0bf0d24 ]
SRIOV VF does not have write access to AGP BAR regs.
Skip the writes to avoid a dmesg warning.
Signed-off-by: Victor Lu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu
From: Zhikai Zhai
[ Upstream commit d3069feecdb5542604d29b59acfd1fd213bad95b ]
[WHY]
In some cases the remain de-tile buffer segments will be greater
than zero if we don't add the non-top pipe to calculate, at
this time the override de-tile buffer size will be valid and used.
But it makes the de
From: Jing Zhou
[ Upstream commit 9c2f4ae64bb6f6d83a54d88b9ee0f369cdbb9fa8 ]
[WHY]
We should never apply a minimum dispclk value while in
prepare_bandwidth or while displays are active. This is
always an optimizaiton for when all displays are disabled.
[HOW]
Defer dispclk optimization until saf
From: Alex Deucher
[ Upstream commit 33da70bd1e115d7d73f45fb1c09f5ecc448f3f13 ]
DC supports SW i2c as well. Drop the check.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 ins
From: Alex Deucher
[ Upstream commit 2ed83f2cc41e8f7ced1c0610ec2b0821c5522ed5 ]
Use the value pulled from the vbios just like newer chips.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../drm/amd/display/dc/dce120/dce120_resource.c | 17
From: Shiwu Zhang
[ Upstream commit 667b96134c9e206aebe40985650bf478935cbe04 ]
Some chips have a larger VBIOS file so raise the size limit to support
the flashing tool.
Signed-off-by: Shiwu Zhang
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/
From: Joshua Aberback
[ Upstream commit 3a7810c212bcf2f722671dadf4b23ff70a7d23ee ]
[Why]
It's possible to generate more than 50 steps in hwss_build_fast_sequence,
for example with a 6-pipe asic where all pipes are in one MPC chain. This
overflows the block_sequence buffer and corrupts block_sequ
From: Tom Chung
[ Upstream commit d8c782cac5007e68e7484d420168f12d3490def6 ]
[Why & How]
The initial setting for psr_version is not correct while
create a virtual link.
The default psr_version should be DC_PSR_VERSION_UNSUPPORTED.
Reviewed-by: Roman Li
Signed-off-by: Tom Chung
Signed-off-by:
From: George Shen
[ Upstream commit 6a7fde433231c18164c117592d3e18ced648ad58 ]
[Why]
DP spec updated to have the CR AUX RD interval match the EQ AUX RD
interval interpretation of DPCD Eh/0220Eh for 8b/10b non-LTTPR mode
and LTTPR transparent mode cases.
[How]
Update interpretation of DPCD 0
From: Jiang Liu
[ Upstream commit e92f3f94cad24154fd3baae30c6dfb918492278d ]
Reset psp->cmd to NULL after releasing the buffer in function psp_sw_fini().
Reviewed-by: Lijo Lazar
Signed-off-by: Jiang Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/a
From: Ilya Bakoulin
[ Upstream commit e8bffa52e0253cfd689813a620e64521256bc712 ]
[Why]
Setting link DPMS off in response to HPD disconnect creates AUX
transactions on a link that is supposed to be disconnected. This can
cause issues in some cases when the sink re-asserts HPD and expects
source t
From: Harish Kasiviswanathan
[ Upstream commit 3394b1f76d3f8adf695ceed350a5dae49003eb37 ]
SDMA writes has to probe invalidate RW lines. Set snoop bit in mmhub for
this to happen.
v2: Missed a few mmhub_v9_4. Added now.
v3: Calculate hub offset once since it doesn't change inside the loop
Mo
From: Harry VanZyllDeJong
[ Upstream commit 6571bef25fe48c642f7a69ccf7c3198b317c136a ]
[Why]
eDP may not be connected to the GPU on driver start causing
fail enumeration.
[How]
Move the virtual signal type check before the eDP connector
signal check.
Reviewed-by: Wenjing Liu
Signed-off-by: Ha
From: Charlene Liu
[ Upstream commit 23ef388a84c72b0614a6c10f866ffeac7e807719 ]
[why]
failed due to cmdtable not created.
switch atombios cmdtable as default.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Zaeem Mohamed
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deuche
From: Yihan Zhu
[ Upstream commit 02a940da2ccc0cc0299811379580852b405a0ea2 ]
[WHY]
If max_downscale_src_width check fails, we exit early from TAP calculation and
left a NULL
value to the scaling data structure to cause the zero divide in the DML
validation.
[HOW]
Call set default TAP calculat
From: Philip Yang
[ Upstream commit 1b9366c601039d60546794c63fbb83ce8e53b978 ]
If waiting for gpu reset done in KFD release_work, thers is WARNING:
possible circular locking dependency detected
#2 kfd_create_process
kfd_process_mutex
flush kfd release work
#1 kfd releas
From: George Shen
[ Upstream commit 0584bbcf0c53c133081100e4f4c9fe41e598d045 ]
[Why/How]
Certain PCON will clear the FRL_MODE bit despite supporting the link BW
indicated in the other bits.
Thus, skip checking the FRL_MODE bit when interpreting the
hdmi_encoded_link_bw struct.
Reviewed-by: Wen
From: Victor Lu
[ Upstream commit 057fef20b8401110a7bc1c2fe9d804a8a0bf0d24 ]
SRIOV VF does not have write access to AGP BAR regs.
Skip the writes to avoid a dmesg warning.
Signed-off-by: Victor Lu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu
From: Harish Kasiviswanathan
[ Upstream commit 289e68503a4533b014f8447e2af28ad44c92c221 ]
Set per-process static sh_mem config only once during process
initialization. Move all static changes from update_qpd() which is
called each time a queue is created to set_cache_memory_policy() which
is cal
From: Leon Huang
[ Upstream commit 0d9cabc8f591ea1cd97c071b853b75b155c13259 ]
[Why]
When switching between PSR/Replay,
the DPCD config of previous mode is not cleared,
resulting in unexpected behavior in TCON.
[How]
Initialize the DPCD in setup function
Reviewed-by: Robin Chen
Signed-off-by:
From: Zhikai Zhai
[ Upstream commit d3069feecdb5542604d29b59acfd1fd213bad95b ]
[WHY]
In some cases the remain de-tile buffer segments will be greater
than zero if we don't add the non-top pipe to calculate, at
this time the override de-tile buffer size will be valid and used.
But it makes the de
From: Charlene Liu
[ Upstream commit 756e58e83e89d372b94269c0cde61fe55da76947 ]
[why & how]
1. apply oem panel timing (not only on OLED)
2. remove MIN_DPP_DISP_CLK request in driver.
This fix will apply for dcn31x but not
sync with DML's output.
Reviewed-by: Ovidiu Bunea
Signed-off-by: Charle
From: David Rosca
[ Upstream commit 19478f2011f8b53dee401c91423c4e0b73753e4f ]
There have been multiple fixes to the video caps that are missing for
SRIOV. Update the SRIOV caps with correct values.
Signed-off-by: David Rosca
Acked-by: Alex Deucher
Reviewed-by: Ruijing Dong
Signed-off-by: Al
From: Jing Zhou
[ Upstream commit 9c2f4ae64bb6f6d83a54d88b9ee0f369cdbb9fa8 ]
[WHY]
We should never apply a minimum dispclk value while in
prepare_bandwidth or while displays are active. This is
always an optimizaiton for when all displays are disabled.
[HOW]
Defer dispclk optimization until saf
From: Alex Deucher
[ Upstream commit 33da70bd1e115d7d73f45fb1c09f5ecc448f3f13 ]
DC supports SW i2c as well. Drop the check.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 ins
From: Alex Deucher
[ Upstream commit 2ed83f2cc41e8f7ced1c0610ec2b0821c5522ed5 ]
Use the value pulled from the vbios just like newer chips.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../dc/resource/dce120/dce120_resource.c| 17
From: Shiwu Zhang
[ Upstream commit 667b96134c9e206aebe40985650bf478935cbe04 ]
Some chips have a larger VBIOS file so raise the size limit to support
the flashing tool.
Signed-off-by: Shiwu Zhang
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/
From: Lijo Lazar
[ Upstream commit f7a594e40517fa2ab25d5ca10e7b6a158f529fb5 ]
There could be configs where some UMC instances are harvested. This
information is obtained through discovery data and populated in
umc.active_mask. Avoid reassigning this as AID mask, instead use the
mask directly whi
From: Dillon Varone
[ Upstream commit 5f0d1ef6f16e150ee46cc00b8d233d9d271fe39e ]
[WHY&HOW]
Address was not previously populated which can result in incorrect
clock frequencies being read on boot.
Reviewed-by: Alvin Lee
Signed-off-by: Dillon Varone
Signed-off-by: Wayne Lin
Tested-by: Daniel W
From: Austin Zheng
[ Upstream commit 41df56b1fc24cc36fffb10e437385b3a49fbb5e2 ]
[Why/How]
vBlank used to determine the max vStartup is based on the smallest between
the vblank provided by the timing and vblank in ip_caps.
Extra vblank time is not considered if the vblank provided by the timing e
From: Joshua Aberback
[ Upstream commit 3a7810c212bcf2f722671dadf4b23ff70a7d23ee ]
[Why]
It's possible to generate more than 50 steps in hwss_build_fast_sequence,
for example with a 6-pipe asic where all pipes are in one MPC chain. This
overflows the block_sequence buffer and corrupts block_sequ
From: Tom Chung
[ Upstream commit d8c782cac5007e68e7484d420168f12d3490def6 ]
[Why & How]
The initial setting for psr_version is not correct while
create a virtual link.
The default psr_version should be DC_PSR_VERSION_UNSUPPORTED.
Reviewed-by: Roman Li
Signed-off-by: Tom Chung
Signed-off-by:
From: George Shen
[ Upstream commit 6a7fde433231c18164c117592d3e18ced648ad58 ]
[Why]
DP spec updated to have the CR AUX RD interval match the EQ AUX RD
interval interpretation of DPCD Eh/0220Eh for 8b/10b non-LTTPR mode
and LTTPR transparent mode cases.
[How]
Update interpretation of DPCD 0
From: Brandon Syu
[ Upstream commit be704e5ef4bd66dee9bb3f876964327e3a247d31 ]
This reverts commit de612738e9771bd66aeb20044486c457c512f684.
Reason to revert: screen flashes or gray screen appeared half of the
screen after resume from S4/S5.
Reviewed-by: Charlene Liu
Signed-off-by: Brandon Sy
From: Martin Tsai
[ Upstream commit 3a5fa55455db6a11248a25f24570c365f9246144 ]
[WHY]
Some panels may not handle idle pattern properly during PSR entry.
[HOW]
Add a condition to allow multiple options on power down
sequence during PSR1 entry.
Reviewed-by: Anthony Koo
Signed-off-by: Martin Tsai
From: Asad Kamal
[ Upstream commit 1fb85819d629676f1d53f40c3fffa25a33a881e4 ]
Skip P2S table load for SMU v13.0.12
Signed-off-by: Asad Kamal
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 5 +++--
1
From: Jiang Liu
[ Upstream commit e92f3f94cad24154fd3baae30c6dfb918492278d ]
Reset psp->cmd to NULL after releasing the buffer in function psp_sw_fini().
Reviewed-by: Lijo Lazar
Signed-off-by: Jiang Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/a
From: Ilya Bakoulin
[ Upstream commit e8bffa52e0253cfd689813a620e64521256bc712 ]
[Why]
Setting link DPMS off in response to HPD disconnect creates AUX
transactions on a link that is supposed to be disconnected. This can
cause issues in some cases when the sink re-asserts HPD and expects
source t
From: Charlene Liu
[ Upstream commit b40d022ec06ade9f6c809091dc188422a0f0946d ]
[why]
currently dml2 is using a hard coded 16 to convert memclk to dram_speed_mts.
for apu, this depends on wck_ratio.
change to pass the already calculated dram_speed_mts from fpu to dml2.
v2: use existing calcula
From: Harish Kasiviswanathan
[ Upstream commit 3394b1f76d3f8adf695ceed350a5dae49003eb37 ]
SDMA writes has to probe invalidate RW lines. Set snoop bit in mmhub for
this to happen.
v2: Missed a few mmhub_v9_4. Added now.
v3: Calculate hub offset once since it doesn't change inside the loop
Mo
From: Eric Huang
[ Upstream commit 5ffd56822a7159917306d99f18fd15dfd7288f20 ]
In some ASICs L2 cache info may miss in kfd topology,
because the first bitmap may be empty, that means
the first cu may be inactive, so to find the first
active cu will solve the issue.
v2: Only find the first active
From: Alex Deucher
[ Upstream commit 1350dd3691b5f757a948e5b9895d62c422baeb90 ]
It's GPU page size not CPU page size. In most cases they
are the same, but not always. This can lead to overallocation
on systems with larger pages.
Cc: Srinivasan Shanmugam
Cc: Christian König
Reviewed-by: Chri
From: Harry Wentland
[ Upstream commit cbf4890c6f28fb1ad733e14613fbd33c2004bced ]
Don't try to operate on a drm_wb_connector as an amdgpu_dm_connector.
While dereferencing aconnector->base will "work" it's wrong and
might lead to unknown bad things. Just... don't.
Reviewed-by: Alex Hung
Signed
From: Leo Zeng
[ Upstream commit 8ae6dfc0b61b170cf13832d4cfe2a0c744e621a7 ]
This reverts commit 13437c91606c9232c747475e202fe3827cd53264.
Reason to revert: idle power regression found in testing.
Reviewed-by: Dillon Varone
Signed-off-by: Leo Zeng
Signed-off-by: Roman Li
Tested-by: Daniel Wh
From: George Shen
[ Upstream commit de84d580126eb2214937df755cfec5ef0901479e ]
[Why]
The latest DP spec requires the DP TX to read DPCD Fh through F0009h
when detecting LTTPR capabilities for the first time.
[How]
Update LTTPR cap retrieval to read up to F0009h (two more bytes than the
prev
From: Ilya Bakoulin
[ Upstream commit 07bc2dcbcf403d47d6f305ef7f0d3d489491c5fb ]
[Why]
BT2020 YCbCr input is not handled properly when full range
quantization is used and limited range is not supported at all.
[How]
- Add enums for BT2020 YCbCr limited/full range
- Add limited range CSC matrix
From: Nicholas Kazlauskas
[ Upstream commit 72d7a7fa1f2404fd31c84a8f808b1b37021a3a9e ]
[Why]
We should never apply a minimum dispclk value while in prepare_bandwidth
or while displays are active. This is always an optimization for when
all displays are disabled.
[How]
Defer dispclk optimization
From: Harry VanZyllDeJong
[ Upstream commit 6571bef25fe48c642f7a69ccf7c3198b317c136a ]
[Why]
eDP may not be connected to the GPU on driver start causing
fail enumeration.
[How]
Move the virtual signal type check before the eDP connector
signal check.
Reviewed-by: Wenjing Liu
Signed-off-by: Ha
From: Lijo Lazar
[ Upstream commit b2a9e562dfa156bd53e62ce571f3f8f65d243f14 ]
On SMU v13.0.12, always query the firmware to get the current power
limit as it could be updated through other means also.
Signed-off-by: Lijo Lazar
Reviewed-by: Asad Kamal
Signed-off-by: Alex Deucher
Signed-off-by
From: Christian König
[ Upstream commit cb0de06d1b0afb2d0c600ad748069f5ce27730ec ]
Remove all KFD BOs from the private dma_resv object.
This prevents the KFD from being evict unecessarily when an exported BO
is released.
Signed-off-by: Christian König
Signed-off-by: James Zhu
Reviewed-by: Fe
From: "Assadian, Navid"
[ Upstream commit 26873260d394b1e33cdd720154aedf0af95327f9 ]
The mismatch type comparison/assignment may cause data loss. Since the
values are always non-negative, it is safe to use unsigned variables to
resolve the mismatch.
Signed-off-by: Navid Assadian
Reviewed-by: J
From: Charlene Liu
[ Upstream commit 23ef388a84c72b0614a6c10f866ffeac7e807719 ]
[why]
failed due to cmdtable not created.
switch atombios cmdtable as default.
Reviewed-by: Alvin Lee
Signed-off-by: Charlene Liu
Signed-off-by: Zaeem Mohamed
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deuche
From: Yihan Zhu
[ Upstream commit 02a940da2ccc0cc0299811379580852b405a0ea2 ]
[WHY]
If max_downscale_src_width check fails, we exit early from TAP calculation and
left a NULL
value to the scaling data structure to cause the zero divide in the DML
validation.
[HOW]
Call set default TAP calculat
From: Philip Yang
[ Upstream commit 1b9366c601039d60546794c63fbb83ce8e53b978 ]
If waiting for gpu reset done in KFD release_work, thers is WARNING:
possible circular locking dependency detected
#2 kfd_create_process
kfd_process_mutex
flush kfd release work
#1 kfd releas
From: Aric Cyr
[ Upstream commit b74f46f3ce1e5f6336645f1e9ff47c56d5dfdef1 ]
[why]
When SubVP is active the HW cursor size is limited to 64x64, and
anything larger will force composition which is bad for gaming on
DCN3.2 if the game uses a larger cursor.
[how]
If HW cursor is requested, typicall
From: Dillon Varone
[ Upstream commit a025f424af0407b7561bd5e6217295dde3abbc2e ]
[WHY&HOW]
P-state type would remain on previously used when unsupported which
causes confusion in logging and visual confirm, so set back to zero
when unsupported.
Reviewed-by: Aric Cyr
Signed-off-by: Dillon Varon
From: Dillon Varone
[ Upstream commit 0dfcc2bf269010a6e093793034c048049a40ee93 ]
[WHY]
It should no longer use DMCUB_SOFT_RESET as it can result
in the memory request path becoming desynchronized.
[HOW]
To ensure robustness in the reset sequence:
1) Extend timeout on the "halt" command sent via
From: George Shen
[ Upstream commit 0584bbcf0c53c133081100e4f4c9fe41e598d045 ]
[Why/How]
Certain PCON will clear the FRL_MODE bit despite supporting the link BW
indicated in the other bits.
Thus, skip checking the FRL_MODE bit when interpreting the
hdmi_encoded_link_bw struct.
Reviewed-by: Wen
From: Nicholas Kazlauskas
[ Upstream commit c707ea82c79dbd1d295ec94cc6529a5248c77757 ]
[Why]
If we soft reset before halt finishes and there are outstanding
memory transactions then the memory interface may produce unexpected
results, such as out of order transactions when the firmware next runs
From: Victor Lu
[ Upstream commit 057fef20b8401110a7bc1c2fe9d804a8a0bf0d24 ]
SRIOV VF does not have write access to AGP BAR regs.
Skip the writes to avoid a dmesg warning.
Signed-off-by: Victor Lu
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu
From: Emily Deng
[ Upstream commit fe2fa3be3d59ba67d6de54a0064441ec233cb50c ]
While the entry get in svm_range_unmap_from_cpu is the last entry, and
the entry is page fault, it also need to be dropped. So for equal case,
it also need to be dropped.
v2:
Only modify the svm_range_restore_pages.
From: Harish Kasiviswanathan
[ Upstream commit 289e68503a4533b014f8447e2af28ad44c92c221 ]
Set per-process static sh_mem config only once during process
initialization. Move all static changes from update_qpd() which is
called each time a queue is created to set_cache_memory_policy() which
is cal
From: Harish Kasiviswanathan
[ Upstream commit 61972cd93af70738a6ad7f93e17cc7f68a01e182 ]
Define set_cache_memory_policy() for these asics and move all static
changes from update_qpd() which is called each time a queue is created
to set_cache_memory_policy() which is called once during process
i
From: Leon Huang
[ Upstream commit 0d9cabc8f591ea1cd97c071b853b75b155c13259 ]
[Why]
When switching between PSR/Replay,
the DPCD config of previous mode is not cleared,
resulting in unexpected behavior in TCON.
[How]
Initialize the DPCD in setup function
Reviewed-by: Robin Chen
Signed-off-by:
From: Peichen Huang
[ Upstream commit 8a21da2842bb22b2b80e5902d0438030d729bfd3 ]
[WHY]
DP tunneling should not abort link train even bandwidth become
too low after downgrade. Otherwise, it would fail compliance test.
[HOW}
Do link train with downgrade settings even bandwidth is not enough
Revi
From: Zhikai Zhai
[ Upstream commit d3069feecdb5542604d29b59acfd1fd213bad95b ]
[WHY]
In some cases the remain de-tile buffer segments will be greater
than zero if we don't add the non-top pipe to calculate, at
this time the override de-tile buffer size will be valid and used.
But it makes the de
From: Charlene Liu
[ Upstream commit 756e58e83e89d372b94269c0cde61fe55da76947 ]
[why & how]
1. apply oem panel timing (not only on OLED)
2. remove MIN_DPP_DISP_CLK request in driver.
This fix will apply for dcn31x but not
sync with DML's output.
Reviewed-by: Ovidiu Bunea
Signed-off-by: Charle
From: David Rosca
[ Upstream commit 19478f2011f8b53dee401c91423c4e0b73753e4f ]
There have been multiple fixes to the video caps that are missing for
SRIOV. Update the SRIOV caps with correct values.
Signed-off-by: David Rosca
Acked-by: Alex Deucher
Reviewed-by: Ruijing Dong
Signed-off-by: Al
From: Alex Deucher
[ Upstream commit e27b36ea6ba5f29e91fcfb375ea29503708fcf43 ]
Just use the default values. There's not need to
get the value from hardware and it could cause problems
if we do that at runtime and gfxoff is active.
Reviewed-by: Mukul Joshi
Signed-off-by: Alex Deucher
Signed-
From: Alex Deucher
[ Upstream commit fc3c139cf0432b79fd08e23100a559ee51cd0be4 ]
Just use the default values. There's not need to
get the value from hardware and it could cause problems
if we do that at runtime and gfxoff is active.
Reviewed-by: Mukul Joshi
Signed-off-by: Alex Deucher
Signed-
From: Alex Deucher
[ Upstream commit e00e5c223878a60e391e5422d173c3382d378f87 ]
Move to probe so we can check the PCI device type and
only apply the drm_firmware_drivers_only() check for
PCI DISPLAY classes. Also add a module parameter to
override the nomodeset kernel parameter as a workaround
From: Jing Zhou
[ Upstream commit 9c2f4ae64bb6f6d83a54d88b9ee0f369cdbb9fa8 ]
[WHY]
We should never apply a minimum dispclk value while in
prepare_bandwidth or while displays are active. This is
always an optimizaiton for when all displays are disabled.
[HOW]
Defer dispclk optimization until saf
From: Flora Cui
[ Upstream commit b5aaa82e2b12feaaa6958f7fa0917ddcc03c24ee ]
Free on driver cleanup.
Reviewed-by: Lijo Lazar
Signed-off-by: Flora Cui
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
1 file changed, 3 insertions(
From: Victor Skvortsov
[ Upstream commit 9c05636ca72a2dbf41bf0900380f438a0de47319 ]
VFs cannot read the NAK_COUNTER register. This information is only
available through PMFW metrics.
Signed-off-by: Victor Skvortsov
Reviewed-by: Lijo Lazar
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levi
From: Jonathan Kim
[ Upstream commit f82d27dcff939d3cbecbc60e1b71e2518c37e81d ]
Clause instructions with precise memory enabled currently hang the
shader so set capabilities flag to disabled since it's unsafe to use
for debugging.
Signed-off-by: Jonathan Kim
Tested-by: Lancelot Six
Reviewed-b
From: Flora Cui
[ Upstream commit 017fbb6690c2245b1b4ef39b66c79d2990fe63dd ]
Signed-off-by: Flora Cui
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 31 ++-
1 file changed, 16 insertions(+)
From: Xiaogang Chen
[ Upstream commit 10e08943caedfb4b0b95933d248503a6f6b9fef6 ]
Curret kfd does not allocate pasid values, instead uses pasid value for each
vm from graphic driver. So should not prevent graphic driver from releasing
pasid values since the values are allocated by graphic driver,
From: Srinivasan Shanmugam
[ Upstream commit 2b04d04de956b44cc140d45cf8ebccfb378ce3bf ]
In the kfd_process_device_init_vm function, a valid error code is now
returned when the associated Process Address Space ID (PASID) is not
present.
If the address space virtual memory (avm) does not have an
From: Ovidiu Bunea
[ Upstream commit c488967488d7eff7b9c527d5469c424c15377502 ]
[why & how]
By default, DCN HW is in idle optimized state which does not allow access
to PHY registers. If BIOS powers up the DCN, it is fine because they will
power up everything. Only exit idle optimized state when
From: Amber Lin
[ Upstream commit 0c7e053448945e5a4379dc4396c762d7422b11ca ]
Correct F8_MODE setting for gfx950 that was removed
Fixes: 61972cd93af7 ("drm/amdkfd: Set per-process flags only once for
gfx9/10/11/12")
Signed-off-by: Amber Lin
Reviewed-by: Harish Kasiviswanathan
Signed-off-by: A
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