For gc_11_0_1, the external rev_id of A0/A1 series is 0x1,
the external rev_id of A2 is 0x10.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/soc21.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c
b/drivers/gpu/drm/amd
GFX is in gfxoff mode during s0ix so we shouldn't need to
actually execute kfd_iommu_suspend/kfd_iommu_resume operation.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
This patch updates securedisplay_cmd to ta_securedisplay_cmd
starting from amd-ta_securedisplay-v27.00.00.08.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c | 8
drivers/gpu/drm/amd/amdgpu
1. Rename securedisplay_cmd to ta_securedisplay_cmd.
2. Rename ta_securedisplay_max_phy to ta_securedisplay_phy_ID.
Signed-off-by: Aaron Liu
Signed-off-by: Shane Xiao
---
.../gpu/drm/amd/amdgpu/ta_secureDisplay_if.h | 24 +--
1 file changed, 12 insertions(+), 12 deletions
Enable swiotlb for gmc 10.0.
v2: include drm_cache.h to use the function ‘drm_need_swiotlb’
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0
Enable swiotlb for gmc 11.0.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index 503e40a90319..1471bfb9ae38 100644
--- a/drivers/gpu
(44);
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index f8fa27b7b53b..9ae8cdaa033e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
++
Enable swiotlb for gmc 10.0.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 6470290aaf7d..a1a98c7fe8e1 100644
--- a/drivers/gpu/drm
the hardware, and programming the backing store into VMID0
for all VMHUBs.
4. Calling amdgpu_gtt_mgr_recover() to make sure the table is updated with
the GTT allocations done before it was allocated.
Signed-off-by: Christian König
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu
Confirmed with hardware team, there is harvesting for gc 10.3.1.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
) is
programmed in gmc_v10_0_hw_init function. This is a hardware programming.
Therefore should be located in hw init. Hence need to move GTT allocation
from gmc_v*_0_sw_init to gmc_v*_0_hw_init.
V2: expand to all gmc_v*_0_hw_init functions.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu
) is
programmed in gmc_v10_0_hw_init function. This is a hardware programming.
Therefore should be located in hw init. Hence need to move GTT allocation
from gmc_v10_0_sw_init to gmc_v10_0_hw_init.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8
drivers/gpu/drm/amd
This patch adds 1.3.1/2.4.0 athub clock gating support.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/athub_v2_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_0.c
b/drivers/gpu/drm/amd/amdgpu
Use IP version rather than codename for athub.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/athub_v1_0.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/athub_v1_0.c
index
For yellow carp, the desired CGPG hysteresis value is 0x4E20.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index
B0 internal rev_id is 0x01, B1 internal rev_id is 0x02.
The external rev_id for B0 and B1 is 0x20.
The original expression is not suitable for B1.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd
Scatter/gather is APU feature starting from carrizo.
adev->apu_flags is not used for all APUs.
adev->flags & AMD_IS_APU can be used for all APUs.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Nicholas Kazlauskas
Missing code for Yellow Carp to enable scatter gather - follows how
DCN21 support was added.
Tested that 8k framebuffer allocation and display can now succeed after
applying the patch.
v2: Add hookup in DM
Reviewed-by: Aaron Liu
Acked-by: Huang Rui
Signed-off
Remove mdelay process and use smu_cmn_send_smc_msg_with_param to send
mode-reset message to SMC.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13
ike the above ASICs.
Signed-off-by: chen gong
Reviewed-by: Aaron Liu
Acked-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 1525d957e114..d4e9704dec62 100
Without driver loaded, SDMA0_UTCL1_PAGE.TMZ_ENABLE is set to 1
by default for all asic. On Raven/Renoir, the sdma goldsetting
changes SDMA0_UTCL1_PAGE.TMZ_ENABLE to 0.
This patch restores SDMA0_UTCL1_PAGE.TMZ_ENABLE to 1.
Signed-off-by: Aaron Liu
Acked-by: Luben Tuikov
---
drivers/gpu/drm/amd
Without driver loaded, SDMA0_UTCL1_PAGE.TMZ_ENABLE is set to 1
by default for all asic. On RV/RN, the sdma goldsetting changes
SDMA0_UTCL1_PAGE.TMZ_ENABLE to 0.
This patch restores SDMA0_UTCL1_PAGE.TMZ_ENABLE to 1.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++--
1
The tmz functions are verified on yellow carp. So enable it by
default.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 3014985cbf47
Starting from Navi+, the rlc reference clock is used for system clock
from vbios gfx_info table. It is incorrect to use core_refclk_10khz of
vbios smu_info table as system clock.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 15 +++
1 file changed
Starting from Navi+, the rlc reference clock is used for system clock
from vbios gfx_info table. It is incorrect to use core_refclk_10khz of
vbios smu_info table as system clock.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 15 +++
1 file changed
Enable VCN 3.0 PG and CG for Yellow Carp by setting up flags.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/nv.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 801cf79353dd
Starting from vangogh, the ATCL2 and DAGB0 registers relative
to mgcg/ls has changed.
For MGCG:
Replace mmMM_ATC_L2_MISC_CG with mmMM_ATC_L2_CGTT_CLK_CTRL.
For MGLS:
Replace mmMM_ATC_L2_MISC_CG with mmMM_ATC_L2_CGTT_CLK_CTRL.
Add DAGB0_(WR/RD)_CGTT_CLK_CTRL registers.
Signed-off-by: Aaron Liu
yellow_carp_ppt is swsmu layer 2 code for yellow carp.
V2: rename smu_v13_0 to smu_v13_0_1
V3: cleanup code.
Signed-off-by: Aaron Liu
Acked-by: Alex Deucher
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/pm/swsmu/smu13/Makefile | 2 +-
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 166
For supporting yellow carp, we need to add smu13 ip
support for the moment.
V2: add smu_v13_0_1.c|h dedicated for apu.
V3: cleanup code.
Signed-off-by: Aaron Liu
Acked-by: Alex Deucher
Reviewed-by: Huang Rui
---
drivers/gpu/drm/amd/pm/Makefile | 1 +
drivers/gpu/drm/amd/pm
For APU, vram type is DDR4 and vram width is 64
For dGPU, vram type is GDDR6 and vram width is 128
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers
Make the fw_write_wait default case true since presumably all new
gfx9 asics will have updated firmware. That is using unique WAIT_REG_MEM
packet with opration=1.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu
This patch enables TMZ bit in FRAME_CONTROL for gfx10.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index d6e11ee..8dce067
This patch expands amdgpu_copy_buffer interface with tmz parameter.
Signed-off-by: Aaron Liu
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_test.c | 4
This patch expands sdma copy_buffer interface with tmz parameter.
Signed-off-by: Aaron Liu
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/cik_sdma.c| 3 ++-
drivers/gpu/drm
Enable sdma TMZ mode via setting TMZ bit in sdma copy pkt
for sdma v4
Signed-off-by: Aaron Liu
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm
Enable sdma TMZ mode via setting TMZ bit in sdma copy pkt
for sdma v5.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index
and ATOMIC_CMPSWAP_RTN_32 opcode to compare
the cmp_data(0xdeadbeaf) to the written data which has been encrypted.
Signed-off-by: Aaron Liu
---
tests/amdgpu/basic_tests.c | 55 --
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git a/tests/amdgpu
This patch add test to submit a sdma command with secure context.
Signed-off-by: Aaron Liu
---
tests/amdgpu/security_tests.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tests/amdgpu/security_tests.c b/tests/amdgpu/security_tests.c
index 0bb4ad2..eb239f4 100644
--- a/tests
This patch is to test the command submission with secure context.
Signed-off-by: Aaron Liu
---
tests/amdgpu/security_tests.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/tests/amdgpu/security_tests.c b/tests/amdgpu/security_tests.c
index a3807ee..0bb4ad2 100644
--- a/tests
.
Signed-off-by: Huang Rui
Signed-off-by: Aaron Liu
Reviewed-by: Alex Deucher
---
tests/amdgpu/amdgpu_test.h | 4 +++-
tests/amdgpu/basic_tests.c | 52 +++---
2 files changed, 38 insertions(+), 18 deletions(-)
diff --git a/tests/amdgpu/amdgpu_test.h b/tests
which has been encrypted.
If the result is equal, then overwrite the src_data(0x12345678) to the
secure buffer and return directly. Otherwise loop again until gfx timeout
and the secure buffer data unchanged.
Signed-off-by: Aaron Liu
---
tests/amdgpu/basic_tests.c | 43
From: Huang Rui
This patch expand write linear helper for security to submit the command
with secure context.
v2: refine the function implementation.
v3: remove amdgpu_cs_ctx_create3.
Signed-off-by: Huang Rui
Signed-off-by: Aaron Liu
Reviewed-by: Alex Deucher
---
tests/amdgpu/amdgpu_test.h
This patch expands secure param for amdgpu_test_exec_cs_helper_raw.
The flag is transfered to kernel with cs.
Signed-off-by: Aaron Liu
---
tests/amdgpu/basic_tests.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu
In kernel, cs->in.flags is used for TMZ. Hence libdrm should transfer
the flag to kernel.
Signed-off-by: Aaron Liu
---
amdgpu/amdgpu.h| 4 +++-
amdgpu/amdgpu_cs.c | 4
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index f45f9f7..aee3
From: Huang Rui
To align the kernel uapi change from Alex:
"Add a flag to the GEM_CREATE ioctl to create encrypted buffers. Buffers with
this flag set will be created with the TMZ bit set in the PTEs or engines
accessing them. This is required in order to properly access the data from the
From: Huang Rui
This patch is to add secure buffer allocation test for invisible VRAM.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
tests/amdgpu/security_tests.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tests/amdgpu/security_tests.c
-by: Aaron Liu
Reviewed-by: Alex Deucher
---
tests/amdgpu/amdgpu_test.c| 7
tests/amdgpu/amdgpu_test.h| 21 ++
tests/amdgpu/meson.build | 2 +-
tests/amdgpu/security_tests.c | 96 +++
4 files changed, 125 insertions(+), 1 deletion
From: Huang Rui
This patch is to add secure buffer allocation test for system memory.
Signed-off-by: Huang Rui
Reviewed-by: Alex Deucher
---
tests/amdgpu/security_tests.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/tests/amdgpu/security_tests.c
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN
register, that limits IH to use physical address (FBPA, GPA) directly.
Those chicken bits need to be programmed first.
Signed-off-by: Aaron Liu
Reviewed-by: Huang Rui
Reviewed-by: Hawking Zhang
Acked-by: Alex Deucher
In Renoir's emulator, those chicken bits need to be programmed.
Signed-off-by: Aaron Liu
Reviewed-by: Huang Rui
Reviewed-by: Hawking Zhang
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h | 4
1 file changed, 4
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN
register, that limits IH to use physical address (FBPA, GPA) directly.
Those chicken bits need to be programmed first.
Signed-off-by: Aaron Liu
Reviewed-by: Huang Rui
Reviewed-by: Hawking Zhang
Acked-by: Alex Deucher
In Renoir's emulator, those chicken bits need to be programmed.
Signed-off-by: Aaron Liu
Reviewed-by: Huang Rui
Reviewed-by: Hawking Zhang
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h | 4
1 file changed, 4
For apu, SMU_MSG_OverridePcieParameters is unsupport.
So return directly in smu_override_pcie_parameters function.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
b/drivers
For apu, SMU_MSG_OverridePcieParameters is unsupport.
So return directly in smu_override_pcie_parameters function.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers
For picasso(adev->pdev->device == 0x15d8)(adev->rev_id >= 0x8),
firmware is sufficient to support gfxoff.
In commit 4ef9d7dc2db166cbe83fe4621385f034c9347fd2, for picasso,
return directly and cause gfxoff disabled.
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfx
In amdgpu_atif_handler, when hotplug event received, remove
ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check. This bit's check will cause missing
system resume.
Change-Id: Ic9a55fd44b721e59348a7768daeb41d414f21366
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 3 +--
1 file
-EINVAL.
Change-Id: I680679983f972b6969f4949f1faafaf17fe996a6
Signed-off-by: Aaron Liu
Reviewed-by: Huang Rui
Reviewed-by: Xiangliang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Don't return err if psp reponse status isn't zero
Change-Id: I680679983f972b6969f4949f1faafaf17fe996a6
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b
n <= 0xDF
otherwise is PCO FP5
Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 94740
n <= 0xDF
otherwise is PCO FP5
Change-Id: I359f0a3d1bc7d4d49c871cb3fb82797c7b91b259
Signed-off-by: Aaron Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 94740
60 matches
Mail list logo
