thank you Alex. The series is:
Tested-by: David (Ming Qiang) Wu
Reviewed-by: David (Ming Qiang) Wu
David
On 2025-09-05 11:25, Alex Deucher wrote:
Decouple the amdgpu fence from the amdgpu_job structure.
This lets us clean up the separate fence ops for the embedded
fence and other fences. Th
On 2025-09-04 13:46, Alex Deucher wrote:
On Thu, Sep 4, 2025 at 1:34 PM David Wu wrote:
On 2025-09-04 10:45, Alex Deucher wrote:
Decouple the amdgpu fence from the amdgpu_job structure.
This lets us clean up the separate fence ops for the embedded
fence and other fences. This also allows us
On 2025-09-04 10:45, Alex Deucher wrote:
Decouple the amdgpu fence from the amdgpu_job structure.
This lets us clean up the separate fence ops for the embedded
fence and other fences. This also allows us to allocate the
vm fence up front when we allocate the job.
v2: Additional cleanup suggest
On 2025-08-28 16:26, Alex Deucher wrote:
On Thu, Aug 28, 2025 at 1:38 PM David Wu wrote:
On 2025-08-28 10:05, Alex Deucher wrote:
Decouple the amdgpu fence from the amdgpu_job structure.
This lets us clean up the separate fence ops for the embedded
fence and other fences. This also allows
On 2025-08-28 10:05, Alex Deucher wrote:
Decouple the amdgpu fence from the amdgpu_job structure.
This lets us clean up the separate fence ops for the embedded
fence and other fences. This also allows us to allocate the
vm fence up front when we allocate the job.
Cc:david@amd.com
Cc:christ
On 2025-08-26 17:20, Alex Deucher wrote:
On Tue, Aug 26, 2025 at 5:11 PM David Wu wrote:
On 2025-08-26 16:58, Alex Deucher wrote:
On Tue, Aug 26, 2025 at 3:48 PM David (Ming Qiang) Wu wrote:
to_amdgpu_fence() could return NULL pointer which needs
to be protected for dereferencing.
I don&#
On 2025-08-26 16:58, Alex Deucher wrote:
On Tue, Aug 26, 2025 at 3:48 PM David (Ming Qiang) Wu wrote:
to_amdgpu_fence() could return NULL pointer which needs
to be protected for dereferencing.
I don't think any of these cases could ever be NULL. The amdgpu_fence
is a container for the dma_fenc
Looks good to me - thanks!
Reviewed-by: David (Ming Qiang) Wu
On 2025-08-26 12:29, Alex Deucher wrote:
ping?
On Mon, Aug 25, 2025 at 9:48 AM Alex Deucher wrote:
We need to cancel any outstanding work at both suspend
and driver teardown. Move the cancel to hw_fini which
gets called in both ca
Agreed with the change. Thanks!
Reviewed-by: David (Ming Qiang) Wu
On 2025-08-26 12:29, Alex Deucher wrote:
Ping?
On Fri, Aug 22, 2025 at 12:33 PM Alex Deucher wrote:
If the doorbell is invalid, be sure to set the r to an error
state so the function returns an error.
Signed-off-by: Alex De
Did some tests with the sw callbacks which were called with rmmod.
It will fail if there are jobs, otherwise no need to cancel delayed work as
there is not any outstanding work and idle handler called or not did not affect
the removal of the module. insmod continues to work after that.
The case fo
ot; for the new functions
(should they be static?)
Thanks,
David
On 2025-08-14 14:42, David Wu wrote:
hmm.. it is my concern for the same instance. but I got it now. Your
patch is good.
Thanks,
David
On 2025-08-14 14:06, Lazar, Lijo wrote:
[AMD Official Use Only - AMD Internal Distributi
wrote:
On Thu, Aug 14, 2025 at 3:18 PM David Wu wrote:
On 2025-08-14 14:00, Alex Deucher wrote:
On Thu, Aug 14, 2025 at 12:44 PM David Wu wrote:
On 2025-08-14 12:01, Alex Deucher wrote:
On Thu, Aug 14, 2025 at 11:35 AM David Wu wrote:
On 2025-08-14 08:56, Alex Deucher wrote:
On Wed, Aug 13
On 2025-08-14 14:00, Alex Deucher wrote:
On Thu, Aug 14, 2025 at 12:44 PM David Wu wrote:
On 2025-08-14 12:01, Alex Deucher wrote:
On Thu, Aug 14, 2025 at 11:35 AM David Wu wrote:
On 2025-08-14 08:56, Alex Deucher wrote:
On Wed, Aug 13, 2025 at 7:06 PM Wu, David wrote:
On 8/13/2025 6:11 PM
hmm.. it is my concern for the same instance. but I got it now. Your
patch is good.
Thanks,
David
On 2025-08-14 14:06, Lazar, Lijo wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
I didn't fully understand the question.
For the same instance, begin_thread will set the power st
amdgpu_vcn_idle_work_handler():
if (!fences && !atomic_read(&vcn_inst->total_submission_cnt)) {
--- could it be possible a context switch here to
amdgpu_vcn_ring_begin_use()?
if it could then AMD_PG_STATE_GATE will be set by mistake.
David
On 2025-08-14 08:54, Lazar, Lijo wrote:
On 2025-08-14 12:01, Alex Deucher wrote:
On Thu, Aug 14, 2025 at 11:35 AM David Wu wrote:
On 2025-08-14 08:56, Alex Deucher wrote:
On Wed, Aug 13, 2025 at 7:06 PM Wu, David wrote:
On 8/13/2025 6:11 PM, Alex Deucher wrote:
On Wed, Aug 13, 2025 at 5:47 PM Wu, David wrote:
On 8/13/2025 5
On 2025-08-14 08:56, Alex Deucher wrote:
On Wed, Aug 13, 2025 at 7:06 PM Wu, David wrote:
On 8/13/2025 6:11 PM, Alex Deucher wrote:
On Wed, Aug 13, 2025 at 5:47 PM Wu, David wrote:
On 8/13/2025 5:03 PM, Alex Deucher wrote:
On Wed, Aug 13, 2025 at 4:58 PM Sundararaju, Sathishkumar
wrote:
O
Hi Alex,
still have a concern - the fence or submission_cnt could increase in
begin_use but idle handler
has finished counting it (as 0) so it could also power off vcn.
David
On 2025-08-12 16:58, Alex Deucher wrote:
If there are multiple instances of the VCN running,
we may end up switching
Hi David,
On 8/12/2025 10:21 PM, David Wu wrote:
On 2025-08-12 10:56, Sathishkumar S wrote:
There is a race condition which leads to dpm video power
profile switch (disable and enable) during active video
decode on multi-instance VCN hardware.
This patch aims to fix/skip step 3 in the belo
On 2025-08-12 10:56, Sathishkumar S wrote:
There is a race condition which leads to dpm video power
profile switch (disable and enable) during active video
decode on multi-instance VCN hardware.
This patch aims to fix/skip step 3 in the below sequence:
- inst_1 power_on
- inst_0(idle
On 2025-08-10 21:03, Jesse.Zhang wrote:
From: Ruili Ji
This commit introduces support for detecting VCN reset capability through
the SMU interface. Key changes include:
1. Added amdgpu_dpm_reset_vcn_is_supported() interface to check VCN reset
support
2. Implemented SMU backend functions for VC
get printed when there is a mmhub page fault.
v2: fix typos spotted by David Wu.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c | 105 +++-
1 file changed, 104 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c
b/dri
On 2025-05-15 13:25, Dong, Ruijing wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: Wu, David
Sent: Thursday, May 15, 2025 12:41 PM
To: amd-gfx@lists.freedesktop.org; Koenig, Christian
Cc: Deucher, Alexander ; Liu, Leo ; Jiang,
Sonny ; Dong, R
On 2025-05-13 17:01, Alex Deucher wrote:
On Tue, May 13, 2025 at 4:33 PM David Wu wrote:
On 2025-05-13 15:29, Alex Deucher wrote:
On Tue, May 13, 2025 at 3:01 PM David Wu wrote:
On 2025-05-13 14:40, Alex Deucher wrote:
On Tue, May 13, 2025 at 2:23 PM David (Ming Qiang) Wu wrote:
V2
On 2025-05-13 15:29, Alex Deucher wrote:
On Tue, May 13, 2025 at 3:01 PM David Wu wrote:
On 2025-05-13 14:40, Alex Deucher wrote:
On Tue, May 13, 2025 at 2:23 PM David (Ming Qiang) Wu wrote:
V2: not to add extra read-back in vcn_v4_0_start and vcn_v5_0_0_start as
there are read-back
On 2025-05-13 14:40, Alex Deucher wrote:
On Tue, May 13, 2025 at 2:23 PM David (Ming Qiang) Wu wrote:
V2: not to add extra read-back in vcn_v4_0_start and vcn_v5_0_0_start as
there are read-back calls already. New comments for better understanding.
Similar to the previous changes made fo
sounds great! will adjust accordingly.
David
On 2025-05-13 12:44, Alex Deucher wrote:
On Tue, May 13, 2025 at 12:38 PM David (Ming Qiang) Wu
wrote:
On VCN v4.0.5 there is a race condition where the WPTR is not
updated after starting from idle when doorbell is used. The read-back
of regVCN_RB1
Series is:
Reviewed-by: David (Ming Qiang) Wu
one thing I would like to do:
return amdgpu_vcn_sysfs_reset_mask_init(adev);
On 2024-12-10 15:03, Alex Deucher wrote:
Add the calls to the vcn 5.0.1 code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c | 10 ++
On 2024-12-09 22:53, jesse.zh...@amd.com wrote:
sdmv7 queue reset already supports by mmio, add its sys file.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.
sounds good - will fix them - thanks!
David
On 2024-08-06 16:09, Alex Deucher wrote:
On Tue, Aug 6, 2024 at 12:00 PM David (Ming Qiang) Wu wrote:
Add JPEG IB command parser to ensure registers
in the command are within the JPEG IP block.
Signed-off-by: David (Ming Qiang) Wu
---
drivers/gp
On 2024-06-24 13:58, Sonny Jiang wrote:
From: Sonny Jiang
Add DPG support for JPEG 5.0
Signed-off-by: Sonny Jiang
Reviewed-by: David (Ming Qiang) Wu
tested fine as well - thanks!
---
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.h | 31 +
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c | 159
On 2024-06-20 13:21, Alex Deucher wrote:
On Thu, Jun 20, 2024 at 1:18 PM David Wu wrote:
see inline, please
David
On 2024-06-20 12:50, Alex Deucher wrote:
On Thu, Jun 20, 2024 at 12:07 PM David Wu wrote:
I think the "break;" there is to silence the compilation warning - it i
see inline, please
David
On 2024-06-20 12:50, Alex Deucher wrote:
On Thu, Jun 20, 2024 at 12:07 PM David Wu wrote:
I think the "break;" there is to silence the compilation warning - it is
ugly but needed.
Which break? It looks fine to me.
example here - code is fine but the com
I think the "break;" there is to silence the compilation warning - it is
ugly but needed.
David
On 2024-06-20 11:38, Alex Deucher wrote:
Applied. Thanks!
Alex
On Thu, Jun 20, 2024 at 5:07 AM Jiapeng Chong
wrote:
No functional modification involved.
./drivers/gpu/drm/amd/display/dc/dml2/d
please see in line.
On 2024-05-23 12:02, Dong, Ruijing wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
Please see my question inline below.
Thanks,
Ruijing
-Original Message-
From: Wu, David
Sent: Thursday, May 23, 2024 11:05 AM
To: amd-gfx@lists.freedesktop.org; Koen
Reviewed-by: David (Ming Qiang) Wu
On 2024-05-15 15:19, Ruijing Dong wrote:
Update the capabilities for supporting 8k encoding/decoding.
Signed-off-by: Ruijing Dong
---
drivers/gpu/drm/amd/amdgpu/soc24.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers
On 2024-05-13 13:43, Christian König wrote:
Am 13.05.24 um 19:41 schrieb David Wu:
On 2024-05-13 13:11, Christian König wrote:
Am 09.05.24 um 20:40 schrieb David (Ming Qiang) Wu:
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the
On 2024-05-13 13:11, Christian König wrote:
Am 09.05.24 um 20:40 schrieb David (Ming Qiang) Wu:
We do not directly enable/disable VCN IRQ in vcn 5.0.0.
And we do not handle the IRQ state as well. So the calls to
disable IRQ and set state are removed. This effectively gets
rid of the warining
24-05-09 17:36, Alex Deucher wrote:
On Thu, May 9, 2024 at 5:31 PM David Wu wrote:
Hi Alex,
Thanks for the suggestion!
What I am thinking is "DRM_DEV_INFO" should not be the one we want - as it is
more like a debug message.
[drm:jpeg_v5_0_0_hw_init [amdgpu]] JPEG decode initialized succ
Hi Alex,
Thanks for the suggestion!
What I am thinking is "DRM_DEV_INFO" should not be the one we want - as
it is more like a debug message.
[drm:jpeg_v5_0_0_hw_init [amdgpu]] JPEG decode initialized successfully.
instead I prefer to use this format:
"amdgpu :43:00.0: amdgpu: JPEG deco
On 2024-04-30 10:48, Harry Wentland wrote:
On 2024-04-30 09:43, Aurabindo Pillai wrote:
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is
made in DC codebase to use 4.1.0
Signed-off-by: Aurabindo Pillai
Series is
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu
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