rings
-format vcpi and payload info into tables with headings
-clean up topology prints
---
v2: Addressed Lyude's comments
-made helper function return const
-fixed indentation and spacing issues
Signed-off-by: Eryk Brol
---
drivers/gpu/drm/drm_dp_mst_topology.c | 59
into strings
-format vcpi and payload info into tables with headings
-clean up topology prints
Signed-off-by: Eryk Brol
---
drivers/gpu/drm/drm_dp_mst_topology.c | 67 ---
1 file changed, 51 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology
]
- round up surface address to nearest multiple of 2048
- current policy is to provide a much bigger cache size than
necessary,so this operation is safe
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 5 ++---
1
From: Sung Lee
[WHY & HOW]
Using values provided by DF for latency may cause hangs in
multi display configurations. Revert change to previous value.
Signed-off-by: Sung Lee
Reviewed-by: Haonan Wang
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
1
From: Aric Cyr
DC version 3.2.126 brings improvements in multiple areas.
In summary, we highlight:
- DMUB fixes
- Firmware relase 0.0.55
- Expanded dmub_cmd documentation
- Enhancements in DCN30
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/bios/bios_parser2.c| 5 +++--
.../drm/amd/display/dc/bios/command_table2.c | 21 ---
.../drm/amd/display/dc/bios/command_table2.h | 3 ++-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
.../gpu/drm/amd/display/dc
From: Anthony Koo
Add comments to better describe the function of different cmds
and parameters in the dmub interface
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 834 +-
1 file changed, 795
Cheng
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 8 ++--
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 2 +-
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 2 +-
.../gpu/drm/amd/display/dmub/src/dmub_srv.c | 19 +--
4 files changed, 13
From: Qingqing Zhuo
[Why]
- Wrong scope for ifdef
- Missing struct description
[How]
Move ifdef and add comment
Signed-off-by: Qingqing Zhuo
Reviewed-by: Nicholas Kazlauskas
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +++--
drivers/gpu/drm/amd/display
: Eryk Brol
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 11 +++
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 6 ++
.../gpu/drm/amd
From: Yongqiang Sun
[Why]
If interval of two interrupt from dmub outbox0 is too short,
some event might be skipped
[How]
Compare read pointer and write pointer until all the event
entry is processed
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Eryk Brol
---
.../gpu/drm
From: Martin Leung
[why]
In some boot configurations we need to retrieve the currently
UEFI-set dppclk, but there was a typo in the calculation
[how]
Fix typo to make dpp_clk calculate off dpp_clk divider instead of
disp_clk
Signed-off-by: Martin Leung
Reviewed-by: Sung Lee
Acked-by: Eryk
From: Yongqiang Sun
[Why & How]
Reference to read pointer which is incorrect.
Change to reference to write pointer.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 2 +-
1 file changed, 1 insertion(+), 1 dele
From: Yongqiang Sun
[Why & How]
Fix linux compile error
Signed-off-by: Yongqiang Sun
Reviewed-by: Nicholas Kazlauskas
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 12
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 5 ++---
2 files changed
From: Martin Leung
[Why]
On baco-enabled systems running virtual dal, can get set power
state when hw is not initialized
[How]
Skip DC hw part of setPowerState when hw not available
Signed-off-by: Martin Leung
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc
From: Dillon Varone
[Why & How]
Ported logic from dcn21 for reading in pipe fusing to dcn30.
Supported configurations are 1 and 6 pipes. Invalid fusing
will revert to 1 pipe being enabled.
Signed-off-by: Dillon Varone
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/d
This DC patchset brings improvements in multiple areas.
In summary we highlight:
* DMUB fixes
* Firmware relase 0.0.55
* Expanded dmub_cmd documentation
* Enhancements in DCN30
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.55
Aric Cyr (1):
drm/amd/display: 3.2.126
Dillon Var
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 54a829f95346
From: Anthony Koo
- Add define for __forceinline
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub
From: Charlene Liu
[Why]
dcn3_01 supports gpu_vm, but this is not enabled in amdgpu_dm
Signed-off-by: Charlene Liu
Reviewed-by: Yongqiang Sun
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm
From: Roy Chan
[Why]
When HDCP is on, some display would introduce audio noise during
HDCP handling.
[How]
Mute before HDCP handling when disabling core link. Unmute after
HDCP when enabling core link.
Signed-off-by: Roy Chan
Reviewed-by: Martin Leung
Acked-by: Eryk Brol
---
drivers/gpu
Acked-by: Eryk Brol
---
.../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 93 ++-
1 file changed, 89 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index fe6dc1e68e60
From: Michael Strauss
[Why]
New value breaks VSR on high refresh panels, reverting until a fix is developed
Signed-off-by: Michael Strauss
Signed-off-by: Sung Lee
Reviewed-by: Yongqiang Sun
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
1 file changed
forcing link rate.
Signed-off-by: Chris Park
Reviewed-by: Wenjing Liu
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core
handle_hpd_rx_irq so that
it will not rely on call to dc_link_handle_hpd_rx_irq.
Signed-off-by: Qingqing Zhuo
Reviewed-by: Harry Wentland
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++-
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
drivers/gpu/drm/amd
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 7a7efe9ea961..283995ab9eeb 100644
--- a/drivers
default bits_per_channel is 8.
Signed-off-by: Jing Zhou
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c| 4 ++--
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 15 ---
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a
From: Dmytro Laktyushkin
[How & Why]
Allow clk_mgr functions to be reused by making then non-static
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Yang
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 2 +-
.../gpu/drm/amd/display/dc/clk_mgr/dc
From: Wyatt Wood
[Why]
Add support for new fw command for runtime feature detection.
[How]
Driver sends command through ring buffer, and fw returns data back
through this command.
Signed-off-by: Wyatt Wood
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub
From: Judy Cai
[Why]
Change in DCN10 to use IMMEDIATE_UPDATE mode for AFMT is not
reflected in DCN30 as it uses VPG.
[How]
Use IMMEDIATE_UPDATE mode for DCN30 in VPG.
Signed-off-by: Judy Cai
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_vpg.c | 62
HW is still on.
It's not necessary to check this since there's no display data in both
cases.
[How]
Remove seamless boot checking in power_down_on_boot.
Signed-off-by: John Wu
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer
This DC patchset brings improvements in multiple areas.
In summary, we highlight:
* Fixes in MST, Compliance, HDCP, audio;
* Enhancements in VSIF;
* Improvements in seamless boot, DPG;
AMD\ramini (1):
drm/amd/display: Set FixRate bit in VSIF V3
Anthony Koo (1):
From: Qingqing Zhuo
[Why]
Calls to disable/enable stream should be guarded with dc_lock.
[How]
Add dc_lock before calling into dc_link_handle_hpd_rx_irq.
Signed-off-by: Qingqing Zhuo
Reviewed-by: Nicholas Kazlauskas
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
From: "AMD\\ramini"
[Why]
Signal FreeSync display that we are in Fixed Rate mode, and
expand the FreeSync range to 1024.
[How]
Set the new bit in SB16:bit0, and augment the min and max
refresh rate with 2 extra bits.
Signed-off-by: AMD\ramini
Reviewed-by: Anthony Koo
Acked-by:
From: Reza Amini
[Why]
Implement feature of VSIF V3
[How]
Set refresh rate MSB for extended range
Signed-off-by: Reza Amini
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
.../amd/display/modules/freesync/freesync.c | 100 ++
1 file changed, 82 insertions(+), 18
[Why]
Missed removing a '!' which results in incorrect behavior
[How]
Remove the offending '!'
Signed-off-by: Eryk Brol
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/a
this issue by ensuring that
we never set a minimum value below the minimum clock threshold.
Reviewed-by: Nicholas Kazlauskas
Signed-off-by: Rodrigo Siqueira
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/dce112_clk_mgr.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display
From: Alvin Lee
[Why]
DAL resume from BACO time is longer if we always flush inst_fb
[How]
Check if backdoor loading to flush inst_fb
Signed-off-by: Alvin Lee
Reviewed-by: Nicholas Kazlauskas
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 17 +
1
From: Alvin Lee
[Why]
When forcing 3D mode in DAL, we set the right address to be the same as the
left address. We need to do the same for the meta addresses.
[How]
Program right meta to be same as left meta.
Signed-off-by: Alvin Lee
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index d2d2032a40e1
using HW i2c engine.
for dmcu using HW i2c engine, needs add similar logic in dmcu fw.
Signed-off-by: Charlene Liu
Reviewed-by: Chris Park
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c | 9
From: Chris Park
[Why]
Formula uses kHz in their formula while our driver operates with Hz.
[How]
Divide audio rate by 1000 on the initial variable that is entered into formula.
Signed-off-by: Chris Park
Reviewed-by: Charlene Liu
Acked-by: Eryk Brol
Acked-by: Nicholas Kazlauskas
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 119 ++
1 file changed, 36 insertions(+), 83 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 0ab718fd43b1
From: Dmytro Laktyushkin
This should be programmed with timing rather than with odm.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Dmytro Laktyushkin
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 11 +++
drivers/gpu/drm/amd/display/dc/dcn20
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/modules/freesync/freesync.c| 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index f76d31451dcb
: Felipe Clark
Acked-by: Eryk Brol
---
.../amd/display/modules/freesync/freesync.c | 45 ++-
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index
lling notify_wm_ranges
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/dcn30/dcn30_hubbub.c | 43 +++
.../drm/amd/display/dc/dcn30/dcn30_hubbub.h | 2 +
.../gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 2 +
3 files changed, 47 inser
limitation.
Signed-off-by: Fangzhi Zuo
Reviewed-by: Hersen Wu
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
From: Yongqiang Sun
[Why]
enable ODM on eDP panel with ABM will result in color difference
on the panel due to only one ABM module to set one pipe.
[How]
Block ABM in case of ODM enabled on eDP.
Signed-off-by: Yongqiang Sun
Reviewed-by: Eric Yang
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd
er is disabled and re-enabled, register not cleared otherwise
Also, remove DCN3 part of dcn10_init_hw, we will not be going back to it.
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 7 +++
drivers/gpu/drm/amd/di
From: Alvin Lee
[Why]
We will hang if we report switch in VACTIVE but not in VBLANK and DPG_EN = 1
[How]
Block switch in ACTIVE if not supported in BLANK
Signed-off-by: Alvin Lee
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c | 2
correct pipe.
Signed-off-by: Isabel Zhang
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 156 ++
.../amd/display/dc/dcn10/dcn10_hw_sequencer.h | 2 +-
.../gpu/drm/amd/display
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 82fe0ab56e3a
This DC patchset brings improvements in multiple areas. In summary, we have:
* Fixes in Freesync, audio, ABM
* Improvements in i2c, p-state
* Added HDMI remote sink validation
--
Alvin Lee (3):
drm/amd/display: Don't allow pstate if no support in blank
drm/amd/display: Progra
not lighting up.
[How]
Set dpcd_caps.dongle_type for passive dongles in detect_dp().
Signed-off-by: Samson Tam
Reviewed-by: Joshua Aberback
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc
: Sung Lee
Reviewed-by: Yongqiang Sun
Acked-by: Eryk Brol
---
.../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 10
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 53 +++
.../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 2 +
3 files changed, 43 insertions(+), 22 deletions
on the connector user needs to echo 1 into
"trigger_hotplug" debugfs entry on its respective connector.
Signed-off-by: Eryk Brol
Signed-off-by: Mikita Lipski
Reviewed-by: Mikita Lipski
Acked-by: Eryk Brol
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 81 +++
1 fi
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index f3ac9e3df760
Reviewed-by: Wenjing Liu
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 117d8aaf2a9b..405452b736e1 100644
--- a
currently uses.
Signed-off-by: Chris Park
Reviewed-by: Nicholas Kazlauskas
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/bios/command_table2.c | 28 +++
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
b/drivers/gpu/drm/amd
keep the logic for HF-VSIF and add H14b-VSIF construction part.
Signed-off-by: Wayne Lin
Reviewed-by: Roman Li
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 3 ++-
.../amd/display/modules/inc/mod_info_packet.h| 2 +-
.../display/modules/info_packet/info_packet.c
[why & how]
Useful entry to understand if link has DSC or FEC capabilities,
implemented to read DPCD caps stored on the link. Better than
manually reading the registers with aux dpcd helper.
Signed-off-by: Eryk Brol
Signed-off-by: Mikita Lipski
Reviewed-by: Mikita Lipski
Acked-by: Eryk
From: Brandon Syu
[Why]
When system enters s3/s0i3, backlight PWM would set user level.
[How]
ABM disable function add keep current gain to avoid it.
Signed-off-by: Brandon Syu
Reviewed-by: Josip Pavic
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc_stream.h | 2 +-
1 file
disable immediately
Chris Park (1):
drm/amd/display: Call DMUB for eDP power control
Eryk Brol (2):
drm/amd/display: Add debugfs for connector's FEC & DSC capabilities
drm/amd/display: Add connector HPD trigger debugfs entry
Jaehyun Chung (1):
drm/amd/display: Revert HDCP disable
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index f50ef4255020
From: Aric Cyr
[Why]
Test expects that we also read HPD_IRQ_VECTOR when checking for
symbol loss as well lane status.
[How]
Read bytes 0x200-0x205 instead of just 0x202-0x205
Signed-off-by: Aric Cyr
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core
Kazlauskas
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2b5e70f68e57..b1bc03594e5c 100644
--- a
be enabled. Works for both SST and MST.
Signed-off-by: Eryk Brol
Signed-off-by: Mikita Lipski
Reviewed-by: Mikita Lipski
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 1 +
.../amd/display/amdgpu_dm/amdgpu_dm_debu
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display
From: Reza Amini
[Why]
Each asic can optimize best based on its capabilities
[How]
Optimizing timing for a new pixel clock
Signed-off-by: Reza Amini
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/dc/core/dc_stream.c | 18 ++---
drivers/gpu/drm/amd
Signed-off-by: Jun Lei
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index ef0b5941bc50
iting stream's DSC flag.
Signed-off-by: Eryk Brol
Signed-off-by: Mikita Lipski
Reviewed-by: Mikita Lipski
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 5 ++
.../amd/display/amdgpu_dm/amdgpu_dm_debu
s not guarantee equal or higher than
old dppclk. we could ignore power saving different between
dppclk = displck and dppclk = dispclk / 2 between step 1 and step 6.
as long as safe_to_lower = false, set dpclk = dispclk to simplify
condition check.
CC: Stable
Signed-off-by: Hersen Wu
Reviewed-by: A
From: Wyatt Wood
[Why]
Feature requires synchronization of dig, pipe, and cursor locking
between driver and fw.
[How]
Set flag to force psr to use hw lock mgr.
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 2 +-
1
training done. That can improve the comaptibility
from current production monitors.
Signed-off-by: Martin Tsai
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 50 +++
.../amd/display/include/link_service_types.h | 2 +
2 files
From: Dmytro Laktyushkin
[Why]
This change replaces older looping code in favor of these functions.
[How]
There are built in functions for extracting global sync params
during mode validation now.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Eryk Brol
---
.../drm
rflow as soon as the pipe lock is released until the
next call to dcn3_update_clocks where the DTO is updated.
[How]
Remove dppclk check before programming new DTO value.
Signed-off-by: Alvin Lee
Reviewed-by: Jun Lei
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_
m/amd/display: [FW Promotion] Release 0.0.26
Aric Cyr (2):
drm/amd/display: 3.2.96
drm/amd/display: Fix DP Compliance tests 4.3.2.1 and 4.3.2.2
Dmytro Laktyushkin (1):
drm/amd/display: Clean up global sync param retrieval
Eryk Brol (4):
drm/amd/display: Rename bytes_pp to the correct bits_pp
[why]
Fix naming and return bits rather than bytes per pixel for
naming consistency. Because registers return Bytes per pixel,
but DSC Config structure is expecting bits per pixel as input.
So when returning the value convert from bytes into bits.
Signed-off-by: Eryk Brol
Signed-off-by: Mikita
[Why]
Struct dcn_dsc_state is used for reading current state
and parameters of DSC on a pipe, the target rate parameter
uses bytes per pixel even though its reading BITS_PER_PIXEL
register.
[How]
Changing it to Bits Per Pixel for consistency.
Signed-off-by: Eryk Brol
Signed-off-by: Mikita
From: Anthony Koo
[Header Changes]
- Add command for notification of active streams to DMUB
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 01ef2a3c1f3c
-by: Eryk Brol
---
.../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 3 ---
.../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 21 +++
.../amd/display/dc/inc/hw/clk_mgr_internal.h | 2 ++
3 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display
=
DISPLAY_DONGLE_NONE.
Signed-off-by: jinlong zhang
Reviewed-by: Wenjing Liu
Acked-by: Eryk Brol
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 105 +-
1 file changed, 53 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
b
From: Yongqiang Sun
[Why]
SMU may return error code to driver, but driver only check if response
is OK.
[How]
Check SMU response instead of reg_wait, assert in case of reponse isn't
OK.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Eryk Brol
---
.../dc/clk_mgr/
range.
Signed-off-by: Jaehyun Chung
Reviewed-by: Aric Cyr
Acked-by: Anthony Koo
Acked-by: Eryk Brol
---
.../amd/display/modules/freesync/freesync.c | 35 +--
.../amd/display/modules/inc/mod_freesync.h| 7 ++--
2 files changed, 10 insertions(+), 32 deletions(-)
diff --git
From: Dmytro Laktyushkin
In case of certain display configurations we want to allow max detile
buffer utilization by using 4 to 1 mpc combine
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Eryk Brol
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 24
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu/drm/amd/display
From: Jing Zhou
[Why]
Register key for AE or QA do regression test. New edid status for
check.
[How]
Add register key edid_read_retry_times.
Add new edid status EDID_FALL_BACK.
Signed-off-by: Jing Zhou
Reviewed-by: Charlene Liu
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dc.h
From: Wyatt Wood
[Why]
Debug flags are not set by default.
[How]
Set debug flags to 0
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Eryk Brol
---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fixes in Freesync, DCN20, and others;
* Enhancements in DC;
* Improvements in PSR, link processing, and others.
-
Anthony Koo (3):
drm/amd/display: [FW Promotion] Release 1.0.20
drm/amd/displa
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