[PATCH 3/3] drm/amdgpu/vcn: Use offsets local to VCN/JPEG in VF

For VCN/JPEG 4.0.3, use only the local addressing scheme. - Mask bit higher than AID0 range v2 remain the case for mmhub use master XCC Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 19 -- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 46

[PATCH 2/3] drm/amdgpu: Add empty HDP flush function to VCN v4.0.3

From: Lijo Lazar VCN 4.0.3 does not HDP flush with RRMT enabled. Instead, mmsch will do the HDP flush. This change is necessary for VCN v4.0.3, no need for backward compatibility Signed-off-by: Lijo Lazar Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 8 1

[PATCH 3/3] drm/amdgpu/vcn: Use offsets local to VCN/JPEG in VF

For VCN/JPEG 4.0.3, use only the local addressing scheme. - Mask bit higher than AID0 range - Remove gmc v9 mmhub vmid replacement, since the bit will be masked later in register write/wait Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 5 --- drivers/gpu/drm/amd

[PATCH 1/3] drm/amdgpu: Add empty HDP flush function to JPEG v4.0.3

From: Lijo Lazar JPEG v4.0.3 doesn't support HDP flush when RRMT is enabled. Instead, mmsch fw will do the flush. This change is necessary for JPEG v4.0.3, no need for backward compatibility Signed-off-by: Lijo Lazar Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 8

[PATCH 2/3] drm/amdgpu: Add empty HDP flush function to VCN v4.0.3

From: Lijo Lazar VCN 4.0.3 cannot trigger HDP flush with RRMT enabled. Instead, mmsch will do the HDP flush. Signed-off-by: Lijo Lazar Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 1/3] drm/amdgpu: Add empty HDP flush function to JPEG v4.0.3

From: Lijo Lazar JPEG v4.0.3 doesn't support HDP flush when RRMT is enabled. Instead, mmsch fw will do the flush. Signed-off-by: Lijo Lazar Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/amd

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write in gfx_v9_4_3

Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 33 + 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index 8d8763ebe027..1149595a02d8 100644 --- a/drivers/gpu/drm/amd

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write in gfx_v9_4_3

[WHY] sriov has the higher bit violation when flushing tlb [HOW] normalize the registers to keep lower 16-bit(dword aligned) to aviod higher bit violation RLCG will mask xcd out and always assume it's accessing its own xcd Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write under sriov in TLB flush

v2 rename the normalized macro, add ip block type for further use move asics func declaration after ip block type since new func refers ip block type add normalization in emit flush tlb as well v3 declare the new func in the asic specific header Signed-off-by: Jane Jian --- drivers/gpu/drm

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write under sriov in TLB flush

v2 rename the normalized macro, add ip block type for further use move asics func declaration after ip block type since new func refers ip block type add normalization in emit flush tlb as well Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 112

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write under sriov in TLB flush

v2 rename the normalized macro, add ip block type for further use move asics func declaration after ip block type since new func refers ip block type Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 112 +++-- drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write under sriov in TLB flush

v2 rename the normalized macro, add ip block type for further use move asics func declaration after ip block type since new func refers ip block type Signed-off-by: Jane Jian --- amdgpu.h| 112 +++-- aqua_vanjaram.c | 16 +++ gmc_v9_0.c | 8 +- soc15.c

[PATCH] drm/amdgpu: part I - normalize registers as local xcc to read/write under sriov in TLB

v2 rename the normalized macro, add ip block type for further use Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 16 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 -- drivers/gpu/drm/amd

[PATCH] drm/amdgpu: part I - normalize registers as local xcc to read/write under sriov in TLB

Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++ drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c | 9 + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 -- drivers/gpu/drm/amd/amdgpu/soc15.c | 1 + drivers/gpu/drm/amd/amdgpu/soc15.h

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write under sriov

to read and write v2 amend some typos Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 12 ++-- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 ++-- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 2 ++ 3 files changed, 18 insertions(+), 4 deletions(-) diff --git

[PATCH] drm/amdgpu: normalize registers as local xcc to read/write under sriov

to read and write Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 12 ++-- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 9 +++-- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 2 ++ 3 files changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd

[PATCH] drm/amdgpu: keep init xcc0 for all xccs under sriov

[WHY] sriov has the higher bit violation when flushing tlb [HOW] for sriov only init XCC0(lower 16-bit) for all XCCs to avoid higher bit violation since kiq ring is always local, local address without XCC ID is enough to be sent to the XCC KIQ Signed-off-by: Jane Jian --- drivers/gpu/drm/amd

[PATCH] drm/amdgpu/vcn: port mmsch ctx table size fix from jpeg v4

add jpeg table size to ctx table size rather than override it v2: save jpeg header info otherwise it will lose debug info Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu/vcn: port mmsch ctx table size fix from jpeg v4

add jpeg table size to ctx table size rather than override it Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c index

[PATCH] drm/amdgpu/smu: skip pptable init under sriov

sriov does not need to init pptable from amdgpu driver we finish it from PF Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm

[PATCH] drm/amdgpu/smu: skip pptable init under sriov

sriov does not need to init pptable from amdgpu driver we finish it from PF Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm

[PATCH] drm/amdgpu/sriov/vcn: skip ip revision check case to ip init for SIENNA_CICHLID

[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision(3, 0, 192), typically modified under sriov mode Signed-off-by: Jane Jian Change-Id

[PATCH] drm/amdgpu/sriov/vcn: skip ip revision check case to ip init for SIENNA_CICHLID

[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision(3, 0, 192), typically modified under sriov mode Signed-off-by: Jane Jian Change-Id

[PATCH] drm/amdgpu/sriov/vcn: skip ip revision check case to ip init for SIENNA_CICHLID

[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] add new version check for vcn0 disabled revision Signed-off-by: Jane Jian Change-Id: I1ace32acbf3a13c0baac958508da1324ec387a58

[PATCH] drm/amdgpu/sriov/vcn: skip ip revision check case to ip init for SIENNA_CICHLID

[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] skip ip revision match case and continue use asic type to check Signed-off-by: Jane Jian Change-Id

[PATCH] drm/amdgpu/sriov/vcn: skip ip revision check case to ip init for SIENNA_CICHLID

[WHY] for sriov odd# vf will modify vcn0 engine ip revision(due to multimedia bandwidth feature), which will be mismatched with original vcn0 revision [HOW] skip ip revision match case and continue use asic type to check Signed-off-by: Jane Jian Change-Id

[PATCH] drm/amdgpu/sriov: reopen sienna_child smu ip block under sriov

open smu ip block meets with one-vf mode need Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/nv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index 4b1a4acb60d9..ef52d46b1458 100644 --- a/drivers

[PATCH] drm/amd/powerplay: skip judging if baco support for Arcturus sriov

Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c index 1c66b7d7139c..cfae4bcaf32e 100644 --- a/drivers/gpu/drm/amd

[PATCH 5/5] drm/amd/amdgpu: L1 Policy(5/5) - removed IH_CHICKEN from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 22 -- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c index

[PATCH 4/5] drm/amd/amdgpu: L1 Policy(4/5) - removed SPI_GDBG_TRAP_CONFIG from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 35384f543664..bf02ca198283

[PATCH 3/5] drm/amd/amdgpu: L1 Policy(3/5) - removed ECC interrupt from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index

[PATCH 2/5] drm/amd/amdgpu: L1 Policy(2/5) - removed GC GRBM violations from gfxhub

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 79 +--- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 2 +- 2 files changed, 44 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 1/5] drm/amd/amdgpu: L1 Policy(1/5) - removed VM settgings for mmhub and gfxhub from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 11 ++-- drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 74 ++--- 2 files changed, 48 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 1/5] drm/amd/amdgpu: L1 Policy(1/5) - removed VM settgings for mmhub and gfxhub from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 11 ++-- drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 74 ++--- 2 files changed, 48 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 5/5] drm/amd/amdgpu: L1 Policy(5/5) - removed IH_CHICKEN from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 22 -- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c index

[PATCH 4/5] drm/amd/amdgpu: L1 Policy(4/5) - removed SPI_GDBG_TRAP_CONFIG from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 35384f543664..bf02ca198283

[PATCH 2/5] drm/amd/amdgpu: L1 Policy(2/5) - removed GC GRBM violations from gfxhub

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 79 +--- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c| 2 +- 2 files changed, 44 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu

[PATCH 3/5] drm/amd/amdgpu: L1 Policy(3/5) - removed ECC interrupt from VF

From: Zhigang Luo Signed-off-by: Zhigang Luo Signed-off-by: Jane Jian --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index